2 * Marvell 88E61xx switch driver
4 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * Copyright (c) 2014 Nikita Nazarenko <nnazarenko@radiofid.com>
7 * Based on code (c) 2008 Felix Fietkau <nbd@openwrt.org>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License v2 as published by the
11 * Free Software Foundation
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/mii.h>
19 #include <linux/phy.h>
21 #include <linux/of_mdio.h>
22 #include <linux/delay.h>
23 #include <linux/switch.h>
24 #include <linux/device.h>
25 #include <linux/platform_device.h>
29 MODULE_DESCRIPTION("Marvell 88E61xx Switch driver");
30 MODULE_AUTHOR("Claudio Leite <leitec@staticky.com>");
31 MODULE_AUTHOR("Nikita Nazarenko <nnazarenko@radiofid.com>");
32 MODULE_LICENSE("GPL v2");
33 MODULE_ALIAS("platform:mvsw61xx");
36 * Register access is done through direct or indirect addressing,
37 * depending on how the switch is physically connected.
39 * Direct addressing: all port and global registers directly
40 * accessible via an address/register pair
42 * Indirect addressing: switch is mapped at a single address,
43 * port and global registers accessible via a single command/data
48 mvsw61xx_wait_mask_raw(struct mii_bus
*bus
, int addr
,
49 int reg
, u16 mask
, u16 val
)
55 r
= bus
->read(bus
, addr
, reg
);
56 if ((r
& mask
) == val
)
64 r16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
, int reg
)
69 return bus
->read(bus
, addr
, reg
);
71 /* Indirect read: First, make sure switch is free */
72 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
73 MV_INDIRECT_INPROGRESS
, 0);
75 /* Load address and request read */
76 ind_addr
= MV_INDIRECT_READ
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
77 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
80 /* Wait until it's ready */
81 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
82 MV_INDIRECT_INPROGRESS
, 0);
84 /* Read the requested data */
85 return bus
->read(bus
, base_addr
, MV_INDIRECT_REG_DATA
);
89 w16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
,
95 bus
->write(bus
, addr
, reg
, val
);
99 /* Indirect write: First, make sure switch is free */
100 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
101 MV_INDIRECT_INPROGRESS
, 0);
103 /* Load the data to be written */
104 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_DATA
, val
);
106 /* Wait again for switch to be free */
107 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
108 MV_INDIRECT_INPROGRESS
, 0);
110 /* Load address, and issue write command */
111 ind_addr
= MV_INDIRECT_WRITE
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
112 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
116 /* swconfig support */
119 sr16(struct switch_dev
*dev
, int addr
, int reg
)
121 struct mvsw61xx_state
*state
= get_state(dev
);
123 return r16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
);
127 sw16(struct switch_dev
*dev
, int addr
, int reg
, u16 val
)
129 struct mvsw61xx_state
*state
= get_state(dev
);
131 w16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
, val
);
135 mvsw61xx_wait_mask_s(struct switch_dev
*dev
, int addr
,
136 int reg
, u16 mask
, u16 val
)
142 r
= sr16(dev
, addr
, reg
) & mask
;
151 mvsw61xx_get_port_mask(struct switch_dev
*dev
,
152 const struct switch_attr
*attr
, struct switch_val
*val
)
154 struct mvsw61xx_state
*state
= get_state(dev
);
155 char *buf
= state
->buf
;
159 port
= val
->port_vlan
;
160 reg
= sr16(dev
, MV_PORTREG(VLANMAP
, port
)) & MV_PORTS_MASK
;
162 len
= sprintf(buf
, "0x%04x: ", reg
);
164 for (i
= 0; i
< MV_PORTS
; i
++) {
166 len
+= sprintf(buf
+ len
, "%d ", i
);
168 len
+= sprintf(buf
+ len
, "(%d) ", i
);
177 mvsw61xx_get_port_qmode(struct switch_dev
*dev
,
178 const struct switch_attr
*attr
, struct switch_val
*val
)
180 struct mvsw61xx_state
*state
= get_state(dev
);
182 val
->value
.i
= state
->ports
[val
->port_vlan
].qmode
;
188 mvsw61xx_set_port_qmode(struct switch_dev
*dev
,
189 const struct switch_attr
*attr
, struct switch_val
*val
)
191 struct mvsw61xx_state
*state
= get_state(dev
);
193 state
->ports
[val
->port_vlan
].qmode
= val
->value
.i
;
199 mvsw61xx_get_pvid(struct switch_dev
*dev
, int port
, int *val
)
201 struct mvsw61xx_state
*state
= get_state(dev
);
203 *val
= state
->ports
[port
].pvid
;
209 mvsw61xx_set_pvid(struct switch_dev
*dev
, int port
, int val
)
211 struct mvsw61xx_state
*state
= get_state(dev
);
213 if (val
< 0 || val
>= MV_VLANS
)
216 state
->ports
[port
].pvid
= (u16
)val
;
222 mvsw61xx_get_port_link(struct switch_dev
*dev
, int port
,
223 struct switch_port_link
*link
)
227 status
= sr16(dev
, MV_PORTREG(STATUS
, port
));
229 link
->link
= status
& MV_PORT_STATUS_LINK
;
233 link
->duplex
= status
& MV_PORT_STATUS_FDX
;
235 speed
= (status
& MV_PORT_STATUS_SPEED_MASK
) >>
236 MV_PORT_STATUS_SPEED_SHIFT
;
239 case MV_PORT_STATUS_SPEED_10
:
240 link
->speed
= SWITCH_PORT_SPEED_10
;
242 case MV_PORT_STATUS_SPEED_100
:
243 link
->speed
= SWITCH_PORT_SPEED_100
;
245 case MV_PORT_STATUS_SPEED_1000
:
246 link
->speed
= SWITCH_PORT_SPEED_1000
;
253 static int mvsw61xx_get_vlan_ports(struct switch_dev
*dev
,
254 struct switch_val
*val
)
256 struct mvsw61xx_state
*state
= get_state(dev
);
259 vno
= val
->port_vlan
;
261 if (vno
<= 0 || vno
>= dev
->vlans
)
264 for (i
= 0, j
= 0; i
< dev
->ports
; i
++) {
265 if (state
->vlans
[vno
].mask
& (1 << i
)) {
266 val
->value
.ports
[j
].id
= i
;
268 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
269 if (mode
== MV_VTUCTL_EGRESS_TAGGED
)
270 val
->value
.ports
[j
].flags
=
271 (1 << SWITCH_PORT_FLAG_TAGGED
);
273 val
->value
.ports
[j
].flags
= 0;
284 static int mvsw61xx_set_vlan_ports(struct switch_dev
*dev
,
285 struct switch_val
*val
)
287 struct mvsw61xx_state
*state
= get_state(dev
);
288 int i
, mode
, pno
, vno
;
290 vno
= val
->port_vlan
;
292 if (vno
<= 0 || vno
>= dev
->vlans
)
295 state
->vlans
[vno
].mask
= 0;
296 state
->vlans
[vno
].port_mode
= 0;
297 state
->vlans
[vno
].port_sstate
= 0;
299 if(state
->vlans
[vno
].vid
== 0)
300 state
->vlans
[vno
].vid
= vno
;
302 for (i
= 0; i
< val
->len
; i
++) {
303 pno
= val
->value
.ports
[i
].id
;
305 state
->vlans
[vno
].mask
|= (1 << pno
);
306 if (val
->value
.ports
[i
].flags
&
307 (1 << SWITCH_PORT_FLAG_TAGGED
))
308 mode
= MV_VTUCTL_EGRESS_TAGGED
;
310 mode
= MV_VTUCTL_EGRESS_UNTAGGED
;
312 state
->vlans
[vno
].port_mode
|= mode
<< (pno
* 4);
313 state
->vlans
[vno
].port_sstate
|=
314 MV_STUCTL_STATE_FORWARDING
<< (pno
* 4 + 2);
318 * DISCARD is nonzero, so it must be explicitly
319 * set on ports not in the VLAN.
321 for (i
= 0; i
< dev
->ports
; i
++)
322 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
323 state
->vlans
[vno
].port_mode
|=
324 MV_VTUCTL_DISCARD
<< (i
* 4);
329 static int mvsw61xx_get_vlan_port_based(struct switch_dev
*dev
,
330 const struct switch_attr
*attr
, struct switch_val
*val
)
332 struct mvsw61xx_state
*state
= get_state(dev
);
333 int vno
= val
->port_vlan
;
335 if (vno
<= 0 || vno
>= dev
->vlans
)
338 if (state
->vlans
[vno
].port_based
)
346 static int mvsw61xx_set_vlan_port_based(struct switch_dev
*dev
,
347 const struct switch_attr
*attr
, struct switch_val
*val
)
349 struct mvsw61xx_state
*state
= get_state(dev
);
350 int vno
= val
->port_vlan
;
352 if (vno
<= 0 || vno
>= dev
->vlans
)
355 if (val
->value
.i
== 1)
356 state
->vlans
[vno
].port_based
= true;
358 state
->vlans
[vno
].port_based
= false;
363 static int mvsw61xx_get_vid(struct switch_dev
*dev
,
364 const struct switch_attr
*attr
, struct switch_val
*val
)
366 struct mvsw61xx_state
*state
= get_state(dev
);
367 int vno
= val
->port_vlan
;
369 if (vno
<= 0 || vno
>= dev
->vlans
)
372 val
->value
.i
= state
->vlans
[vno
].vid
;
377 static int mvsw61xx_set_vid(struct switch_dev
*dev
,
378 const struct switch_attr
*attr
, struct switch_val
*val
)
380 struct mvsw61xx_state
*state
= get_state(dev
);
381 int vno
= val
->port_vlan
;
383 if (vno
<= 0 || vno
>= dev
->vlans
)
386 state
->vlans
[vno
].vid
= val
->value
.i
;
391 static int mvsw61xx_get_enable_vlan(struct switch_dev
*dev
,
392 const struct switch_attr
*attr
, struct switch_val
*val
)
394 struct mvsw61xx_state
*state
= get_state(dev
);
396 val
->value
.i
= state
->vlan_enabled
;
401 static int mvsw61xx_set_enable_vlan(struct switch_dev
*dev
,
402 const struct switch_attr
*attr
, struct switch_val
*val
)
404 struct mvsw61xx_state
*state
= get_state(dev
);
406 state
->vlan_enabled
= val
->value
.i
;
411 static int mvsw61xx_vtu_program(struct switch_dev
*dev
)
413 struct mvsw61xx_state
*state
= get_state(dev
);
418 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
419 MV_VTUOP_INPROGRESS
, 0);
420 sw16(dev
, MV_GLOBALREG(VTU_OP
),
421 MV_VTUOP_INPROGRESS
| MV_VTUOP_PURGE
);
423 /* Write VLAN table */
424 for (i
= 1; i
< dev
->vlans
; i
++) {
425 if (state
->vlans
[i
].mask
== 0 ||
426 state
->vlans
[i
].vid
== 0 ||
427 state
->vlans
[i
].port_based
== true)
430 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
431 MV_VTUOP_INPROGRESS
, 0);
433 /* Write per-VLAN port state into STU */
434 s1
= (u16
) (state
->vlans
[i
].port_sstate
& 0xffff);
435 s2
= (u16
) ((state
->vlans
[i
].port_sstate
>> 16) & 0xffff);
437 sw16(dev
, MV_GLOBALREG(VTU_VID
), MV_VTU_VID_VALID
);
438 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
439 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), s1
);
440 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), s2
);
441 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
443 sw16(dev
, MV_GLOBALREG(VTU_OP
),
444 MV_VTUOP_INPROGRESS
| MV_VTUOP_STULOAD
);
445 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
446 MV_VTUOP_INPROGRESS
, 0);
448 /* Write VLAN information into VTU */
449 v1
= (u16
) (state
->vlans
[i
].port_mode
& 0xffff);
450 v2
= (u16
) ((state
->vlans
[i
].port_mode
>> 16) & 0xffff);
452 sw16(dev
, MV_GLOBALREG(VTU_VID
),
453 MV_VTU_VID_VALID
| state
->vlans
[i
].vid
);
454 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
455 sw16(dev
, MV_GLOBALREG(VTU_FID
), i
);
456 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), v1
);
457 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), v2
);
458 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
460 sw16(dev
, MV_GLOBALREG(VTU_OP
),
461 MV_VTUOP_INPROGRESS
| MV_VTUOP_LOAD
);
462 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
463 MV_VTUOP_INPROGRESS
, 0);
469 static void mvsw61xx_vlan_port_config(struct switch_dev
*dev
, int vno
)
471 struct mvsw61xx_state
*state
= get_state(dev
);
474 for (i
= 0; i
< dev
->ports
; i
++) {
475 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
478 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
480 if(mode
!= MV_VTUCTL_EGRESS_TAGGED
)
481 state
->ports
[i
].pvid
= state
->vlans
[vno
].vid
;
483 if (state
->vlans
[vno
].port_based
) {
484 state
->ports
[i
].mask
|= state
->vlans
[vno
].mask
;
485 state
->ports
[i
].fdb
= vno
;
488 state
->ports
[i
].qmode
= MV_8021Q_MODE_SECURE
;
492 static int mvsw61xx_update_state(struct switch_dev
*dev
)
494 struct mvsw61xx_state
*state
= get_state(dev
);
498 if (!state
->registered
)
502 * Set 802.1q-only mode if vlan_enabled is true.
504 * Without this, even if 802.1q is enabled for
505 * a port/VLAN, it still depends on the port-based
506 * VLAN mask being set.
508 * With this setting, port-based VLANs are still
509 * functional, provided the VID is not in the VTU.
511 reg
= sr16(dev
, MV_GLOBAL2REG(SDET_POLARITY
));
513 if (state
->vlan_enabled
)
514 reg
|= MV_8021Q_VLAN_ONLY
;
516 reg
&= ~MV_8021Q_VLAN_ONLY
;
518 sw16(dev
, MV_GLOBAL2REG(SDET_POLARITY
), reg
);
521 * Set port-based VLAN masks on each port
522 * based only on VLAN definitions known to
523 * the driver (i.e. in state).
525 * This means any pre-existing port mapping is
526 * wiped out once our driver is initialized.
528 for (i
= 0; i
< dev
->ports
; i
++) {
529 state
->ports
[i
].mask
= 0;
530 state
->ports
[i
].qmode
= MV_8021Q_MODE_DISABLE
;
533 for (i
= 0; i
< dev
->vlans
; i
++)
534 mvsw61xx_vlan_port_config(dev
, i
);
536 for (i
= 0; i
< dev
->ports
; i
++) {
537 reg
= sr16(dev
, MV_PORTREG(VLANID
, i
)) & ~MV_PVID_MASK
;
538 reg
|= state
->ports
[i
].pvid
;
539 sw16(dev
, MV_PORTREG(VLANID
, i
), reg
);
541 state
->ports
[i
].mask
&= ~(1 << i
);
543 /* set default forwarding DB number and port mask */
544 reg
= sr16(dev
, MV_PORTREG(CONTROL1
, i
)) & ~MV_FDB_HI_MASK
;
545 reg
|= (state
->ports
[i
].fdb
>> MV_FDB_HI_SHIFT
) &
547 sw16(dev
, MV_PORTREG(CONTROL1
, i
), reg
);
549 reg
= ((state
->ports
[i
].fdb
& 0xf) << MV_FDB_LO_SHIFT
) |
550 state
->ports
[i
].mask
;
551 sw16(dev
, MV_PORTREG(VLANMAP
, i
), reg
);
553 reg
= sr16(dev
, MV_PORTREG(CONTROL2
, i
)) &
555 reg
|= state
->ports
[i
].qmode
<< MV_8021Q_MODE_SHIFT
;
556 sw16(dev
, MV_PORTREG(CONTROL2
, i
), reg
);
559 mvsw61xx_vtu_program(dev
);
564 static int mvsw61xx_apply(struct switch_dev
*dev
)
566 return mvsw61xx_update_state(dev
);
569 static int mvsw61xx_reset(struct switch_dev
*dev
)
571 struct mvsw61xx_state
*state
= get_state(dev
);
575 /* Disable all ports before reset */
576 for (i
= 0; i
< dev
->ports
; i
++) {
577 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) &
578 ~MV_PORTCTRL_FORWARDING
;
579 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
582 reg
= sr16(dev
, MV_GLOBALREG(CONTROL
)) | MV_CONTROL_RESET
;
584 sw16(dev
, MV_GLOBALREG(CONTROL
), reg
);
585 if (mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(CONTROL
),
586 MV_CONTROL_RESET
, 0) < 0)
589 for (i
= 0; i
< dev
->ports
; i
++) {
590 state
->ports
[i
].fdb
= 0;
591 state
->ports
[i
].qmode
= 0;
592 state
->ports
[i
].mask
= 0;
593 state
->ports
[i
].pvid
= 0;
595 /* Force flow control off */
596 reg
= sr16(dev
, MV_PORTREG(PHYCTL
, i
)) & ~MV_PHYCTL_FC_MASK
;
597 reg
|= MV_PHYCTL_FC_DISABLE
;
598 sw16(dev
, MV_PORTREG(PHYCTL
, i
), reg
);
600 /* Set port association vector */
601 sw16(dev
, MV_PORTREG(ASSOC
, i
), (1 << i
));
604 for (i
= 0; i
< dev
->vlans
; i
++) {
605 state
->vlans
[i
].port_based
= false;
606 state
->vlans
[i
].mask
= 0;
607 state
->vlans
[i
].vid
= 0;
608 state
->vlans
[i
].port_mode
= 0;
609 state
->vlans
[i
].port_sstate
= 0;
612 state
->vlan_enabled
= 0;
614 mvsw61xx_update_state(dev
);
616 /* Re-enable ports */
617 for (i
= 0; i
< dev
->ports
; i
++) {
618 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) |
619 MV_PORTCTRL_FORWARDING
;
620 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
627 MVSW61XX_ENABLE_VLAN
,
631 MVSW61XX_VLAN_PORT_BASED
,
640 static const struct switch_attr mvsw61xx_global
[] = {
641 [MVSW61XX_ENABLE_VLAN
] = {
642 .id
= MVSW61XX_ENABLE_VLAN
,
643 .type
= SWITCH_TYPE_INT
,
644 .name
= "enable_vlan",
645 .description
= "Enable 802.1q VLAN support",
646 .get
= mvsw61xx_get_enable_vlan
,
647 .set
= mvsw61xx_set_enable_vlan
,
651 static const struct switch_attr mvsw61xx_vlan
[] = {
652 [MVSW61XX_VLAN_PORT_BASED
] = {
653 .id
= MVSW61XX_VLAN_PORT_BASED
,
654 .type
= SWITCH_TYPE_INT
,
655 .name
= "port_based",
656 .description
= "Use port-based (non-802.1q) VLAN only",
657 .get
= mvsw61xx_get_vlan_port_based
,
658 .set
= mvsw61xx_set_vlan_port_based
,
660 [MVSW61XX_VLAN_ID
] = {
661 .id
= MVSW61XX_VLAN_ID
,
662 .type
= SWITCH_TYPE_INT
,
664 .description
= "Get/set VLAN ID",
665 .get
= mvsw61xx_get_vid
,
666 .set
= mvsw61xx_set_vid
,
670 static const struct switch_attr mvsw61xx_port
[] = {
671 [MVSW61XX_PORT_MASK
] = {
672 .id
= MVSW61XX_PORT_MASK
,
673 .type
= SWITCH_TYPE_STRING
,
674 .description
= "Port-based VLAN mask",
676 .get
= mvsw61xx_get_port_mask
,
679 [MVSW61XX_PORT_QMODE
] = {
680 .id
= MVSW61XX_PORT_QMODE
,
681 .type
= SWITCH_TYPE_INT
,
682 .description
= "802.1q mode: 0=off/1=fallback/2=check/3=secure",
684 .get
= mvsw61xx_get_port_qmode
,
685 .set
= mvsw61xx_set_port_qmode
,
689 static const struct switch_dev_ops mvsw61xx_ops
= {
691 .attr
= mvsw61xx_global
,
692 .n_attr
= ARRAY_SIZE(mvsw61xx_global
),
695 .attr
= mvsw61xx_vlan
,
696 .n_attr
= ARRAY_SIZE(mvsw61xx_vlan
),
699 .attr
= mvsw61xx_port
,
700 .n_attr
= ARRAY_SIZE(mvsw61xx_port
),
702 .get_port_link
= mvsw61xx_get_port_link
,
703 .get_port_pvid
= mvsw61xx_get_pvid
,
704 .set_port_pvid
= mvsw61xx_set_pvid
,
705 .get_vlan_ports
= mvsw61xx_get_vlan_ports
,
706 .set_vlan_ports
= mvsw61xx_set_vlan_ports
,
707 .apply_config
= mvsw61xx_apply
,
708 .reset_switch
= mvsw61xx_reset
,
711 /* end swconfig stuff */
713 static int mvsw61xx_probe(struct platform_device
*pdev
)
715 struct mvsw61xx_state
*state
;
716 struct device_node
*np
= pdev
->dev
.of_node
;
717 struct device_node
*mdio
;
722 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
726 mdio
= of_parse_phandle(np
, "mii-bus", 0);
728 dev_err(&pdev
->dev
, "Couldn't get MII bus handle\n");
733 state
->bus
= of_mdio_find_bus(mdio
);
735 dev_err(&pdev
->dev
, "Couldn't find MII bus from handle\n");
740 state
->is_indirect
= of_property_read_bool(np
, "is-indirect");
742 if (state
->is_indirect
) {
743 if (of_property_read_u32(np
, "reg", &val
)) {
744 dev_err(&pdev
->dev
, "Switch address not specified\n");
749 state
->base_addr
= val
;
751 state
->base_addr
= MV_BASE
;
754 state
->model
= r16(state
->bus
, state
->is_indirect
, state
->base_addr
,
755 MV_PORTREG(IDENT
, 0)) & MV_IDENT_MASK
;
757 switch(state
->model
) {
758 case MV_IDENT_VALUE_6171
:
759 model_str
= MV_IDENT_STR_6171
;
761 case MV_IDENT_VALUE_6172
:
762 model_str
= MV_IDENT_STR_6172
;
764 case MV_IDENT_VALUE_6176
:
765 model_str
= MV_IDENT_STR_6176
;
768 dev_err(&pdev
->dev
, "No compatible switch found at 0x%02x\n",
774 platform_set_drvdata(pdev
, state
);
775 dev_info(&pdev
->dev
, "Found %s at %s:%02x\n", model_str
,
776 state
->bus
->id
, state
->base_addr
);
778 dev_info(&pdev
->dev
, "Using %sdirect addressing\n",
779 (state
->is_indirect
? "in" : ""));
781 if (of_property_read_u32(np
, "cpu-port-0", &val
)) {
782 dev_err(&pdev
->dev
, "CPU port not set\n");
787 state
->cpu_port0
= val
;
789 if (!of_property_read_u32(np
, "cpu-port-1", &val
))
790 state
->cpu_port1
= val
;
792 state
->cpu_port1
= -1;
794 state
->dev
.vlans
= MV_VLANS
;
795 state
->dev
.cpu_port
= state
->cpu_port0
;
796 state
->dev
.ports
= MV_PORTS
;
797 state
->dev
.name
= model_str
;
798 state
->dev
.ops
= &mvsw61xx_ops
;
799 state
->dev
.alias
= dev_name(&pdev
->dev
);
801 err
= register_switch(&state
->dev
, NULL
);
805 state
->registered
= true;
814 mvsw61xx_remove(struct platform_device
*pdev
)
816 struct mvsw61xx_state
*state
= platform_get_drvdata(pdev
);
818 if (state
->registered
)
819 unregister_switch(&state
->dev
);
826 static const struct of_device_id mvsw61xx_match
[] = {
827 { .compatible
= "marvell,88e6171" },
828 { .compatible
= "marvell,88e6172" },
829 { .compatible
= "marvell,88e6176" },
832 MODULE_DEVICE_TABLE(of
, mvsw61xx_match
);
834 static struct platform_driver mvsw61xx_driver
= {
835 .probe
= mvsw61xx_probe
,
836 .remove
= mvsw61xx_remove
,
839 .of_match_table
= of_match_ptr(mvsw61xx_match
),
840 .owner
= THIS_MODULE
,
844 static int __init
mvsw61xx_module_init(void)
846 return platform_driver_register(&mvsw61xx_driver
);
848 late_initcall(mvsw61xx_module_init
);
850 static void __exit
mvsw61xx_module_exit(void)
852 platform_driver_unregister(&mvsw61xx_driver
);
854 module_exit(mvsw61xx_module_exit
);