2 * Marvell 88E61xx switch driver
4 * Copyright (c) 2014 Claudio Leite <leitec@staticky.com>
5 * Copyright (c) 2014 Nikita Nazarenko <nnazarenko@radiofid.com>
7 * Based on code (c) 2008 Felix Fietkau <nbd@openwrt.org>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License v2 as published by the
11 * Free Software Foundation
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/list.h>
18 #include <linux/mii.h>
19 #include <linux/phy.h>
21 #include <linux/of_mdio.h>
22 #include <linux/delay.h>
23 #include <linux/switch.h>
24 #include <linux/device.h>
25 #include <linux/platform_device.h>
29 MODULE_DESCRIPTION("Marvell 88E61xx Switch driver");
30 MODULE_AUTHOR("Claudio Leite <leitec@staticky.com>");
31 MODULE_AUTHOR("Nikita Nazarenko <nnazarenko@radiofid.com>");
32 MODULE_LICENSE("GPL v2");
33 MODULE_ALIAS("platform:mvsw61xx");
36 * Register access is done through direct or indirect addressing,
37 * depending on how the switch is physically connected.
39 * Direct addressing: all port and global registers directly
40 * accessible via an address/register pair
42 * Indirect addressing: switch is mapped at a single address,
43 * port and global registers accessible via a single command/data
48 mvsw61xx_wait_mask_raw(struct mii_bus
*bus
, int addr
,
49 int reg
, u16 mask
, u16 val
)
55 r
= bus
->read(bus
, addr
, reg
);
56 if ((r
& mask
) == val
)
64 r16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
, int reg
)
69 return bus
->read(bus
, addr
, reg
);
71 /* Indirect read: First, make sure switch is free */
72 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
73 MV_INDIRECT_INPROGRESS
, 0);
75 /* Load address and request read */
76 ind_addr
= MV_INDIRECT_READ
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
77 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
80 /* Wait until it's ready */
81 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
82 MV_INDIRECT_INPROGRESS
, 0);
84 /* Read the requested data */
85 return bus
->read(bus
, base_addr
, MV_INDIRECT_REG_DATA
);
89 w16(struct mii_bus
*bus
, bool indirect
, int base_addr
, int addr
,
95 bus
->write(bus
, addr
, reg
, val
);
99 /* Indirect write: First, make sure switch is free */
100 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
101 MV_INDIRECT_INPROGRESS
, 0);
103 /* Load the data to be written */
104 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_DATA
, val
);
106 /* Wait again for switch to be free */
107 mvsw61xx_wait_mask_raw(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
108 MV_INDIRECT_INPROGRESS
, 0);
110 /* Load address, and issue write command */
111 ind_addr
= MV_INDIRECT_WRITE
| (addr
<< MV_INDIRECT_ADDR_S
) | reg
;
112 bus
->write(bus
, base_addr
, MV_INDIRECT_REG_CMD
,
116 /* swconfig support */
119 sr16(struct switch_dev
*dev
, int addr
, int reg
)
121 struct mvsw61xx_state
*state
= get_state(dev
);
123 return r16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
);
127 sw16(struct switch_dev
*dev
, int addr
, int reg
, u16 val
)
129 struct mvsw61xx_state
*state
= get_state(dev
);
131 w16(state
->bus
, state
->is_indirect
, state
->base_addr
, addr
, reg
, val
);
135 mvsw61xx_wait_mask_s(struct switch_dev
*dev
, int addr
,
136 int reg
, u16 mask
, u16 val
)
142 r
= sr16(dev
, addr
, reg
) & mask
;
151 mvsw61xx_get_port_mask(struct switch_dev
*dev
,
152 const struct switch_attr
*attr
, struct switch_val
*val
)
154 struct mvsw61xx_state
*state
= get_state(dev
);
155 char *buf
= state
->buf
;
159 port
= val
->port_vlan
;
160 reg
= sr16(dev
, MV_PORTREG(VLANMAP
, port
)) & MV_PORTS_MASK
;
162 len
= sprintf(buf
, "0x%04x: ", reg
);
164 for (i
= 0; i
< MV_PORTS
; i
++) {
166 len
+= sprintf(buf
+ len
, "%d ", i
);
168 len
+= sprintf(buf
+ len
, "(%d) ", i
);
177 mvsw61xx_get_port_qmode(struct switch_dev
*dev
,
178 const struct switch_attr
*attr
, struct switch_val
*val
)
180 struct mvsw61xx_state
*state
= get_state(dev
);
182 val
->value
.i
= state
->ports
[val
->port_vlan
].qmode
;
188 mvsw61xx_set_port_qmode(struct switch_dev
*dev
,
189 const struct switch_attr
*attr
, struct switch_val
*val
)
191 struct mvsw61xx_state
*state
= get_state(dev
);
193 state
->ports
[val
->port_vlan
].qmode
= val
->value
.i
;
199 mvsw61xx_get_pvid(struct switch_dev
*dev
, int port
, int *val
)
201 struct mvsw61xx_state
*state
= get_state(dev
);
203 *val
= state
->ports
[port
].pvid
;
209 mvsw61xx_set_pvid(struct switch_dev
*dev
, int port
, int val
)
211 struct mvsw61xx_state
*state
= get_state(dev
);
213 if (val
< 0 || val
>= MV_VLANS
)
216 state
->ports
[port
].pvid
= (u16
)val
;
222 mvsw61xx_get_port_status(struct switch_dev
*dev
,
223 const struct switch_attr
*attr
, struct switch_val
*val
)
225 struct mvsw61xx_state
*state
= get_state(dev
);
226 char *buf
= state
->buf
;
230 status
= sr16(dev
, MV_PORTREG(STATUS
, val
->port_vlan
));
231 speed
= (status
& MV_PORT_STATUS_SPEED_MASK
) >>
232 MV_PORT_STATUS_SPEED_SHIFT
;
234 len
= sprintf(buf
, "link: ");
235 if (status
& MV_PORT_STATUS_LINK
) {
236 len
+= sprintf(buf
+ len
, "up, speed: ");
239 case MV_PORT_STATUS_SPEED_10
:
240 len
+= sprintf(buf
+ len
, "10");
242 case MV_PORT_STATUS_SPEED_100
:
243 len
+= sprintf(buf
+ len
, "100");
245 case MV_PORT_STATUS_SPEED_1000
:
246 len
+= sprintf(buf
+ len
, "1000");
250 len
+= sprintf(buf
+ len
, " Mbps, duplex: ");
252 if (status
& MV_PORT_STATUS_FDX
)
253 len
+= sprintf(buf
+ len
, "full");
255 len
+= sprintf(buf
+ len
, "half");
257 len
+= sprintf(buf
+ len
, "down");
266 mvsw61xx_get_port_speed(struct switch_dev
*dev
,
267 const struct switch_attr
*attr
, struct switch_val
*val
)
271 status
= sr16(dev
, MV_PORTREG(STATUS
, val
->port_vlan
));
272 speed
= (status
& MV_PORT_STATUS_SPEED_MASK
) >>
273 MV_PORT_STATUS_SPEED_SHIFT
;
277 if (status
& MV_PORT_STATUS_LINK
) {
279 case MV_PORT_STATUS_SPEED_10
:
282 case MV_PORT_STATUS_SPEED_100
:
285 case MV_PORT_STATUS_SPEED_1000
:
294 static int mvsw61xx_get_vlan_ports(struct switch_dev
*dev
,
295 struct switch_val
*val
)
297 struct mvsw61xx_state
*state
= get_state(dev
);
300 vno
= val
->port_vlan
;
302 if (vno
<= 0 || vno
>= dev
->vlans
)
305 for (i
= 0, j
= 0; i
< dev
->ports
; i
++) {
306 if (state
->vlans
[vno
].mask
& (1 << i
)) {
307 val
->value
.ports
[j
].id
= i
;
309 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
310 if (mode
== MV_VTUCTL_EGRESS_TAGGED
)
311 val
->value
.ports
[j
].flags
=
312 (1 << SWITCH_PORT_FLAG_TAGGED
);
314 val
->value
.ports
[j
].flags
= 0;
325 static int mvsw61xx_set_vlan_ports(struct switch_dev
*dev
,
326 struct switch_val
*val
)
328 struct mvsw61xx_state
*state
= get_state(dev
);
329 int i
, mode
, pno
, vno
;
331 vno
= val
->port_vlan
;
333 if (vno
<= 0 || vno
>= dev
->vlans
)
336 state
->vlans
[vno
].mask
= 0;
337 state
->vlans
[vno
].port_mode
= 0;
338 state
->vlans
[vno
].port_sstate
= 0;
340 if(state
->vlans
[vno
].vid
== 0)
341 state
->vlans
[vno
].vid
= vno
;
343 for (i
= 0; i
< val
->len
; i
++) {
344 pno
= val
->value
.ports
[i
].id
;
346 state
->vlans
[vno
].mask
|= (1 << pno
);
347 if (val
->value
.ports
[i
].flags
&
348 (1 << SWITCH_PORT_FLAG_TAGGED
))
349 mode
= MV_VTUCTL_EGRESS_TAGGED
;
351 mode
= MV_VTUCTL_EGRESS_UNTAGGED
;
353 state
->vlans
[vno
].port_mode
|= mode
<< (pno
* 4);
354 state
->vlans
[vno
].port_sstate
|=
355 MV_STUCTL_STATE_FORWARDING
<< (pno
* 4 + 2);
359 * DISCARD is nonzero, so it must be explicitly
360 * set on ports not in the VLAN.
362 for (i
= 0; i
< dev
->ports
; i
++)
363 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
364 state
->vlans
[vno
].port_mode
|=
365 MV_VTUCTL_DISCARD
<< (i
* 4);
370 static int mvsw61xx_get_vlan_port_based(struct switch_dev
*dev
,
371 const struct switch_attr
*attr
, struct switch_val
*val
)
373 struct mvsw61xx_state
*state
= get_state(dev
);
374 int vno
= val
->port_vlan
;
376 if (vno
<= 0 || vno
>= dev
->vlans
)
379 if (state
->vlans
[vno
].port_based
)
387 static int mvsw61xx_set_vlan_port_based(struct switch_dev
*dev
,
388 const struct switch_attr
*attr
, struct switch_val
*val
)
390 struct mvsw61xx_state
*state
= get_state(dev
);
391 int vno
= val
->port_vlan
;
393 if (vno
<= 0 || vno
>= dev
->vlans
)
396 if (val
->value
.i
== 1)
397 state
->vlans
[vno
].port_based
= true;
399 state
->vlans
[vno
].port_based
= false;
404 static int mvsw61xx_get_vid(struct switch_dev
*dev
,
405 const struct switch_attr
*attr
, struct switch_val
*val
)
407 struct mvsw61xx_state
*state
= get_state(dev
);
408 int vno
= val
->port_vlan
;
410 if (vno
<= 0 || vno
>= dev
->vlans
)
413 val
->value
.i
= state
->vlans
[vno
].vid
;
418 static int mvsw61xx_set_vid(struct switch_dev
*dev
,
419 const struct switch_attr
*attr
, struct switch_val
*val
)
421 struct mvsw61xx_state
*state
= get_state(dev
);
422 int vno
= val
->port_vlan
;
424 if (vno
<= 0 || vno
>= dev
->vlans
)
427 state
->vlans
[vno
].vid
= val
->value
.i
;
432 static int mvsw61xx_get_enable_vlan(struct switch_dev
*dev
,
433 const struct switch_attr
*attr
, struct switch_val
*val
)
435 struct mvsw61xx_state
*state
= get_state(dev
);
437 val
->value
.i
= state
->vlan_enabled
;
442 static int mvsw61xx_set_enable_vlan(struct switch_dev
*dev
,
443 const struct switch_attr
*attr
, struct switch_val
*val
)
445 struct mvsw61xx_state
*state
= get_state(dev
);
447 state
->vlan_enabled
= val
->value
.i
;
452 static int mvsw61xx_vtu_program(struct switch_dev
*dev
)
454 struct mvsw61xx_state
*state
= get_state(dev
);
459 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
460 MV_VTUOP_INPROGRESS
, 0);
461 sw16(dev
, MV_GLOBALREG(VTU_OP
),
462 MV_VTUOP_INPROGRESS
| MV_VTUOP_PURGE
);
464 /* Write VLAN table */
465 for (i
= 1; i
< dev
->vlans
; i
++) {
466 if (state
->vlans
[i
].mask
== 0 ||
467 state
->vlans
[i
].vid
== 0 ||
468 state
->vlans
[i
].port_based
== true)
471 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
472 MV_VTUOP_INPROGRESS
, 0);
474 /* Write per-VLAN port state into STU */
475 s1
= (u16
) (state
->vlans
[i
].port_sstate
& 0xffff);
476 s2
= (u16
) ((state
->vlans
[i
].port_sstate
>> 16) & 0xffff);
478 sw16(dev
, MV_GLOBALREG(VTU_VID
), MV_VTU_VID_VALID
);
479 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
480 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), s1
);
481 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), s2
);
482 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
484 sw16(dev
, MV_GLOBALREG(VTU_OP
),
485 MV_VTUOP_INPROGRESS
| MV_VTUOP_STULOAD
);
486 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
487 MV_VTUOP_INPROGRESS
, 0);
489 /* Write VLAN information into VTU */
490 v1
= (u16
) (state
->vlans
[i
].port_mode
& 0xffff);
491 v2
= (u16
) ((state
->vlans
[i
].port_mode
>> 16) & 0xffff);
493 sw16(dev
, MV_GLOBALREG(VTU_VID
),
494 MV_VTU_VID_VALID
| state
->vlans
[i
].vid
);
495 sw16(dev
, MV_GLOBALREG(VTU_SID
), i
);
496 sw16(dev
, MV_GLOBALREG(VTU_FID
), 0);
497 sw16(dev
, MV_GLOBALREG(VTU_DATA1
), v1
);
498 sw16(dev
, MV_GLOBALREG(VTU_DATA2
), v2
);
499 sw16(dev
, MV_GLOBALREG(VTU_DATA3
), 0);
501 sw16(dev
, MV_GLOBALREG(VTU_OP
),
502 MV_VTUOP_INPROGRESS
| MV_VTUOP_LOAD
);
503 mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(VTU_OP
),
504 MV_VTUOP_INPROGRESS
, 0);
510 static void mvsw61xx_vlan_port_config(struct switch_dev
*dev
, int vno
)
512 struct mvsw61xx_state
*state
= get_state(dev
);
515 for (i
= 0; i
< dev
->ports
; i
++) {
516 if (!(state
->vlans
[vno
].mask
& (1 << i
)))
519 mode
= (state
->vlans
[vno
].port_mode
>> (i
* 4)) & 0xf;
521 if(mode
!= MV_VTUCTL_EGRESS_TAGGED
)
522 state
->ports
[i
].pvid
= state
->vlans
[vno
].vid
;
524 if (state
->vlans
[vno
].port_based
)
525 state
->ports
[i
].mask
|= state
->vlans
[vno
].mask
;
527 state
->ports
[i
].qmode
= MV_8021Q_MODE_SECURE
;
531 static int mvsw61xx_update_state(struct switch_dev
*dev
)
533 struct mvsw61xx_state
*state
= get_state(dev
);
537 if (!state
->registered
)
541 * Set 802.1q-only mode if vlan_enabled is true.
543 * Without this, even if 802.1q is enabled for
544 * a port/VLAN, it still depends on the port-based
545 * VLAN mask being set.
547 * With this setting, port-based VLANs are still
548 * functional, provided the VID is not in the VTU.
550 reg
= sr16(dev
, MV_GLOBAL2REG(SDET_POLARITY
));
552 if (state
->vlan_enabled
)
553 reg
|= MV_8021Q_VLAN_ONLY
;
555 reg
&= ~MV_8021Q_VLAN_ONLY
;
557 sw16(dev
, MV_GLOBAL2REG(SDET_POLARITY
), reg
);
560 * Set port-based VLAN masks on each port
561 * based only on VLAN definitions known to
562 * the driver (i.e. in state).
564 * This means any pre-existing port mapping is
565 * wiped out once our driver is initialized.
567 for (i
= 0; i
< dev
->ports
; i
++) {
568 state
->ports
[i
].mask
= 0;
569 state
->ports
[i
].qmode
= MV_8021Q_MODE_DISABLE
;
572 for (i
= 0; i
< dev
->vlans
; i
++)
573 mvsw61xx_vlan_port_config(dev
, i
);
575 for (i
= 0; i
< dev
->ports
; i
++) {
576 reg
= sr16(dev
, MV_PORTREG(VLANID
, i
)) & ~MV_PVID_MASK
;
577 reg
|= state
->ports
[i
].pvid
;
578 sw16(dev
, MV_PORTREG(VLANID
, i
), reg
);
580 state
->ports
[i
].mask
&= ~(1 << i
);
582 reg
= sr16(dev
, MV_PORTREG(VLANMAP
, i
)) & ~MV_PORTS_MASK
;
583 reg
|= state
->ports
[i
].mask
;
584 sw16(dev
, MV_PORTREG(VLANMAP
, i
), reg
);
586 reg
= sr16(dev
, MV_PORTREG(CONTROL2
, i
)) &
588 reg
|= state
->ports
[i
].qmode
<< MV_8021Q_MODE_SHIFT
;
589 sw16(dev
, MV_PORTREG(CONTROL2
, i
), reg
);
592 mvsw61xx_vtu_program(dev
);
597 static int mvsw61xx_apply(struct switch_dev
*dev
)
599 return mvsw61xx_update_state(dev
);
602 static int mvsw61xx_reset(struct switch_dev
*dev
)
604 struct mvsw61xx_state
*state
= get_state(dev
);
608 /* Disable all ports before reset */
609 for (i
= 0; i
< dev
->ports
; i
++) {
610 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) &
611 ~MV_PORTCTRL_FORWARDING
;
612 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
615 reg
= sr16(dev
, MV_GLOBALREG(CONTROL
)) | MV_CONTROL_RESET
;
617 sw16(dev
, MV_GLOBALREG(CONTROL
), reg
);
618 if (mvsw61xx_wait_mask_s(dev
, MV_GLOBALREG(CONTROL
),
619 MV_CONTROL_RESET
, 0) < 0)
622 for (i
= 0; i
< dev
->ports
; i
++) {
623 state
->ports
[i
].qmode
= 0;
624 state
->ports
[i
].mask
= 0;
625 state
->ports
[i
].pvid
= 0;
627 /* Force flow control off */
628 reg
= sr16(dev
, MV_PORTREG(PHYCTL
, i
)) & ~MV_PHYCTL_FC_MASK
;
629 reg
|= MV_PHYCTL_FC_DISABLE
;
630 sw16(dev
, MV_PORTREG(PHYCTL
, i
), reg
);
632 /* Set port association vector */
633 sw16(dev
, MV_PORTREG(ASSOC
, i
), (1 << i
));
636 for (i
= 0; i
< dev
->vlans
; i
++) {
637 state
->vlans
[i
].port_based
= false;
638 state
->vlans
[i
].mask
= 0;
639 state
->vlans
[i
].vid
= 0;
640 state
->vlans
[i
].port_mode
= 0;
641 state
->vlans
[i
].port_sstate
= 0;
644 state
->vlan_enabled
= 0;
646 mvsw61xx_update_state(dev
);
648 /* Re-enable ports */
649 for (i
= 0; i
< dev
->ports
; i
++) {
650 reg
= sr16(dev
, MV_PORTREG(CONTROL
, i
)) |
651 MV_PORTCTRL_FORWARDING
;
652 sw16(dev
, MV_PORTREG(CONTROL
, i
), reg
);
659 MVSW61XX_ENABLE_VLAN
,
663 MVSW61XX_VLAN_PORT_BASED
,
670 MVSW61XX_PORT_STATUS
,
674 static const struct switch_attr mvsw61xx_global
[] = {
675 [MVSW61XX_ENABLE_VLAN
] = {
676 .id
= MVSW61XX_ENABLE_VLAN
,
677 .type
= SWITCH_TYPE_INT
,
678 .name
= "enable_vlan",
679 .description
= "Enable 802.1q VLAN support",
680 .get
= mvsw61xx_get_enable_vlan
,
681 .set
= mvsw61xx_set_enable_vlan
,
685 static const struct switch_attr mvsw61xx_vlan
[] = {
686 [MVSW61XX_VLAN_PORT_BASED
] = {
687 .id
= MVSW61XX_VLAN_PORT_BASED
,
688 .type
= SWITCH_TYPE_INT
,
689 .name
= "port_based",
690 .description
= "Use port-based (non-802.1q) VLAN only",
691 .get
= mvsw61xx_get_vlan_port_based
,
692 .set
= mvsw61xx_set_vlan_port_based
,
694 [MVSW61XX_VLAN_ID
] = {
695 .id
= MVSW61XX_VLAN_ID
,
696 .type
= SWITCH_TYPE_INT
,
698 .description
= "Get/set VLAN ID",
699 .get
= mvsw61xx_get_vid
,
700 .set
= mvsw61xx_set_vid
,
704 static const struct switch_attr mvsw61xx_port
[] = {
705 [MVSW61XX_PORT_MASK
] = {
706 .id
= MVSW61XX_PORT_MASK
,
707 .type
= SWITCH_TYPE_STRING
,
708 .description
= "Port-based VLAN mask",
710 .get
= mvsw61xx_get_port_mask
,
713 [MVSW61XX_PORT_QMODE
] = {
714 .id
= MVSW61XX_PORT_QMODE
,
715 .type
= SWITCH_TYPE_INT
,
716 .description
= "802.1q mode: 0=off/1=fallback/2=check/3=secure",
718 .get
= mvsw61xx_get_port_qmode
,
719 .set
= mvsw61xx_set_port_qmode
,
721 [MVSW61XX_PORT_STATUS
] = {
722 .id
= MVSW61XX_PORT_STATUS
,
723 .type
= SWITCH_TYPE_STRING
,
724 .description
= "Return port status",
726 .get
= mvsw61xx_get_port_status
,
729 [MVSW61XX_PORT_LINK
] = {
730 .id
= MVSW61XX_PORT_LINK
,
731 .type
= SWITCH_TYPE_INT
,
732 .description
= "Get link speed",
734 .get
= mvsw61xx_get_port_speed
,
739 static const struct switch_dev_ops mvsw61xx_ops
= {
741 .attr
= mvsw61xx_global
,
742 .n_attr
= ARRAY_SIZE(mvsw61xx_global
),
745 .attr
= mvsw61xx_vlan
,
746 .n_attr
= ARRAY_SIZE(mvsw61xx_vlan
),
749 .attr
= mvsw61xx_port
,
750 .n_attr
= ARRAY_SIZE(mvsw61xx_port
),
752 .get_port_pvid
= mvsw61xx_get_pvid
,
753 .set_port_pvid
= mvsw61xx_set_pvid
,
754 .get_vlan_ports
= mvsw61xx_get_vlan_ports
,
755 .set_vlan_ports
= mvsw61xx_set_vlan_ports
,
756 .apply_config
= mvsw61xx_apply
,
757 .reset_switch
= mvsw61xx_reset
,
760 /* end swconfig stuff */
762 static int mvsw61xx_probe(struct platform_device
*pdev
)
764 struct mvsw61xx_state
*state
;
765 struct device_node
*np
= pdev
->dev
.of_node
;
766 struct device_node
*mdio
;
771 state
= kzalloc(sizeof(*state
), GFP_KERNEL
);
775 mdio
= of_parse_phandle(np
, "mii-bus", 0);
777 dev_err(&pdev
->dev
, "Couldn't get MII bus handle\n");
782 state
->bus
= of_mdio_find_bus(mdio
);
784 dev_err(&pdev
->dev
, "Couldn't find MII bus from handle\n");
789 state
->is_indirect
= of_property_read_bool(np
, "is-indirect");
791 if (state
->is_indirect
) {
792 if (of_property_read_u32(np
, "reg", &val
)) {
793 dev_err(&pdev
->dev
, "Switch address not specified\n");
798 state
->base_addr
= val
;
800 state
->base_addr
= MV_BASE
;
803 state
->model
= r16(state
->bus
, state
->is_indirect
, state
->base_addr
,
804 MV_PORTREG(IDENT
, 0)) & MV_IDENT_MASK
;
806 switch(state
->model
) {
807 case MV_IDENT_VALUE_6171
:
808 model_str
= MV_IDENT_STR_6171
;
810 case MV_IDENT_VALUE_6172
:
811 model_str
= MV_IDENT_STR_6172
;
813 case MV_IDENT_VALUE_6176
:
814 model_str
= MV_IDENT_STR_6176
;
817 dev_err(&pdev
->dev
, "No compatible switch found at 0x%02x\n",
823 platform_set_drvdata(pdev
, state
);
824 dev_info(&pdev
->dev
, "Found %s at %s:%02x\n", model_str
,
825 state
->bus
->id
, state
->base_addr
);
827 dev_info(&pdev
->dev
, "Using %sdirect addressing\n",
828 (state
->is_indirect
? "in" : ""));
830 if (of_property_read_u32(np
, "cpu-port-0", &val
)) {
831 dev_err(&pdev
->dev
, "CPU port not set\n");
836 state
->cpu_port0
= val
;
838 if (!of_property_read_u32(np
, "cpu-port-1", &val
))
839 state
->cpu_port1
= val
;
841 state
->cpu_port1
= -1;
843 state
->dev
.vlans
= MV_VLANS
;
844 state
->dev
.cpu_port
= state
->cpu_port0
;
845 state
->dev
.ports
= MV_PORTS
;
846 state
->dev
.name
= model_str
;
847 state
->dev
.ops
= &mvsw61xx_ops
;
848 state
->dev
.alias
= dev_name(&pdev
->dev
);
850 err
= register_switch(&state
->dev
, NULL
);
854 state
->registered
= true;
863 mvsw61xx_remove(struct platform_device
*pdev
)
865 struct mvsw61xx_state
*state
= platform_get_drvdata(pdev
);
867 if (state
->registered
)
868 unregister_switch(&state
->dev
);
875 static const struct of_device_id mvsw61xx_match
[] = {
876 { .compatible
= "marvell,88e6171" },
877 { .compatible
= "marvell,88e6172" },
878 { .compatible
= "marvell,88e6176" },
881 MODULE_DEVICE_TABLE(of
, mvsw61xx_match
);
883 static struct platform_driver mvsw61xx_driver
= {
884 .probe
= mvsw61xx_probe
,
885 .remove
= mvsw61xx_remove
,
888 .of_match_table
= of_match_ptr(mvsw61xx_match
),
889 .owner
= THIS_MODULE
,
893 static int __init
mvsw61xx_module_init(void)
895 return platform_driver_register(&mvsw61xx_driver
);
897 late_initcall(mvsw61xx_module_init
);
899 static void __exit
mvsw61xx_module_exit(void)
901 platform_driver_unregister(&mvsw61xx_driver
);
903 module_exit(mvsw61xx_module_exit
);