1 From 2c58080407554e1bac8fd50d23cb02420524caed Mon Sep 17 00:00:00 2001
2 From: Felix Fietkau <nbd@openwrt.org>
3 Date: Mon, 12 Aug 2013 12:50:22 +0200
4 Subject: [PATCH] MIPS: partially inline dma ops
6 Several DMA ops are no-op on many platforms, and the indirection through
7 the mips_dma_map_ops function table is causing the compiler to emit
10 Inlining visibly improves network performance in my tests (on a 24Kc
11 based system), and also slightly reduces code size of a few drivers.
13 Signed-off-by: Felix Fietkau <nbd@openwrt.org>
15 arch/mips/Kconfig | 4 +
16 arch/mips/include/asm/dma-mapping.h | 360 +++++++++++++++++++++++++++++++++++-
17 arch/mips/mm/dma-default.c | 163 ++--------------
18 3 files changed, 373 insertions(+), 154 deletions(-)
20 --- a/arch/mips/Kconfig
21 +++ b/arch/mips/Kconfig
22 @@ -1450,6 +1450,7 @@ config CPU_CAVIUM_OCTEON
23 select CPU_SUPPORTS_HUGEPAGES
24 select USB_EHCI_BIG_ENDIAN_MMIO
25 select MIPS_L1_CACHE_SHIFT_7
26 + select SYS_HAS_DMA_OPS
28 The Cavium Octeon processor is a highly integrated chip containing
29 many ethernet hardware widgets for networking tasks. The processor
30 @@ -1705,6 +1706,9 @@ config MIPS_MALTA_PM
34 +config SYS_HAS_DMA_OPS
38 # CPU may reorder R->R, R->W, W->R, W->W
39 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
40 --- a/arch/mips/include/asm/dma-mapping.h
41 +++ b/arch/mips/include/asm/dma-mapping.h
43 #ifndef _ASM_DMA_MAPPING_H
44 #define _ASM_DMA_MAPPING_H
46 +#include <linux/kmemcheck.h>
47 +#include <linux/bug.h>
48 +#include <linux/scatterlist.h>
49 +#include <linux/dma-debug.h>
50 +#include <linux/dma-attrs.h>
52 #include <asm/scatterlist.h>
53 #include <asm/dma-coherence.h>
54 #include <asm/cache.h>
55 +#include <asm/cpu-type.h>
56 #include <asm-generic/dma-coherent.h>
58 #ifndef CONFIG_SGI_IP27 /* Kludge to fix 2.6.39 build for IP27 */
61 extern struct dma_map_ops *mips_dma_map_ops;
63 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
64 + enum dma_data_direction direction);
65 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
66 + dma_addr_t *dma_handle, gfp_t gfp,
67 + struct dma_attrs *attrs);
68 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
69 + dma_addr_t dma_handle, struct dma_attrs *attrs);
71 static inline struct dma_map_ops *get_dma_ops(struct device *dev)
73 +#ifdef CONFIG_SYS_HAS_DMA_OPS
74 if (dev && dev->archdata.dma_ops)
75 return dev->archdata.dma_ops;
77 return mips_dma_map_ops;
84 + * Warning on the terminology - Linux calls an uncached area coherent;
85 + * MIPS terminology calls memory areas with hardware maintained coherency
89 +static inline int cpu_needs_post_dma_flush(struct device *dev)
91 +#ifndef CONFIG_SYS_HAS_CPU_R10000
94 + return !plat_device_is_coherent(dev) &&
95 + (boot_cpu_type() == CPU_R10000 ||
96 + boot_cpu_type() == CPU_R12000 ||
97 + boot_cpu_type() == CPU_BMIPS5000);
100 +static inline struct page *dma_addr_to_page(struct device *dev,
101 + dma_addr_t dma_addr)
103 + return pfn_to_page(
104 + plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
107 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
108 @@ -30,12 +73,304 @@ static inline bool dma_capable(struct de
110 static inline void dma_mark_clean(void *addr, size_t size) {}
112 -#include <asm-generic/dma-mapping-common.h>
113 +static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
115 + enum dma_data_direction dir,
116 + struct dma_attrs *attrs)
118 + struct dma_map_ops *ops = get_dma_ops(dev);
119 + unsigned long offset = (unsigned long)ptr & ~PAGE_MASK;
120 + struct page *page = virt_to_page(ptr);
123 + kmemcheck_mark_initialized(ptr, size);
124 + BUG_ON(!valid_dma_direction(dir));
126 + addr = ops->map_page(dev, page, offset, size, dir, attrs);
128 + if (!plat_device_is_coherent(dev))
129 + __dma_sync(page, offset, size, dir);
131 + addr = plat_map_dma_mem_page(dev, page) + offset;
133 + debug_dma_map_page(dev, page, offset, size, dir, addr, true);
137 +static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
139 + enum dma_data_direction dir,
140 + struct dma_attrs *attrs)
142 + struct dma_map_ops *ops = get_dma_ops(dev);
144 + BUG_ON(!valid_dma_direction(dir));
146 + ops->unmap_page(dev, addr, size, dir, attrs);
148 + if (cpu_needs_post_dma_flush(dev))
149 + __dma_sync(dma_addr_to_page(dev, addr),
150 + addr & ~PAGE_MASK, size, dir);
152 + plat_unmap_dma_mem(dev, addr, size, dir);
154 + debug_dma_unmap_page(dev, addr, size, dir, true);
157 +static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
158 + int nents, enum dma_data_direction dir,
159 + struct dma_attrs *attrs)
161 + struct dma_map_ops *ops = get_dma_ops(dev);
163 + struct scatterlist *s;
165 + for_each_sg(sg, s, nents, i)
166 + kmemcheck_mark_initialized(sg_virt(s), s->length);
167 + BUG_ON(!valid_dma_direction(dir));
169 + ents = ops->map_sg(dev, sg, nents, dir, attrs);
171 + for_each_sg(sg, s, nents, i) {
172 + struct page *page = sg_page(s);
174 + if (!plat_device_is_coherent(dev))
175 + __dma_sync(page, s->offset, s->length, dir);
176 +#ifdef CONFIG_NEED_SG_DMA_LENGTH
177 + s->dma_length = s->length;
180 + plat_map_dma_mem_page(dev, page) + s->offset;
184 + debug_dma_map_sg(dev, sg, nents, ents, dir);
189 +static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
190 + int nents, enum dma_data_direction dir,
191 + struct dma_attrs *attrs)
193 + struct dma_map_ops *ops = get_dma_ops(dev);
194 + struct scatterlist *s;
197 + BUG_ON(!valid_dma_direction(dir));
198 + debug_dma_unmap_sg(dev, sg, nents, dir);
200 + ops->unmap_sg(dev, sg, nents, dir, attrs);
204 + for_each_sg(sg, s, nents, i) {
205 + if (!plat_device_is_coherent(dev) && dir != DMA_TO_DEVICE)
206 + __dma_sync(sg_page(s), s->offset, s->length, dir);
207 + plat_unmap_dma_mem(dev, s->dma_address, s->length, dir);
211 +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
212 + size_t offset, size_t size,
213 + enum dma_data_direction dir)
215 + struct dma_map_ops *ops = get_dma_ops(dev);
218 + kmemcheck_mark_initialized(page_address(page) + offset, size);
219 + BUG_ON(!valid_dma_direction(dir));
221 + addr = ops->map_page(dev, page, offset, size, dir, NULL);
223 + if (!plat_device_is_coherent(dev))
224 + __dma_sync(page, offset, size, dir);
226 + addr = plat_map_dma_mem_page(dev, page) + offset;
228 + debug_dma_map_page(dev, page, offset, size, dir, addr, false);
233 +static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
234 + size_t size, enum dma_data_direction dir)
236 + struct dma_map_ops *ops = get_dma_ops(dev);
238 + BUG_ON(!valid_dma_direction(dir));
240 + ops->unmap_page(dev, addr, size, dir, NULL);
242 + if (cpu_needs_post_dma_flush(dev))
243 + __dma_sync(dma_addr_to_page(dev, addr),
244 + addr & ~PAGE_MASK, size, dir);
246 + plat_unmap_dma_mem(dev, addr, size, dir);
248 + debug_dma_unmap_page(dev, addr, size, dir, false);
251 +static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
253 + enum dma_data_direction dir)
255 + struct dma_map_ops *ops = get_dma_ops(dev);
257 + BUG_ON(!valid_dma_direction(dir));
259 + ops->sync_single_for_cpu(dev, addr, size, dir);
260 + else if (cpu_needs_post_dma_flush(dev))
261 + __dma_sync(dma_addr_to_page(dev, addr),
262 + addr & ~PAGE_MASK, size, dir);
263 + debug_dma_sync_single_for_cpu(dev, addr, size, dir);
266 +static inline void dma_sync_single_for_device(struct device *dev,
267 + dma_addr_t addr, size_t size,
268 + enum dma_data_direction dir)
270 + struct dma_map_ops *ops = get_dma_ops(dev);
272 + BUG_ON(!valid_dma_direction(dir));
274 + ops->sync_single_for_device(dev, addr, size, dir);
275 + else if (!plat_device_is_coherent(dev))
276 + __dma_sync(dma_addr_to_page(dev, addr),
277 + addr & ~PAGE_MASK, size, dir);
278 + debug_dma_sync_single_for_device(dev, addr, size, dir);
281 +static inline void dma_sync_single_range_for_cpu(struct device *dev,
283 + unsigned long offset,
285 + enum dma_data_direction dir)
287 + const struct dma_map_ops *ops = get_dma_ops(dev);
289 + BUG_ON(!valid_dma_direction(dir));
291 + ops->sync_single_for_cpu(dev, addr + offset, size, dir);
292 + else if (cpu_needs_post_dma_flush(dev))
293 + __dma_sync(dma_addr_to_page(dev, addr + offset),
294 + (addr + offset) & ~PAGE_MASK, size, dir);
295 + debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
298 +static inline void dma_sync_single_range_for_device(struct device *dev,
300 + unsigned long offset,
302 + enum dma_data_direction dir)
304 + const struct dma_map_ops *ops = get_dma_ops(dev);
306 + BUG_ON(!valid_dma_direction(dir));
308 + ops->sync_single_for_device(dev, addr + offset, size, dir);
309 + else if (!plat_device_is_coherent(dev))
310 + __dma_sync(dma_addr_to_page(dev, addr + offset),
311 + (addr + offset) & ~PAGE_MASK, size, dir);
312 + debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
316 +dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
317 + int nelems, enum dma_data_direction dir)
319 + struct dma_map_ops *ops = get_dma_ops(dev);
320 + struct scatterlist *s;
323 + BUG_ON(!valid_dma_direction(dir));
325 + ops->sync_sg_for_cpu(dev, sg, nelems, dir);
326 + else if (cpu_needs_post_dma_flush(dev)) {
327 + for_each_sg(sg, s, nelems, i)
328 + __dma_sync(sg_page(s), s->offset, s->length, dir);
330 + debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
334 +dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
335 + int nelems, enum dma_data_direction dir)
337 + struct dma_map_ops *ops = get_dma_ops(dev);
338 + struct scatterlist *s;
341 + BUG_ON(!valid_dma_direction(dir));
343 + ops->sync_sg_for_device(dev, sg, nelems, dir);
344 + else if (!plat_device_is_coherent(dev)) {
345 + for_each_sg(sg, s, nelems, i)
346 + __dma_sync(sg_page(s), s->offset, s->length, dir);
348 + debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
352 +#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
353 +#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
354 +#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
355 +#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
357 +extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
358 + void *cpu_addr, dma_addr_t dma_addr, size_t size);
361 + * dma_mmap_attrs - map a coherent DMA allocation into user space
362 + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
363 + * @vma: vm_area_struct describing requested user mapping
364 + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
365 + * @handle: device-view address returned from dma_alloc_attrs
366 + * @size: size of memory originally requested in dma_alloc_attrs
367 + * @attrs: attributes of mapping properties requested in dma_alloc_attrs
369 + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs
370 + * into user space. The coherent DMA buffer must not be freed by the
371 + * driver until the user space mapping has been released.
374 +dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
375 + dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
377 + struct dma_map_ops *ops = get_dma_ops(dev);
379 + if (ops && ops->mmap)
380 + return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
381 + return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
384 +#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
387 +dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
388 + void *cpu_addr, dma_addr_t dma_addr, size_t size);
391 +dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
392 + dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
394 + struct dma_map_ops *ops = get_dma_ops(dev);
396 + if (ops && ops->get_sgtable)
397 + return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
399 + return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
402 +#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, NULL)
405 static inline int dma_supported(struct device *dev, u64 mask)
407 struct dma_map_ops *ops = get_dma_ops(dev);
408 - return ops->dma_supported(dev, mask);
410 + return ops->dma_supported(dev, mask);
411 + return plat_dma_supported(dev, mask);
414 static inline int dma_mapping_error(struct device *dev, u64 mask)
415 @@ -43,7 +378,9 @@ static inline int dma_mapping_error(stru
416 struct dma_map_ops *ops = get_dma_ops(dev);
418 debug_dma_mapping_error(dev, mask);
419 - return ops->mapping_error(dev, mask);
421 + return ops->mapping_error(dev, mask);
426 @@ -74,7 +411,11 @@ static inline void *dma_alloc_attrs(stru
428 struct dma_map_ops *ops = get_dma_ops(dev);
430 - ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
432 + ret = ops->alloc(dev, size, dma_handle, gfp, attrs);
434 + ret = mips_dma_alloc_coherent(dev, size, dma_handle, gfp,
437 debug_dma_alloc_coherent(dev, size, *dma_handle, ret);
439 @@ -89,7 +430,10 @@ static inline void dma_free_attrs(struct
441 struct dma_map_ops *ops = get_dma_ops(dev);
443 - ops->free(dev, size, vaddr, dma_handle, attrs);
445 + ops->free(dev, size, vaddr, dma_handle, attrs);
447 + mips_dma_free_coherent(dev, size, vaddr, dma_handle, attrs);
449 debug_dma_free_coherent(dev, size, vaddr, dma_handle);
451 --- a/arch/mips/mm/dma-default.c
452 +++ b/arch/mips/mm/dma-default.c
455 #ifdef CONFIG_DMA_MAYBE_COHERENT
456 int coherentio = 0; /* User defined DMA coherency from command line. */
457 -EXPORT_SYMBOL_GPL(coherentio);
458 +EXPORT_SYMBOL(coherentio);
459 int hw_coherentio = 0; /* Actual hardware supported DMA coherency setting. */
461 static int __init setcoherentio(char *str)
462 @@ -46,30 +46,6 @@ static int __init setnocoherentio(char *
463 early_param("nocoherentio", setnocoherentio);
466 -static inline struct page *dma_addr_to_page(struct device *dev,
467 - dma_addr_t dma_addr)
469 - return pfn_to_page(
470 - plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
474 - * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
475 - * speculatively fill random cachelines with stale data at any time,
476 - * requiring an extra flush post-DMA.
478 - * Warning on the terminology - Linux calls an uncached area coherent;
479 - * MIPS terminology calls memory areas with hardware maintained coherency
482 -static inline int cpu_needs_post_dma_flush(struct device *dev)
484 - return !plat_device_is_coherent(dev) &&
485 - (boot_cpu_type() == CPU_R10000 ||
486 - boot_cpu_type() == CPU_R12000 ||
487 - boot_cpu_type() == CPU_BMIPS5000);
490 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
493 @@ -125,8 +101,9 @@ void *dma_alloc_noncoherent(struct devic
495 EXPORT_SYMBOL(dma_alloc_noncoherent);
497 -static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
498 - dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
499 +void *mips_dma_alloc_coherent(struct device *dev, size_t size,
500 + dma_addr_t *dma_handle, gfp_t gfp,
501 + struct dma_attrs *attrs)
504 struct page *page = NULL;
505 @@ -157,6 +134,7 @@ static void *mips_dma_alloc_coherent(str
509 +EXPORT_SYMBOL(mips_dma_alloc_coherent);
512 void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr,
513 @@ -167,8 +145,8 @@ void dma_free_noncoherent(struct device
515 EXPORT_SYMBOL(dma_free_noncoherent);
517 -static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
518 - dma_addr_t dma_handle, struct dma_attrs *attrs)
519 +void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
520 + dma_addr_t dma_handle, struct dma_attrs *attrs)
522 unsigned long addr = (unsigned long) vaddr;
523 int order = get_order(size);
524 @@ -188,6 +166,7 @@ static void mips_dma_free_coherent(struc
525 if (!dma_release_from_contiguous(dev, page, count))
526 __free_pages(page, get_order(size));
528 +EXPORT_SYMBOL(mips_dma_free_coherent);
530 static inline void __dma_sync_virtual(void *addr, size_t size,
531 enum dma_data_direction direction)
532 @@ -216,8 +195,8 @@ static inline void __dma_sync_virtual(vo
533 * If highmem is not configured then the bulk of this loop gets
536 -static inline void __dma_sync(struct page *page,
537 - unsigned long offset, size_t size, enum dma_data_direction direction)
538 +void __dma_sync(struct page *page, unsigned long offset, size_t size,
539 + enum dma_data_direction direction)
543 @@ -246,108 +225,7 @@ static inline void __dma_sync(struct pag
548 -static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
549 - size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
551 - if (cpu_needs_post_dma_flush(dev))
552 - __dma_sync(dma_addr_to_page(dev, dma_addr),
553 - dma_addr & ~PAGE_MASK, size, direction);
555 - plat_unmap_dma_mem(dev, dma_addr, size, direction);
558 -static int mips_dma_map_sg(struct device *dev, struct scatterlist *sg,
559 - int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
563 - for (i = 0; i < nents; i++, sg++) {
564 - if (!plat_device_is_coherent(dev))
565 - __dma_sync(sg_page(sg), sg->offset, sg->length,
567 -#ifdef CONFIG_NEED_SG_DMA_LENGTH
568 - sg->dma_length = sg->length;
570 - sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
577 -static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
578 - unsigned long offset, size_t size, enum dma_data_direction direction,
579 - struct dma_attrs *attrs)
581 - if (!plat_device_is_coherent(dev))
582 - __dma_sync(page, offset, size, direction);
584 - return plat_map_dma_mem_page(dev, page) + offset;
587 -static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sg,
588 - int nhwentries, enum dma_data_direction direction,
589 - struct dma_attrs *attrs)
593 - for (i = 0; i < nhwentries; i++, sg++) {
594 - if (!plat_device_is_coherent(dev) &&
595 - direction != DMA_TO_DEVICE)
596 - __dma_sync(sg_page(sg), sg->offset, sg->length,
598 - plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
602 -static void mips_dma_sync_single_for_cpu(struct device *dev,
603 - dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
605 - if (cpu_needs_post_dma_flush(dev))
606 - __dma_sync(dma_addr_to_page(dev, dma_handle),
607 - dma_handle & ~PAGE_MASK, size, direction);
610 -static void mips_dma_sync_single_for_device(struct device *dev,
611 - dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
613 - if (!plat_device_is_coherent(dev))
614 - __dma_sync(dma_addr_to_page(dev, dma_handle),
615 - dma_handle & ~PAGE_MASK, size, direction);
618 -static void mips_dma_sync_sg_for_cpu(struct device *dev,
619 - struct scatterlist *sg, int nelems, enum dma_data_direction direction)
623 - if (cpu_needs_post_dma_flush(dev))
624 - for (i = 0; i < nelems; i++, sg++)
625 - __dma_sync(sg_page(sg), sg->offset, sg->length,
629 -static void mips_dma_sync_sg_for_device(struct device *dev,
630 - struct scatterlist *sg, int nelems, enum dma_data_direction direction)
634 - if (!plat_device_is_coherent(dev))
635 - for (i = 0; i < nelems; i++, sg++)
636 - __dma_sync(sg_page(sg), sg->offset, sg->length,
640 -int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
645 -int mips_dma_supported(struct device *dev, u64 mask)
647 - return plat_dma_supported(dev, mask);
649 +EXPORT_SYMBOL(__dma_sync);
651 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
652 enum dma_data_direction direction)
653 @@ -360,23 +238,10 @@ void dma_cache_sync(struct device *dev,
655 EXPORT_SYMBOL(dma_cache_sync);
657 -static struct dma_map_ops mips_default_dma_map_ops = {
658 - .alloc = mips_dma_alloc_coherent,
659 - .free = mips_dma_free_coherent,
660 - .map_page = mips_dma_map_page,
661 - .unmap_page = mips_dma_unmap_page,
662 - .map_sg = mips_dma_map_sg,
663 - .unmap_sg = mips_dma_unmap_sg,
664 - .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
665 - .sync_single_for_device = mips_dma_sync_single_for_device,
666 - .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
667 - .sync_sg_for_device = mips_dma_sync_sg_for_device,
668 - .mapping_error = mips_dma_mapping_error,
669 - .dma_supported = mips_dma_supported
672 -struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
673 +#ifdef CONFIG_SYS_HAS_DMA_OPS
674 +struct dma_map_ops *mips_dma_map_ops = NULL;
675 EXPORT_SYMBOL(mips_dma_map_ops);
678 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)