target/linux/generic/pending-6.6/487-mtd-spinand-Add-support-for-Etron-EM73D044VCx.patch

   1 From f32085fc0b87049491b07e198d924d738a1a2834 Mon Sep 17 00:00:00 2001
   2 From: Daniel Danzberger <daniel@dd-wrt.com>
   3 Date: Wed, 3 Aug 2022 17:31:03 +0200
   4 Subject: [PATCH] mtd: spinand: Add support for Etron EM73D044VCx
   5
   6 Airoha is a new ARM platform based on Cortex-A53 which has recently been
   7 merged into linux-next.
   8
   9 Due to BootROM limitations on this platform, the Cortex-A53 can't run in
  10 Aarch64 mode and code must be compiled for 32-Bit ARM.
  11
  12 This support is based mostly on those linux-next commits backported
  13 for kernel 5.15.
  14
  15 Patches:
  16 1 - platform support = linux-next
  17 2 - clock driver = linux-next
  18 3 - gpio driver = linux-next
  19 4 - linux,usable-memory-range dts support = linux-next
  20 5 - mtd spinand driver
  21 6 - spi driver
  22 7 - pci driver (kconfig only, uses mediatek PCI) = linux-next
  23
  24 Still missing:
  25 - Ethernet driver
  26 - Sysupgrade support
  27
  28 A.t.m there exists one subtarget EN7523 with only one evaluation
  29 board.
  30
  31 The initramfs can be run with the following commands from u-boot:
  32 -
  33 u-boot> setenv bootfile \
  34         openwrt-airoha-airoha_en7523-evb-initramfs-kernel.bin
  35 u-boot> tftpboot
  36 u-boot> bootm 0x81800000
  37 -
  38
  39 Submitted-by: Daniel Danzberger <daniel@dd-wrt.com>
  40
  41 --- a/drivers/mtd/nand/spi/Makefile
  42 +++ b/drivers/mtd/nand/spi/Makefile
  43 @@ -1,4 +1,4 @@
  44  # SPDX-License-Identifier: GPL-2.0
  45 -spinand-objs := core.o alliancememory.o ato.o esmt.o gigadevice.o macronix.o
  46 -spinand-objs += micron.o paragon.o toshiba.o winbond.o xtx.o
  47 +spinand-objs := core.o alliancememory.o ato.o esmt.o etron.o gigadevice.o
  48 +spinand-objs += macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
  49  obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
  50 --- a/drivers/mtd/nand/spi/core.c
  51 +++ b/drivers/mtd/nand/spi/core.c
  52 @@ -940,6 +940,7 @@ static const struct spinand_manufacturer
  53         &alliancememory_spinand_manufacturer,
  54         &ato_spinand_manufacturer,
  55         &esmt_c8_spinand_manufacturer,
  56 +       &etron_spinand_manufacturer,
  57         &gigadevice_spinand_manufacturer,
  58         &macronix_spinand_manufacturer,
  59         &micron_spinand_manufacturer,
  60 --- /dev/null
  61 +++ b/drivers/mtd/nand/spi/etron.c
  62 @@ -0,0 +1,98 @@
  63 +// SPDX-License-Identifier: GPL-2.0
  64 +
  65 +#include <linux/device.h>
  66 +#include <linux/kernel.h>
  67 +#include <linux/mtd/spinand.h>
  68 +
  69 +#define SPINAND_MFR_ETRON                      0xd5
  70 +
  71 +
  72 +static SPINAND_OP_VARIANTS(read_cache_variants,
  73 +               SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
  74 +               SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
  75 +               SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
  76 +               SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
  77 +               SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
  78 +               SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
  79 +
  80 +static SPINAND_OP_VARIANTS(write_cache_variants,
  81 +               SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
  82 +               SPINAND_PROG_LOAD(true, 0, NULL, 0));
  83 +
  84 +static SPINAND_OP_VARIANTS(update_cache_variants,
  85 +               SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
  86 +               SPINAND_PROG_LOAD(false, 0, NULL, 0));
  87 +
  88 +static int etron_ooblayout_ecc(struct mtd_info *mtd, int section,
  89 +                                       struct mtd_oob_region *oobregion)
  90 +{
  91 +       if (section)
  92 +               return -ERANGE;
  93 +
  94 +       oobregion->offset = 72;
  95 +       oobregion->length = 56;
  96 +
  97 +       return 0;
  98 +}
  99 +
 100 +static int etron_ooblayout_free(struct mtd_info *mtd, int section,
 101 +                          struct mtd_oob_region *oobregion)
 102 +{
 103 +       if (section)
 104 +               return -ERANGE;
 105 +
 106 +       oobregion->offset = 1;
 107 +       oobregion->length = 71;
 108 +
 109 +       return 0;
 110 +}
 111 +
 112 +static int etron_ecc_get_status(struct spinand_device *spinand, u8 status)
 113 +{
 114 +       switch (status & STATUS_ECC_MASK) {
 115 +       case STATUS_ECC_NO_BITFLIPS:
 116 +               return 0;
 117 +
 118 +       case STATUS_ECC_HAS_BITFLIPS:
 119 +               /* Between 1-7 bitflips were corrected */
 120 +               return 7;
 121 +
 122 +       case STATUS_ECC_MASK:
 123 +               /* Maximum bitflips were corrected */
 124 +               return 8;
 125 +
 126 +       case STATUS_ECC_UNCOR_ERROR:
 127 +               return -EBADMSG;
 128 +       }
 129 +
 130 +       return -EINVAL;
 131 +}
 132 +
 133 +static const struct mtd_ooblayout_ops etron_ooblayout = {
 134 +       .ecc = etron_ooblayout_ecc,
 135 +       .free = etron_ooblayout_free,
 136 +};
 137 +
 138 +static const struct spinand_info etron_spinand_table[] = {
 139 +       SPINAND_INFO("EM73D044VCx",
 140 +                    SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x1f),
 141 +                    // bpc, pagesize, oobsize, pagesperblock, bperlun, maxbadplun, ppl, lpt, #t
 142 +                    NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
 143 +                    NAND_ECCREQ(8, 512),
 144 +                    SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
 145 +                                             &write_cache_variants,
 146 +                                             &update_cache_variants),
 147 +                    SPINAND_HAS_QE_BIT,
 148 +                    SPINAND_ECCINFO(&etron_ooblayout, etron_ecc_get_status)),
 149 +};
 150 +
 151 +static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
 152 +};
 153 +
 154 +const struct spinand_manufacturer etron_spinand_manufacturer = {
 155 +       .id = SPINAND_MFR_ETRON,
 156 +       .name = "Etron",
 157 +       .chips = etron_spinand_table,
 158 +       .nchips = ARRAY_SIZE(etron_spinand_table),
 159 +       .ops = &etron_spinand_manuf_ops,
 160 +};
 161 --- a/include/linux/mtd/spinand.h
 162 +++ b/include/linux/mtd/spinand.h
 163 @@ -263,6 +263,7 @@ struct spinand_manufacturer {
 164  extern const struct spinand_manufacturer alliancememory_spinand_manufacturer;
 165  extern const struct spinand_manufacturer ato_spinand_manufacturer;
 166  extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
 167 +extern const struct spinand_manufacturer etron_spinand_manufacturer;
 168  extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
 169  extern const struct spinand_manufacturer macronix_spinand_manufacturer;
 170  extern const struct spinand_manufacturer micron_spinand_manufacturer;