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imx6: add support for 3.14
[openwrt/openwrt.git] / target / linux / imx6 / patches-3.14 / 0003-ARM-dts-add-Gateworks-Ventana-support.patch
1 From e3946fe8050534ccaf8c1266cb1fa90c7f3345c3 Mon Sep 17 00:00:00 2001
2 From: Tim Harvey <tharvey@gateworks.com>
3 Date: Fri, 7 Feb 2014 15:24:56 +0800
4 Subject: [PATCH] ARM: dts: add Gateworks Ventana support
5
6 The Gateworks Ventana product family consists of several baseboard designs
7 based on the Freescale i.MX6 family of processors. Each baseboard has a
8 different set of possible features.
9
10 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
11 Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
12 ---
13 arch/arm/boot/dts/Makefile | 9 +
14 arch/arm/boot/dts/imx6dl-gw51xx.dts | 19 ++
15 arch/arm/boot/dts/imx6dl-gw52xx.dts | 19 ++
16 arch/arm/boot/dts/imx6dl-gw53xx.dts | 19 ++
17 arch/arm/boot/dts/imx6dl-gw54xx.dts | 19 ++
18 arch/arm/boot/dts/imx6q-gw51xx.dts | 19 ++
19 arch/arm/boot/dts/imx6q-gw52xx.dts | 23 ++
20 arch/arm/boot/dts/imx6q-gw53xx.dts | 23 ++
21 arch/arm/boot/dts/imx6q-gw5400-a.dts | 546 ++++++++++++++++++++++++++++++++
22 arch/arm/boot/dts/imx6q-gw54xx.dts | 23 ++
23 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi | 374 ++++++++++++++++++++++
24 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 490 ++++++++++++++++++++++++++++
25 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 553 ++++++++++++++++++++++++++++++++
26 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 580 ++++++++++++++++++++++++++++++++++
27 14 files changed, 2716 insertions(+)
28 create mode 100644 arch/arm/boot/dts/imx6dl-gw51xx.dts
29 create mode 100644 arch/arm/boot/dts/imx6dl-gw52xx.dts
30 create mode 100644 arch/arm/boot/dts/imx6dl-gw53xx.dts
31 create mode 100644 arch/arm/boot/dts/imx6dl-gw54xx.dts
32 create mode 100644 arch/arm/boot/dts/imx6q-gw51xx.dts
33 create mode 100644 arch/arm/boot/dts/imx6q-gw52xx.dts
34 create mode 100644 arch/arm/boot/dts/imx6q-gw53xx.dts
35 create mode 100644 arch/arm/boot/dts/imx6q-gw5400-a.dts
36 create mode 100644 arch/arm/boot/dts/imx6q-gw54xx.dts
37 create mode 100644 arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
38 create mode 100644 arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
39 create mode 100644 arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
40 create mode 100644 arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
41
42 --- a/arch/arm/boot/dts/Makefile
43 +++ b/arch/arm/boot/dts/Makefile
44 @@ -154,12 +154,21 @@ dtb-$(CONFIG_ARCH_MXC) += \
45 imx53-qsb.dtb \
46 imx53-smd.dtb \
47 imx6dl-cubox-i.dtb \
48 + imx6dl-gw51xx.dtb \
49 + imx6dl-gw52xx.dtb \
50 + imx6dl-gw53xx.dtb \
51 + imx6dl-gw54xx.dtb \
52 imx6dl-hummingboard.dtb \
53 imx6dl-sabreauto.dtb \
54 imx6dl-sabresd.dtb \
55 imx6dl-wandboard.dtb \
56 imx6q-arm2.dtb \
57 imx6q-cubox-i.dtb \
58 + imx6q-gw51xx.dtb \
59 + imx6q-gw52xx.dtb \
60 + imx6q-gw53xx.dtb \
61 + imx6q-gw5400-a.dtb \
62 + imx6q-gw54xx.dtb \
63 imx6q-phytec-pbab01.dtb \
64 imx6q-sabreauto.dtb \
65 imx6q-sabrelite.dtb \
66 --- /dev/null
67 +++ b/arch/arm/boot/dts/imx6dl-gw51xx.dts
68 @@ -0,0 +1,19 @@
69 +/*
70 + * Copyright 2013 Gateworks Corporation
71 + *
72 + * The code contained herein is licensed under the GNU General Public
73 + * License. You may obtain a copy of the GNU General Public License
74 + * Version 2 or later at the following locations:
75 + *
76 + * http://www.opensource.org/licenses/gpl-license.html
77 + * http://www.gnu.org/copyleft/gpl.html
78 + */
79 +
80 +/dts-v1/;
81 +#include "imx6dl.dtsi"
82 +#include "imx6qdl-gw51xx.dtsi"
83 +
84 +/ {
85 + model = "Gateworks Ventana i.MX6 DualLite GW51XX";
86 + compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
87 +};
88 --- /dev/null
89 +++ b/arch/arm/boot/dts/imx6dl-gw52xx.dts
90 @@ -0,0 +1,19 @@
91 +/*
92 + * Copyright 2013 Gateworks Corporation
93 + *
94 + * The code contained herein is licensed under the GNU General Public
95 + * License. You may obtain a copy of the GNU General Public License
96 + * Version 2 or later at the following locations:
97 + *
98 + * http://www.opensource.org/licenses/gpl-license.html
99 + * http://www.gnu.org/copyleft/gpl.html
100 + */
101 +
102 +/dts-v1/;
103 +#include "imx6dl.dtsi"
104 +#include "imx6qdl-gw52xx.dtsi"
105 +
106 +/ {
107 + model = "Gateworks Ventana i.MX6 DualLite GW52XX";
108 + compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
109 +};
110 --- /dev/null
111 +++ b/arch/arm/boot/dts/imx6dl-gw53xx.dts
112 @@ -0,0 +1,19 @@
113 +/*
114 + * Copyright 2013 Gateworks Corporation
115 + *
116 + * The code contained herein is licensed under the GNU General Public
117 + * License. You may obtain a copy of the GNU General Public License
118 + * Version 2 or later at the following locations:
119 + *
120 + * http://www.opensource.org/licenses/gpl-license.html
121 + * http://www.gnu.org/copyleft/gpl.html
122 + */
123 +
124 +/dts-v1/;
125 +#include "imx6dl.dtsi"
126 +#include "imx6qdl-gw53xx.dtsi"
127 +
128 +/ {
129 + model = "Gateworks Ventana i.MX6 DualLite GW53XX";
130 + compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
131 +};
132 --- /dev/null
133 +++ b/arch/arm/boot/dts/imx6dl-gw54xx.dts
134 @@ -0,0 +1,19 @@
135 +/*
136 + * Copyright 2013 Gateworks Corporation
137 + *
138 + * The code contained herein is licensed under the GNU General Public
139 + * License. You may obtain a copy of the GNU General Public License
140 + * Version 2 or later at the following locations:
141 + *
142 + * http://www.opensource.org/licenses/gpl-license.html
143 + * http://www.gnu.org/copyleft/gpl.html
144 + */
145 +
146 +/dts-v1/;
147 +#include "imx6dl.dtsi"
148 +#include "imx6qdl-gw54xx.dtsi"
149 +
150 +/ {
151 + model = "Gateworks Ventana i.MX6 DualLite GW54XX";
152 + compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
153 +};
154 --- /dev/null
155 +++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
156 @@ -0,0 +1,19 @@
157 +/*
158 + * Copyright 2013 Gateworks Corporation
159 + *
160 + * The code contained herein is licensed under the GNU General Public
161 + * License. You may obtain a copy of the GNU General Public License
162 + * Version 2 or later at the following locations:
163 + *
164 + * http://www.opensource.org/licenses/gpl-license.html
165 + * http://www.gnu.org/copyleft/gpl.html
166 + */
167 +
168 +/dts-v1/;
169 +#include "imx6q.dtsi"
170 +#include "imx6qdl-gw54xx.dtsi"
171 +
172 +/ {
173 + model = "Gateworks Ventana i.MX6 Quad GW51XX";
174 + compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
175 +};
176 --- /dev/null
177 +++ b/arch/arm/boot/dts/imx6q-gw52xx.dts
178 @@ -0,0 +1,23 @@
179 +/*
180 + * Copyright 2013 Gateworks Corporation
181 + *
182 + * The code contained herein is licensed under the GNU General Public
183 + * License. You may obtain a copy of the GNU General Public License
184 + * Version 2 or later at the following locations:
185 + *
186 + * http://www.opensource.org/licenses/gpl-license.html
187 + * http://www.gnu.org/copyleft/gpl.html
188 + */
189 +
190 +/dts-v1/;
191 +#include "imx6q.dtsi"
192 +#include "imx6qdl-gw52xx.dtsi"
193 +
194 +/ {
195 + model = "Gateworks Ventana i.MX6 Quad GW52XX";
196 + compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
197 +};
198 +
199 +&sata {
200 + status = "okay";
201 +};
202 --- /dev/null
203 +++ b/arch/arm/boot/dts/imx6q-gw53xx.dts
204 @@ -0,0 +1,23 @@
205 +/*
206 + * Copyright 2013 Gateworks Corporation
207 + *
208 + * The code contained herein is licensed under the GNU General Public
209 + * License. You may obtain a copy of the GNU General Public License
210 + * Version 2 or later at the following locations:
211 + *
212 + * http://www.opensource.org/licenses/gpl-license.html
213 + * http://www.gnu.org/copyleft/gpl.html
214 + */
215 +
216 +/dts-v1/;
217 +#include "imx6q.dtsi"
218 +#include "imx6qdl-gw53xx.dtsi"
219 +
220 +/ {
221 + model = "Gateworks Ventana i.MX6 Quad GW53XX";
222 + compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
223 +};
224 +
225 +&sata {
226 + status = "okay";
227 +};
228 --- /dev/null
229 +++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
230 @@ -0,0 +1,546 @@
231 +/*
232 + * Copyright 2013 Gateworks Corporation
233 + *
234 + * The code contained herein is licensed under the GNU General Public
235 + * License. You may obtain a copy of the GNU General Public License
236 + * Version 2 or later at the following locations:
237 + *
238 + * http://www.opensource.org/licenses/gpl-license.html
239 + * http://www.gnu.org/copyleft/gpl.html
240 + */
241 +
242 +/dts-v1/;
243 +#include "imx6q.dtsi"
244 +
245 +/ {
246 + model = "Gateworks Ventana GW5400-A";
247 + compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
248 +
249 + /* these are used by bootloader for disabling nodes */
250 + aliases {
251 + ethernet0 = &fec;
252 + ethernet1 = &eth1;
253 + i2c0 = &i2c1;
254 + i2c1 = &i2c2;
255 + i2c2 = &i2c3;
256 + led0 = &led0;
257 + led1 = &led1;
258 + led2 = &led2;
259 + sky2 = &eth1;
260 + ssi0 = &ssi1;
261 + spi0 = &ecspi1;
262 + usb0 = &usbh1;
263 + usb1 = &usbotg;
264 + usdhc2 = &usdhc3;
265 + };
266 +
267 + chosen {
268 + bootargs = "console=ttymxc1,115200";
269 + };
270 +
271 + leds {
272 + compatible = "gpio-leds";
273 +
274 + led0: user1 {
275 + label = "user1";
276 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
277 + default-state = "on";
278 + linux,default-trigger = "heartbeat";
279 + };
280 +
281 + led1: user2 {
282 + label = "user2";
283 + gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
284 + default-state = "off";
285 + };
286 +
287 + led2: user3 {
288 + label = "user3";
289 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
290 + default-state = "off";
291 + };
292 + };
293 +
294 + memory {
295 + reg = <0x10000000 0x40000000>;
296 + };
297 +
298 + pps {
299 + compatible = "pps-gpio";
300 + gpios = <&gpio1 5 0>;
301 + status = "okay";
302 + };
303 +
304 + regulators {
305 + compatible = "simple-bus";
306 + #address-cells = <1>;
307 + #size-cells = <0>;
308 +
309 + reg_1p0v: regulator@0 {
310 + compatible = "regulator-fixed";
311 + reg = <0>;
312 + regulator-name = "1P0V";
313 + regulator-min-microvolt = <1000000>;
314 + regulator-max-microvolt = <1000000>;
315 + regulator-always-on;
316 + };
317 +
318 + reg_3p3v: regulator@1 {
319 + compatible = "regulator-fixed";
320 + reg = <1>;
321 + regulator-name = "3P3V";
322 + regulator-min-microvolt = <3300000>;
323 + regulator-max-microvolt = <3300000>;
324 + regulator-always-on;
325 + };
326 +
327 + reg_usb_h1_vbus: regulator@2 {
328 + compatible = "regulator-fixed";
329 + reg = <2>;
330 + regulator-name = "usb_h1_vbus";
331 + regulator-min-microvolt = <5000000>;
332 + regulator-max-microvolt = <5000000>;
333 + regulator-always-on;
334 + };
335 +
336 + reg_usb_otg_vbus: regulator@3 {
337 + compatible = "regulator-fixed";
338 + reg = <3>;
339 + regulator-name = "usb_otg_vbus";
340 + regulator-min-microvolt = <5000000>;
341 + regulator-max-microvolt = <5000000>;
342 + gpio = <&gpio3 22 0>;
343 + enable-active-high;
344 + };
345 + };
346 +
347 + sound {
348 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
349 + "fsl,imx-audio-sgtl5000";
350 + model = "imx6q-sabrelite-sgtl5000";
351 + ssi-controller = <&ssi1>;
352 + audio-codec = <&codec>;
353 + audio-routing =
354 + "MIC_IN", "Mic Jack",
355 + "Mic Jack", "Mic Bias",
356 + "Headphone Jack", "HP_OUT";
357 + mux-int-port = <1>;
358 + mux-ext-port = <4>;
359 + };
360 +};
361 +
362 +&audmux {
363 + pinctrl-names = "default";
364 + pinctrl-0 = <&pinctrl_audmux>;
365 + status = "okay";
366 +};
367 +
368 +&ecspi1 {
369 + fsl,spi-num-chipselects = <1>;
370 + cs-gpios = <&gpio3 19 0>;
371 + pinctrl-names = "default";
372 + pinctrl-0 = <&pinctrl_ecspi1>;
373 + status = "okay";
374 +
375 + flash: m25p80@0 {
376 + compatible = "sst,w25q256";
377 + spi-max-frequency = <30000000>;
378 + reg = <0>;
379 + };
380 +};
381 +
382 +&fec {
383 + pinctrl-names = "default";
384 + pinctrl-0 = <&pinctrl_enet>;
385 + phy-mode = "rgmii";
386 + phy-reset-gpios = <&gpio1 30 0>;
387 + status = "okay";
388 +};
389 +
390 +&i2c1 {
391 + clock-frequency = <100000>;
392 + pinctrl-names = "default";
393 + pinctrl-0 = <&pinctrl_i2c1>;
394 + status = "okay";
395 +
396 + eeprom1: eeprom@50 {
397 + compatible = "atmel,24c02";
398 + reg = <0x50>;
399 + pagesize = <16>;
400 + };
401 +
402 + eeprom2: eeprom@51 {
403 + compatible = "atmel,24c02";
404 + reg = <0x51>;
405 + pagesize = <16>;
406 + };
407 +
408 + eeprom3: eeprom@52 {
409 + compatible = "atmel,24c02";
410 + reg = <0x52>;
411 + pagesize = <16>;
412 + };
413 +
414 + eeprom4: eeprom@53 {
415 + compatible = "atmel,24c02";
416 + reg = <0x53>;
417 + pagesize = <16>;
418 + };
419 +
420 + gpio: pca9555@23 {
421 + compatible = "nxp,pca9555";
422 + reg = <0x23>;
423 + gpio-controller;
424 + #gpio-cells = <2>;
425 + };
426 +
427 + hwmon: gsc@29 {
428 + compatible = "gw,gsp";
429 + reg = <0x29>;
430 + };
431 +
432 + rtc: ds1672@68 {
433 + compatible = "dallas,ds1672";
434 + reg = <0x68>;
435 + };
436 +};
437 +
438 +&i2c2 {
439 + clock-frequency = <100000>;
440 + pinctrl-names = "default";
441 + pinctrl-0 = <&pinctrl_i2c2>;
442 + status = "okay";
443 +
444 + pmic: pfuze100@08 {
445 + compatible = "fsl,pfuze100";
446 + reg = <0x08>;
447 +
448 + regulators {
449 + sw1a_reg: sw1ab {
450 + regulator-min-microvolt = <300000>;
451 + regulator-max-microvolt = <1875000>;
452 + regulator-boot-on;
453 + regulator-always-on;
454 + regulator-ramp-delay = <6250>;
455 + };
456 +
457 + sw1c_reg: sw1c {
458 + regulator-min-microvolt = <300000>;
459 + regulator-max-microvolt = <1875000>;
460 + regulator-boot-on;
461 + regulator-always-on;
462 + regulator-ramp-delay = <6250>;
463 + };
464 +
465 + sw2_reg: sw2 {
466 + regulator-min-microvolt = <800000>;
467 + regulator-max-microvolt = <3950000>;
468 + regulator-boot-on;
469 + regulator-always-on;
470 + };
471 +
472 + sw3a_reg: sw3a {
473 + regulator-min-microvolt = <400000>;
474 + regulator-max-microvolt = <1975000>;
475 + regulator-boot-on;
476 + regulator-always-on;
477 + };
478 +
479 + sw3b_reg: sw3b {
480 + regulator-min-microvolt = <400000>;
481 + regulator-max-microvolt = <1975000>;
482 + regulator-boot-on;
483 + regulator-always-on;
484 + };
485 +
486 + sw4_reg: sw4 {
487 + regulator-min-microvolt = <800000>;
488 + regulator-max-microvolt = <3300000>;
489 + };
490 +
491 + swbst_reg: swbst {
492 + regulator-min-microvolt = <5000000>;
493 + regulator-max-microvolt = <5150000>;
494 + };
495 +
496 + snvs_reg: vsnvs {
497 + regulator-min-microvolt = <1000000>;
498 + regulator-max-microvolt = <3000000>;
499 + regulator-boot-on;
500 + regulator-always-on;
501 + };
502 +
503 + vref_reg: vrefddr {
504 + regulator-boot-on;
505 + regulator-always-on;
506 + };
507 +
508 + vgen1_reg: vgen1 {
509 + regulator-min-microvolt = <800000>;
510 + regulator-max-microvolt = <1550000>;
511 + };
512 +
513 + vgen2_reg: vgen2 {
514 + regulator-min-microvolt = <800000>;
515 + regulator-max-microvolt = <1550000>;
516 + };
517 +
518 + vgen3_reg: vgen3 {
519 + regulator-min-microvolt = <1800000>;
520 + regulator-max-microvolt = <3300000>;
521 + };
522 +
523 + vgen4_reg: vgen4 {
524 + regulator-min-microvolt = <1800000>;
525 + regulator-max-microvolt = <3300000>;
526 + regulator-always-on;
527 + };
528 +
529 + vgen5_reg: vgen5 {
530 + regulator-min-microvolt = <1800000>;
531 + regulator-max-microvolt = <3300000>;
532 + regulator-always-on;
533 + };
534 +
535 + vgen6_reg: vgen6 {
536 + regulator-min-microvolt = <1800000>;
537 + regulator-max-microvolt = <3300000>;
538 + regulator-always-on;
539 + };
540 + };
541 + };
542 +
543 + pciswitch: pex8609@3f {
544 + compatible = "plx,pex8609";
545 + reg = <0x3f>;
546 + };
547 +
548 + pciclkgen: si52147@6b {
549 + compatible = "sil,si52147";
550 + reg = <0x6b>;
551 + };
552 +};
553 +
554 +&i2c3 {
555 + clock-frequency = <100000>;
556 + pinctrl-names = "default";
557 + pinctrl-0 = <&pinctrl_i2c3>;
558 + status = "okay";
559 +
560 + accelerometer: mma8450@1c {
561 + compatible = "fsl,mma8450";
562 + reg = <0x1c>;
563 + };
564 +
565 + codec: sgtl5000@0a {
566 + compatible = "fsl,sgtl5000";
567 + reg = <0x0a>;
568 + clocks = <&clks 201>;
569 + VDDA-supply = <&sw4_reg>;
570 + VDDIO-supply = <&reg_3p3v>;
571 + };
572 +
573 + hdmiin: adv7611@4c {
574 + compatible = "adi,adv7611";
575 + reg = <0x4c>;
576 + };
577 +
578 + touchscreen: egalax_ts@04 {
579 + compatible = "eeti,egalax_ts";
580 + reg = <0x04>;
581 + interrupt-parent = <&gpio7>;
582 + interrupts = <12 2>; /* gpio7_12 active low */
583 + wakeup-gpios = <&gpio7 12 0>;
584 + };
585 +
586 + videoout: adv7393@2a {
587 + compatible = "adi,adv7393";
588 + reg = <0x2a>;
589 + };
590 +
591 + videoin: adv7180@20 {
592 + compatible = "adi,adv7180";
593 + reg = <0x20>;
594 + };
595 +};
596 +
597 +&iomuxc {
598 + pinctrl-names = "default";
599 + pinctrl-0 = <&pinctrl_hog>;
600 +
601 + imx6q-gw5400-a {
602 + pinctrl_hog: hoggrp {
603 + fsl,pins = <
604 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
605 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
606 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
607 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
608 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
609 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
610 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
611 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
612 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
613 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
614 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
615 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
616 + >;
617 + };
618 +
619 + pinctrl_audmux: audmuxgrp {
620 + fsl,pins = <
621 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
622 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
623 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
624 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
625 + >;
626 + };
627 +
628 + pinctrl_ecspi1: ecspi1grp {
629 + fsl,pins = <
630 + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
631 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
632 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
633 + >;
634 + };
635 +
636 + pinctrl_enet: enetgrp {
637 + fsl,pins = <
638 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
639 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
640 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
641 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
642 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
643 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
644 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
645 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
646 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
647 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
648 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
649 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
650 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
651 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
652 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
653 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
654 + >;
655 + };
656 +
657 + pinctrl_i2c1: i2c1grp {
658 + fsl,pins = <
659 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
660 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
661 + >;
662 + };
663 +
664 + pinctrl_i2c2: i2c2grp {
665 + fsl,pins = <
666 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
667 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
668 + >;
669 + };
670 +
671 + pinctrl_i2c3: i2c3grp {
672 + fsl,pins = <
673 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
674 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
675 + >;
676 + };
677 +
678 + pinctrl_uart1: uart1grp {
679 + fsl,pins = <
680 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
681 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
682 + >;
683 + };
684 +
685 + pinctrl_uart2: uart2grp {
686 + fsl,pins = <
687 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
688 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
689 + >;
690 + };
691 +
692 + pinctrl_uart5: uart5grp {
693 + fsl,pins = <
694 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
695 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
696 + >;
697 + };
698 +
699 + pinctrl_usbotg: usbotggrp {
700 + fsl,pins = <
701 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
702 + >;
703 + };
704 +
705 + pinctrl_usdhc3: usdhc3grp {
706 + fsl,pins = <
707 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
708 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
709 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
710 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
711 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
712 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
713 + >;
714 + };
715 + };
716 +};
717 +
718 +&ldb {
719 + status = "okay";
720 + lvds-channel@0 {
721 + crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
722 + };
723 +};
724 +
725 +&pcie {
726 + reset-gpio = <&gpio1 29 0>;
727 + status = "okay";
728 +
729 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
730 + compatible = "marvell,sky2";
731 + };
732 +};
733 +
734 +&ssi1 {
735 + fsl,mode = "i2s-slave";
736 + status = "okay";
737 +};
738 +
739 +&uart1 {
740 + pinctrl-names = "default";
741 + pinctrl-0 = <&pinctrl_uart1>;
742 + status = "okay";
743 +};
744 +
745 +&uart2 {
746 + pinctrl-names = "default";
747 + pinctrl-0 = <&pinctrl_uart2>;
748 + status = "okay";
749 +};
750 +
751 +&uart5 {
752 + pinctrl-names = "default";
753 + pinctrl-0 = <&pinctrl_uart5>;
754 + status = "okay";
755 +};
756 +
757 +&usbotg {
758 + vbus-supply = <&reg_usb_otg_vbus>;
759 + pinctrl-names = "default";
760 + pinctrl-0 = <&pinctrl_usbotg>;
761 + disable-over-current;
762 + status = "okay";
763 +};
764 +
765 +&usbh1 {
766 + vbus-supply = <&reg_usb_h1_vbus>;
767 + status = "okay";
768 +};
769 +
770 +&usdhc3 {
771 + pinctrl-names = "default";
772 + pinctrl-0 = <&pinctrl_usdhc3>;
773 + cd-gpios = <&gpio7 0 0>;
774 + vmmc-supply = <&reg_3p3v>;
775 + status = "okay";
776 +};
777 --- /dev/null
778 +++ b/arch/arm/boot/dts/imx6q-gw54xx.dts
779 @@ -0,0 +1,23 @@
780 +/*
781 + * Copyright 2013 Gateworks Corporation
782 + *
783 + * The code contained herein is licensed under the GNU General Public
784 + * License. You may obtain a copy of the GNU General Public License
785 + * Version 2 or later at the following locations:
786 + *
787 + * http://www.opensource.org/licenses/gpl-license.html
788 + * http://www.gnu.org/copyleft/gpl.html
789 + */
790 +
791 +/dts-v1/;
792 +#include "imx6q.dtsi"
793 +#include "imx6qdl-gw54xx.dtsi"
794 +
795 +/ {
796 + model = "Gateworks Ventana i.MX6 Quad GW54XX";
797 + compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
798 +};
799 +
800 +&sata {
801 + status = "okay";
802 +};
803 --- /dev/null
804 +++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
805 @@ -0,0 +1,374 @@
806 +/*
807 + * Copyright 2013 Gateworks Corporation
808 + *
809 + * The code contained herein is licensed under the GNU General Public
810 + * License. You may obtain a copy of the GNU General Public License
811 + * Version 2 or later at the following locations:
812 + *
813 + * http://www.opensource.org/licenses/gpl-license.html
814 + * http://www.gnu.org/copyleft/gpl.html
815 + */
816 +
817 +/ {
818 + /* these are used by bootloader for disabling nodes */
819 + aliases {
820 + can0 = &can1;
821 + ethernet0 = &fec;
822 + led0 = &led0;
823 + led1 = &led1;
824 + nand = &gpmi;
825 + usb0 = &usbh1;
826 + usb1 = &usbotg;
827 + };
828 +
829 + chosen {
830 + bootargs = "console=ttymxc1,115200";
831 + };
832 +
833 + leds {
834 + compatible = "gpio-leds";
835 +
836 + led0: user1 {
837 + label = "user1";
838 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
839 + default-state = "on";
840 + linux,default-trigger = "heartbeat";
841 + };
842 +
843 + led1: user2 {
844 + label = "user2";
845 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
846 + default-state = "off";
847 + };
848 + };
849 +
850 + memory {
851 + reg = <0x10000000 0x20000000>;
852 + };
853 +
854 + pps {
855 + compatible = "pps-gpio";
856 + gpios = <&gpio1 26 0>;
857 + status = "okay";
858 + };
859 +
860 + regulators {
861 + compatible = "simple-bus";
862 + #address-cells = <1>;
863 + #size-cells = <0>;
864 +
865 + reg_3p3v: regulator@0 {
866 + compatible = "regulator-fixed";
867 + reg = <0>;
868 + regulator-name = "3P3V";
869 + regulator-min-microvolt = <3300000>;
870 + regulator-max-microvolt = <3300000>;
871 + regulator-always-on;
872 + };
873 +
874 + reg_5p0v: regulator@1 {
875 + compatible = "regulator-fixed";
876 + reg = <1>;
877 + regulator-name = "5P0V";
878 + regulator-min-microvolt = <5000000>;
879 + regulator-max-microvolt = <5000000>;
880 + regulator-always-on;
881 + };
882 +
883 + reg_usb_otg_vbus: regulator@2 {
884 + compatible = "regulator-fixed";
885 + reg = <2>;
886 + regulator-name = "usb_otg_vbus";
887 + regulator-min-microvolt = <5000000>;
888 + regulator-max-microvolt = <5000000>;
889 + gpio = <&gpio3 22 0>;
890 + enable-active-high;
891 + };
892 + };
893 +};
894 +
895 +&fec {
896 + pinctrl-names = "default";
897 + pinctrl-0 = <&pinctrl_enet>;
898 + phy-mode = "rgmii";
899 + phy-reset-gpios = <&gpio1 30 0>;
900 + status = "okay";
901 +};
902 +
903 +&gpmi {
904 + pinctrl-names = "default";
905 + pinctrl-0 = <&pinctrl_gpmi_nand>;
906 + status = "okay";
907 +};
908 +
909 +&i2c1 {
910 + clock-frequency = <100000>;
911 + pinctrl-names = "default";
912 + pinctrl-0 = <&pinctrl_i2c1>;
913 + status = "okay";
914 +
915 + eeprom1: eeprom@50 {
916 + compatible = "atmel,24c02";
917 + reg = <0x50>;
918 + pagesize = <16>;
919 + };
920 +
921 + eeprom2: eeprom@51 {
922 + compatible = "atmel,24c02";
923 + reg = <0x51>;
924 + pagesize = <16>;
925 + };
926 +
927 + eeprom3: eeprom@52 {
928 + compatible = "atmel,24c02";
929 + reg = <0x52>;
930 + pagesize = <16>;
931 + };
932 +
933 + eeprom4: eeprom@53 {
934 + compatible = "atmel,24c02";
935 + reg = <0x53>;
936 + pagesize = <16>;
937 + };
938 +
939 + gpio: pca9555@23 {
940 + compatible = "nxp,pca9555";
941 + reg = <0x23>;
942 + gpio-controller;
943 + #gpio-cells = <2>;
944 + };
945 +
946 + hwmon: gsc@29 {
947 + compatible = "gw,gsp";
948 + reg = <0x29>;
949 + };
950 +
951 + rtc: ds1672@68 {
952 + compatible = "dallas,ds1672";
953 + reg = <0x68>;
954 + };
955 +};
956 +
957 +&i2c2 {
958 + clock-frequency = <100000>;
959 + pinctrl-names = "default";
960 + pinctrl-0 = <&pinctrl_i2c2>;
961 + status = "okay";
962 +
963 + pmic: ltc3676@3c {
964 + compatible = "ltc,ltc3676";
965 + reg = <0x3c>;
966 +
967 + regulators {
968 + sw1_reg: ltc3676__sw1 {
969 + regulator-min-microvolt = <1175000>;
970 + regulator-max-microvolt = <1175000>;
971 + regulator-boot-on;
972 + regulator-always-on;
973 + };
974 +
975 + sw2_reg: ltc3676__sw2 {
976 + regulator-min-microvolt = <1800000>;
977 + regulator-max-microvolt = <1800000>;
978 + regulator-boot-on;
979 + regulator-always-on;
980 + };
981 +
982 + sw3_reg: ltc3676__sw3 {
983 + regulator-min-microvolt = <1175000>;
984 + regulator-max-microvolt = <1175000>;
985 + regulator-boot-on;
986 + regulator-always-on;
987 + };
988 +
989 + sw4_reg: ltc3676__sw4 {
990 + regulator-min-microvolt = <1500000>;
991 + regulator-max-microvolt = <1500000>;
992 + regulator-boot-on;
993 + regulator-always-on;
994 + };
995 +
996 + ldo2_reg: ltc3676__ldo2 {
997 + regulator-min-microvolt = <2500000>;
998 + regulator-max-microvolt = <2500000>;
999 + regulator-boot-on;
1000 + regulator-always-on;
1001 + };
1002 +
1003 + ldo4_reg: ltc3676__ldo4 {
1004 + regulator-min-microvolt = <3000000>;
1005 + regulator-max-microvolt = <3000000>;
1006 + };
1007 + };
1008 + };
1009 +};
1010 +
1011 +&i2c3 {
1012 + clock-frequency = <100000>;
1013 + pinctrl-names = "default";
1014 + pinctrl-0 = <&pinctrl_i2c3>;
1015 + status = "okay";
1016 +
1017 + videoin: adv7180@20 {
1018 + compatible = "adi,adv7180";
1019 + reg = <0x20>;
1020 + };
1021 +};
1022 +
1023 +&iomuxc {
1024 + pinctrl-names = "default";
1025 + pinctrl-0 = <&pinctrl_hog>;
1026 +
1027 + imx6qdl-gw51xx {
1028 + pinctrl_hog: hoggrp {
1029 + fsl,pins = <
1030 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1031 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1032 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1033 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1034 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1035 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000 /* PCIE_RST# */
1036 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1037 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1038 + >;
1039 + };
1040 +
1041 + pinctrl_enet: enetgrp {
1042 + fsl,pins = <
1043 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1044 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1045 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1046 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1047 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1048 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1049 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1050 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1051 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1052 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1053 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1054 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1055 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1056 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1057 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1058 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1059 + >;
1060 + };
1061 +
1062 + pinctrl_gpmi_nand: gpminandgrp {
1063 + fsl,pins = <
1064 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1065 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1066 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1067 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1068 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1069 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1070 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1071 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1072 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1073 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1074 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1075 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1076 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1077 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1078 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1079 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1080 + >;
1081 + };
1082 +
1083 + pinctrl_i2c1: i2c1grp {
1084 + fsl,pins = <
1085 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1086 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1087 + >;
1088 + };
1089 +
1090 + pinctrl_i2c2: i2c2grp {
1091 + fsl,pins = <
1092 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1093 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1094 + >;
1095 + };
1096 +
1097 + pinctrl_i2c3: i2c3grp {
1098 + fsl,pins = <
1099 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1100 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1101 + >;
1102 + };
1103 +
1104 + pinctrl_uart1: uart1grp {
1105 + fsl,pins = <
1106 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1107 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1108 + >;
1109 + };
1110 +
1111 + pinctrl_uart2: uart2grp {
1112 + fsl,pins = <
1113 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1114 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1115 + >;
1116 + };
1117 +
1118 + pinctrl_uart3: uart3grp {
1119 + fsl,pins = <
1120 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
1121 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
1122 + >;
1123 + };
1124 +
1125 + pinctrl_uart5: uart5grp {
1126 + fsl,pins = <
1127 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1128 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1129 + >;
1130 + };
1131 +
1132 + pinctrl_usbotg: usbotggrp {
1133 + fsl,pins = <
1134 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1135 + >;
1136 + };
1137 + };
1138 +};
1139 +
1140 +&pcie {
1141 + reset-gpio = <&gpio1 0 0>;
1142 + status = "okay";
1143 +};
1144 +
1145 +&uart1 {
1146 + pinctrl-names = "default";
1147 + pinctrl-0 = <&pinctrl_uart1>;
1148 + status = "okay";
1149 +};
1150 +
1151 +&uart2 {
1152 + pinctrl-names = "default";
1153 + pinctrl-0 = <&pinctrl_uart2>;
1154 + status = "okay";
1155 +};
1156 +
1157 +&uart3 {
1158 + pinctrl-names = "default";
1159 + pinctrl-0 = <&pinctrl_uart3>;
1160 + status = "okay";
1161 +};
1162 +
1163 +&uart5 {
1164 + pinctrl-names = "default";
1165 + pinctrl-0 = <&pinctrl_uart5>;
1166 + status = "okay";
1167 +};
1168 +
1169 +&usbotg {
1170 + vbus-supply = <&reg_usb_otg_vbus>;
1171 + pinctrl-names = "default";
1172 + pinctrl-0 = <&pinctrl_usbotg>;
1173 + disable-over-current;
1174 + status = "okay";
1175 +};
1176 +
1177 +&usbh1 {
1178 + status = "okay";
1179 +};
1180 --- /dev/null
1181 +++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
1182 @@ -0,0 +1,490 @@
1183 +/*
1184 + * Copyright 2013 Gateworks Corporation
1185 + *
1186 + * The code contained herein is licensed under the GNU General Public
1187 + * License. You may obtain a copy of the GNU General Public License
1188 + * Version 2 or later at the following locations:
1189 + *
1190 + * http://www.opensource.org/licenses/gpl-license.html
1191 + * http://www.gnu.org/copyleft/gpl.html
1192 + */
1193 +
1194 +/ {
1195 + /* these are used by bootloader for disabling nodes */
1196 + aliases {
1197 + ethernet0 = &fec;
1198 + led0 = &led0;
1199 + led1 = &led1;
1200 + led2 = &led2;
1201 + nand = &gpmi;
1202 + ssi0 = &ssi1;
1203 + usb0 = &usbh1;
1204 + usb1 = &usbotg;
1205 + usdhc2 = &usdhc3;
1206 + };
1207 +
1208 + chosen {
1209 + bootargs = "console=ttymxc1,115200";
1210 + };
1211 +
1212 + leds {
1213 + compatible = "gpio-leds";
1214 +
1215 + led0: user1 {
1216 + label = "user1";
1217 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1218 + default-state = "on";
1219 + linux,default-trigger = "heartbeat";
1220 + };
1221 +
1222 + led1: user2 {
1223 + label = "user2";
1224 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1225 + default-state = "off";
1226 + };
1227 +
1228 + led2: user3 {
1229 + label = "user3";
1230 + gpios = <&gpio4 15 1>; /* 111 - MX6_LOCLED# */
1231 + default-state = "off";
1232 + };
1233 + };
1234 +
1235 + memory {
1236 + reg = <0x10000000 0x20000000>;
1237 + };
1238 +
1239 + pps {
1240 + compatible = "pps-gpio";
1241 + gpios = <&gpio1 26 0>;
1242 + status = "okay";
1243 + };
1244 +
1245 + regulators {
1246 + compatible = "simple-bus";
1247 + #address-cells = <1>;
1248 + #size-cells = <0>;
1249 +
1250 + reg_1p0v: regulator@0 {
1251 + compatible = "regulator-fixed";
1252 + reg = <0>;
1253 + regulator-name = "1P0V";
1254 + regulator-min-microvolt = <1000000>;
1255 + regulator-max-microvolt = <1000000>;
1256 + regulator-always-on;
1257 + };
1258 +
1259 + /* remove this fixed regulator once ltc3676__sw2 driver available */
1260 + reg_1p8v: regulator@1 {
1261 + compatible = "regulator-fixed";
1262 + reg = <1>;
1263 + regulator-name = "1P8V";
1264 + regulator-min-microvolt = <1800000>;
1265 + regulator-max-microvolt = <1800000>;
1266 + regulator-always-on;
1267 + };
1268 +
1269 + reg_3p3v: regulator@2 {
1270 + compatible = "regulator-fixed";
1271 + reg = <2>;
1272 + regulator-name = "3P3V";
1273 + regulator-min-microvolt = <3300000>;
1274 + regulator-max-microvolt = <3300000>;
1275 + regulator-always-on;
1276 + };
1277 +
1278 + reg_5p0v: regulator@3 {
1279 + compatible = "regulator-fixed";
1280 + reg = <3>;
1281 + regulator-name = "5P0V";
1282 + regulator-min-microvolt = <5000000>;
1283 + regulator-max-microvolt = <5000000>;
1284 + regulator-always-on;
1285 + };
1286 +
1287 + reg_usb_otg_vbus: regulator@4 {
1288 + compatible = "regulator-fixed";
1289 + reg = <4>;
1290 + regulator-name = "usb_otg_vbus";
1291 + regulator-min-microvolt = <5000000>;
1292 + regulator-max-microvolt = <5000000>;
1293 + gpio = <&gpio3 22 0>;
1294 + enable-active-high;
1295 + };
1296 + };
1297 +
1298 + sound {
1299 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
1300 + "fsl,imx-audio-sgtl5000";
1301 + model = "imx6q-sabrelite-sgtl5000";
1302 + ssi-controller = <&ssi1>;
1303 + audio-codec = <&codec>;
1304 + audio-routing =
1305 + "MIC_IN", "Mic Jack",
1306 + "Mic Jack", "Mic Bias",
1307 + "Headphone Jack", "HP_OUT";
1308 + mux-int-port = <1>;
1309 + mux-ext-port = <4>;
1310 + };
1311 +};
1312 +
1313 +&audmux {
1314 + pinctrl-names = "default";
1315 + pinctrl-0 = <&pinctrl_audmux>;
1316 + status = "okay";
1317 +};
1318 +
1319 +&fec {
1320 + pinctrl-names = "default";
1321 + pinctrl-0 = <&pinctrl_enet>;
1322 + phy-mode = "rgmii";
1323 + phy-reset-gpios = <&gpio1 30 0>;
1324 + status = "okay";
1325 +};
1326 +
1327 +&gpmi {
1328 + pinctrl-names = "default";
1329 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1330 + status = "okay";
1331 +};
1332 +
1333 +&i2c1 {
1334 + clock-frequency = <100000>;
1335 + pinctrl-names = "default";
1336 + pinctrl-0 = <&pinctrl_i2c1>;
1337 + status = "okay";
1338 +
1339 + eeprom1: eeprom@50 {
1340 + compatible = "atmel,24c02";
1341 + reg = <0x50>;
1342 + pagesize = <16>;
1343 + };
1344 +
1345 + eeprom2: eeprom@51 {
1346 + compatible = "atmel,24c02";
1347 + reg = <0x51>;
1348 + pagesize = <16>;
1349 + };
1350 +
1351 + eeprom3: eeprom@52 {
1352 + compatible = "atmel,24c02";
1353 + reg = <0x52>;
1354 + pagesize = <16>;
1355 + };
1356 +
1357 + eeprom4: eeprom@53 {
1358 + compatible = "atmel,24c02";
1359 + reg = <0x53>;
1360 + pagesize = <16>;
1361 + };
1362 +
1363 + gpio: pca9555@23 {
1364 + compatible = "nxp,pca9555";
1365 + reg = <0x23>;
1366 + gpio-controller;
1367 + #gpio-cells = <2>;
1368 + };
1369 +
1370 + hwmon: gsc@29 {
1371 + compatible = "gw,gsp";
1372 + reg = <0x29>;
1373 + };
1374 +
1375 + rtc: ds1672@68 {
1376 + compatible = "dallas,ds1672";
1377 + reg = <0x68>;
1378 + };
1379 +};
1380 +
1381 +&i2c2 {
1382 + clock-frequency = <100000>;
1383 + pinctrl-names = "default";
1384 + pinctrl-0 = <&pinctrl_i2c2>;
1385 + status = "okay";
1386 +
1387 + pciswitch: pex8609@3f {
1388 + compatible = "plx,pex8609";
1389 + reg = <0x3f>;
1390 + };
1391 +
1392 + pmic: ltc3676@3c {
1393 + compatible = "ltc,ltc3676";
1394 + reg = <0x3c>;
1395 +
1396 + regulators {
1397 + sw1_reg: ltc3676__sw1 {
1398 + regulator-min-microvolt = <1175000>;
1399 + regulator-max-microvolt = <1175000>;
1400 + regulator-boot-on;
1401 + regulator-always-on;
1402 + };
1403 +
1404 + sw2_reg: ltc3676__sw2 {
1405 + regulator-min-microvolt = <1800000>;
1406 + regulator-max-microvolt = <1800000>;
1407 + regulator-boot-on;
1408 + regulator-always-on;
1409 + };
1410 +
1411 + sw3_reg: ltc3676__sw3 {
1412 + regulator-min-microvolt = <1175000>;
1413 + regulator-max-microvolt = <1175000>;
1414 + regulator-boot-on;
1415 + regulator-always-on;
1416 + };
1417 +
1418 + sw4_reg: ltc3676__sw4 {
1419 + regulator-min-microvolt = <1500000>;
1420 + regulator-max-microvolt = <1500000>;
1421 + regulator-boot-on;
1422 + regulator-always-on;
1423 + };
1424 +
1425 + ldo2_reg: ltc3676__ldo2 {
1426 + regulator-min-microvolt = <2500000>;
1427 + regulator-max-microvolt = <2500000>;
1428 + regulator-boot-on;
1429 + regulator-always-on;
1430 + };
1431 +
1432 + ldo3_reg: ltc3676__ldo3 {
1433 + regulator-min-microvolt = <1800000>;
1434 + regulator-max-microvolt = <1800000>;
1435 + regulator-boot-on;
1436 + regulator-always-on;
1437 + };
1438 +
1439 + ldo4_reg: ltc3676__ldo4 {
1440 + regulator-min-microvolt = <3000000>;
1441 + regulator-max-microvolt = <3000000>;
1442 + };
1443 + };
1444 + };
1445 +};
1446 +
1447 +&i2c3 {
1448 + clock-frequency = <100000>;
1449 + pinctrl-names = "default";
1450 + pinctrl-0 = <&pinctrl_i2c3>;
1451 + status = "okay";
1452 +
1453 + accelerometer: fxos8700@1e {
1454 + compatible = "fsl,fxos8700";
1455 + reg = <0x13>;
1456 + };
1457 +
1458 + codec: sgtl5000@0a {
1459 + compatible = "fsl,sgtl5000";
1460 + reg = <0x0a>;
1461 + clocks = <&clks 169>;
1462 + VDDA-supply = <&reg_1p8v>;
1463 + VDDIO-supply = <&reg_3p3v>;
1464 + };
1465 +
1466 + touchscreen: egalax_ts@04 {
1467 + compatible = "eeti,egalax_ts";
1468 + reg = <0x04>;
1469 + interrupt-parent = <&gpio7>;
1470 + interrupts = <12 2>; /* gpio7_12 active low */
1471 + wakeup-gpios = <&gpio7 12 0>;
1472 + };
1473 +
1474 + videoin: adv7180@20 {
1475 + compatible = "adi,adv7180";
1476 + reg = <0x20>;
1477 + };
1478 +};
1479 +
1480 +&iomuxc {
1481 + pinctrl-names = "default";
1482 + pinctrl-0 = <&pinctrl_hog>;
1483 +
1484 + imx6qdl-gw52xx {
1485 + pinctrl_hog: hoggrp {
1486 + fsl,pins = <
1487 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* MEZZ_DIO0 */
1488 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* MEZZ_DIO1 */
1489 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
1490 + MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x80000000 /* VIDDEC_PDN# */
1491 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 /* PHY Reset */
1492 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE_RST# */
1493 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_PWDN */
1494 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
1495 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
1496 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USB_SEL_PCI */
1497 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
1498 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
1499 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
1500 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
1501 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* LVDS_TCH# */
1502 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_CD# */
1503 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x80000000 /* UART2_EN# */
1504 + >;
1505 + };
1506 +
1507 + pinctrl_audmux: audmuxgrp {
1508 + fsl,pins = <
1509 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
1510 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
1511 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
1512 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
1513 + >;
1514 + };
1515 +
1516 + pinctrl_enet: enetgrp {
1517 + fsl,pins = <
1518 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
1519 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
1520 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
1521 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1522 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1523 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1524 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
1525 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
1526 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
1527 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
1528 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
1529 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
1530 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
1531 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
1532 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
1533 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
1534 + >;
1535 + };
1536 +
1537 + pinctrl_gpmi_nand: gpminandgrp {
1538 + fsl,pins = <
1539 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
1540 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
1541 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
1542 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
1543 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
1544 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
1545 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
1546 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
1547 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
1548 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
1549 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
1550 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
1551 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
1552 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
1553 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
1554 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
1555 + >;
1556 + };
1557 +
1558 + pinctrl_i2c1: i2c1grp {
1559 + fsl,pins = <
1560 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
1561 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
1562 + >;
1563 + };
1564 +
1565 + pinctrl_i2c2: i2c2grp {
1566 + fsl,pins = <
1567 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
1568 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
1569 + >;
1570 + };
1571 +
1572 + pinctrl_i2c3: i2c3grp {
1573 + fsl,pins = <
1574 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
1575 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
1576 + >;
1577 + };
1578 +
1579 + pinctrl_uart1: uart1grp {
1580 + fsl,pins = <
1581 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1582 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1583 + >;
1584 + };
1585 +
1586 + pinctrl_uart2: uart2grp {
1587 + fsl,pins = <
1588 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
1589 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
1590 + >;
1591 + };
1592 +
1593 + pinctrl_uart5: uart5grp {
1594 + fsl,pins = <
1595 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
1596 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
1597 + >;
1598 + };
1599 +
1600 + pinctrl_usbotg: usbotggrp {
1601 + fsl,pins = <
1602 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
1603 + >;
1604 + };
1605 +
1606 + pinctrl_usdhc3: usdhc3grp {
1607 + fsl,pins = <
1608 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
1609 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
1610 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
1611 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
1612 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
1613 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
1614 + >;
1615 + };
1616 + };
1617 +};
1618 +
1619 +&ldb {
1620 + status = "okay";
1621 + lvds-channel@0 {
1622 + crtcs = <&ipu1 0>, <&ipu1 1>;
1623 + };
1624 +};
1625 +
1626 +&pcie {
1627 + reset-gpio = <&gpio1 29 0>;
1628 + status = "okay";
1629 +};
1630 +
1631 +&ssi1 {
1632 + fsl,mode = "i2s-slave";
1633 + status = "okay";
1634 +};
1635 +
1636 +&uart1 {
1637 + pinctrl-names = "default";
1638 + pinctrl-0 = <&pinctrl_uart1>;
1639 + status = "okay";
1640 +};
1641 +
1642 +&uart2 {
1643 + pinctrl-names = "default";
1644 + pinctrl-0 = <&pinctrl_uart2>;
1645 + status = "okay";
1646 +};
1647 +
1648 +&uart5 {
1649 + pinctrl-names = "default";
1650 + pinctrl-0 = <&pinctrl_uart5>;
1651 + status = "okay";
1652 +};
1653 +
1654 +&usbotg {
1655 + vbus-supply = <&reg_usb_otg_vbus>;
1656 + pinctrl-names = "default";
1657 + pinctrl-0 = <&pinctrl_usbotg>;
1658 + disable-over-current;
1659 + status = "okay";
1660 +};
1661 +
1662 +&usbh1 {
1663 + status = "okay";
1664 +};
1665 +
1666 +&usdhc3 {
1667 + pinctrl-names = "default";
1668 + pinctrl-0 = <&pinctrl_usdhc3>;
1669 + cd-gpios = <&gpio7 0 0>;
1670 + vmmc-supply = <&reg_3p3v>;
1671 + status = "okay";
1672 +};
1673 --- /dev/null
1674 +++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
1675 @@ -0,0 +1,553 @@
1676 +/*
1677 + * Copyright 2013 Gateworks Corporation
1678 + *
1679 + * The code contained herein is licensed under the GNU General Public
1680 + * License. You may obtain a copy of the GNU General Public License
1681 + * Version 2 or later at the following locations:
1682 + *
1683 + * http://www.opensource.org/licenses/gpl-license.html
1684 + * http://www.gnu.org/copyleft/gpl.html
1685 + */
1686 +
1687 +/ {
1688 + /* these are used by bootloader for disabling nodes */
1689 + aliases {
1690 + can0 = &can1;
1691 + ethernet0 = &fec;
1692 + ethernet1 = &eth1;
1693 + led0 = &led0;
1694 + led1 = &led1;
1695 + led2 = &led2;
1696 + nand = &gpmi;
1697 + sky2 = &eth1;
1698 + ssi0 = &ssi1;
1699 + usb0 = &usbh1;
1700 + usb1 = &usbotg;
1701 + usdhc2 = &usdhc3;
1702 + };
1703 +
1704 + chosen {
1705 + bootargs = "console=ttymxc1,115200";
1706 + };
1707 +
1708 + leds {
1709 + compatible = "gpio-leds";
1710 +
1711 + led0: user1 {
1712 + label = "user1";
1713 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
1714 + default-state = "on";
1715 + linux,default-trigger = "heartbeat";
1716 + };
1717 +
1718 + led1: user2 {
1719 + label = "user2";
1720 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
1721 + default-state = "off";
1722 + };
1723 +
1724 + led2: user3 {
1725 + label = "user3";
1726 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
1727 + default-state = "off";
1728 + };
1729 + };
1730 +
1731 + memory {
1732 + reg = <0x10000000 0x40000000>;
1733 + };
1734 +
1735 + pps {
1736 + compatible = "pps-gpio";
1737 + gpios = <&gpio1 26 0>;
1738 + status = "okay";
1739 + };
1740 +
1741 + regulators {
1742 + compatible = "simple-bus";
1743 + #address-cells = <1>;
1744 + #size-cells = <0>;
1745 +
1746 + reg_1p0v: regulator@0 {
1747 + compatible = "regulator-fixed";
1748 + reg = <0>;
1749 + regulator-name = "1P0V";
1750 + regulator-min-microvolt = <1000000>;
1751 + regulator-max-microvolt = <1000000>;
1752 + regulator-always-on;
1753 + };
1754 +
1755 + /* remove when pmic 1p8 regulator available */
1756 + reg_1p8v: regulator@1 {
1757 + compatible = "regulator-fixed";
1758 + reg = <1>;
1759 + regulator-name = "1P8V";
1760 + regulator-min-microvolt = <1800000>;
1761 + regulator-max-microvolt = <1800000>;
1762 + regulator-always-on;
1763 + };
1764 +
1765 + reg_3p3v: regulator@2 {
1766 + compatible = "regulator-fixed";
1767 + reg = <2>;
1768 + regulator-name = "3P3V";
1769 + regulator-min-microvolt = <3300000>;
1770 + regulator-max-microvolt = <3300000>;
1771 + regulator-always-on;
1772 + };
1773 +
1774 + reg_usb_h1_vbus: regulator@3 {
1775 + compatible = "regulator-fixed";
1776 + reg = <3>;
1777 + regulator-name = "usb_h1_vbus";
1778 + regulator-min-microvolt = <5000000>;
1779 + regulator-max-microvolt = <5000000>;
1780 + regulator-always-on;
1781 + };
1782 +
1783 + reg_usb_otg_vbus: regulator@4 {
1784 + compatible = "regulator-fixed";
1785 + reg = <4>;
1786 + regulator-name = "usb_otg_vbus";
1787 + regulator-min-microvolt = <5000000>;
1788 + regulator-max-microvolt = <5000000>;
1789 + gpio = <&gpio3 22 0>;
1790 + enable-active-high;
1791 + };
1792 + };
1793 +
1794 + sound {
1795 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
1796 + "fsl,imx-audio-sgtl5000";
1797 + model = "imx6q-sabrelite-sgtl5000";
1798 + ssi-controller = <&ssi1>;
1799 + audio-codec = <&codec>;
1800 + audio-routing =
1801 + "MIC_IN", "Mic Jack",
1802 + "Mic Jack", "Mic Bias",
1803 + "Headphone Jack", "HP_OUT";
1804 + mux-int-port = <1>;
1805 + mux-ext-port = <4>;
1806 + };
1807 +};
1808 +
1809 +&audmux {
1810 + pinctrl-names = "default";
1811 + pinctrl-0 = <&pinctrl_audmux>;
1812 + status = "okay";
1813 +};
1814 +
1815 +&can1 {
1816 + pinctrl-names = "default";
1817 + pinctrl-0 = <&pinctrl_flexcan1>;
1818 + status = "okay";
1819 +};
1820 +
1821 +&fec {
1822 + pinctrl-names = "default";
1823 + pinctrl-0 = <&pinctrl_enet>;
1824 + phy-mode = "rgmii";
1825 + phy-reset-gpios = <&gpio1 30 0>;
1826 + status = "okay";
1827 +};
1828 +
1829 +&gpmi {
1830 + pinctrl-names = "default";
1831 + pinctrl-0 = <&pinctrl_gpmi_nand>;
1832 + status = "okay";
1833 +};
1834 +
1835 +&i2c1 {
1836 + clock-frequency = <100000>;
1837 + pinctrl-names = "default";
1838 + pinctrl-0 = <&pinctrl_i2c1>;
1839 + status = "okay";
1840 +
1841 + eeprom1: eeprom@50 {
1842 + compatible = "atmel,24c02";
1843 + reg = <0x50>;
1844 + pagesize = <16>;
1845 + };
1846 +
1847 + eeprom2: eeprom@51 {
1848 + compatible = "atmel,24c02";
1849 + reg = <0x51>;
1850 + pagesize = <16>;
1851 + };
1852 +
1853 + eeprom3: eeprom@52 {
1854 + compatible = "atmel,24c02";
1855 + reg = <0x52>;
1856 + pagesize = <16>;
1857 + };
1858 +
1859 + eeprom4: eeprom@53 {
1860 + compatible = "atmel,24c02";
1861 + reg = <0x53>;
1862 + pagesize = <16>;
1863 + };
1864 +
1865 + gpio: pca9555@23 {
1866 + compatible = "nxp,pca9555";
1867 + reg = <0x23>;
1868 + gpio-controller;
1869 + #gpio-cells = <2>;
1870 + };
1871 +
1872 + hwmon: gsc@29 {
1873 + compatible = "gw,gsp";
1874 + reg = <0x29>;
1875 + };
1876 +
1877 + rtc: ds1672@68 {
1878 + compatible = "dallas,ds1672";
1879 + reg = <0x68>;
1880 + };
1881 +};
1882 +
1883 +&i2c2 {
1884 + clock-frequency = <100000>;
1885 + pinctrl-names = "default";
1886 + pinctrl-0 = <&pinctrl_i2c2>;
1887 + status = "okay";
1888 +
1889 + pciclkgen: si53156@6b {
1890 + compatible = "sil,si53156";
1891 + reg = <0x6b>;
1892 + };
1893 +
1894 + pciswitch: pex8606@3f {
1895 + compatible = "plx,pex8606";
1896 + reg = <0x3f>;
1897 + };
1898 +
1899 + pmic: ltc3676@3c {
1900 + compatible = "ltc,ltc3676";
1901 + reg = <0x3c>;
1902 +
1903 + regulators {
1904 + /* VDD_SOC */
1905 + sw1_reg: ltc3676__sw1 {
1906 + regulator-min-microvolt = <1175000>;
1907 + regulator-max-microvolt = <1175000>;
1908 + regulator-boot-on;
1909 + regulator-always-on;
1910 + };
1911 +
1912 + /* VDD_1P8 */
1913 + sw2_reg: ltc3676__sw2 {
1914 + regulator-min-microvolt = <1800000>;
1915 + regulator-max-microvolt = <1800000>;
1916 + regulator-boot-on;
1917 + regulator-always-on;
1918 + };
1919 +
1920 + /* VDD_ARM */
1921 + sw3_reg: ltc3676__sw3 {
1922 + regulator-min-microvolt = <1175000>;
1923 + regulator-max-microvolt = <1175000>;
1924 + regulator-boot-on;
1925 + regulator-always-on;
1926 + };
1927 +
1928 + /* VDD_DDR */
1929 + sw4_reg: ltc3676__sw4 {
1930 + regulator-min-microvolt = <1500000>;
1931 + regulator-max-microvolt = <1500000>;
1932 + regulator-boot-on;
1933 + regulator-always-on;
1934 + };
1935 +
1936 + /* VDD_2P5 */
1937 + ldo2_reg: ltc3676__ldo2 {
1938 + regulator-min-microvolt = <2500000>;
1939 + regulator-max-microvolt = <2500000>;
1940 + regulator-boot-on;
1941 + regulator-always-on;
1942 + };
1943 +
1944 + /* VDD_1P8 */
1945 + ldo3_reg: ltc3676__ldo3 {
1946 + regulator-min-microvolt = <1800000>;
1947 + regulator-max-microvolt = <1800000>;
1948 + regulator-boot-on;
1949 + regulator-always-on;
1950 + };
1951 +
1952 + /* VDD_HIGH */
1953 + ldo4_reg: ltc3676__ldo4 {
1954 + regulator-min-microvolt = <3000000>;
1955 + regulator-max-microvolt = <3000000>;
1956 + };
1957 + };
1958 + };
1959 +};
1960 +
1961 +&i2c3 {
1962 + clock-frequency = <100000>;
1963 + pinctrl-names = "default";
1964 + pinctrl-0 = <&pinctrl_i2c3>;
1965 + status = "okay";
1966 +
1967 + accelerometer: fxos8700@1e {
1968 + compatible = "fsl,fxos8700";
1969 + reg = <0x1e>;
1970 + };
1971 +
1972 + codec: sgtl5000@0a {
1973 + compatible = "fsl,sgtl5000";
1974 + reg = <0x0a>;
1975 + clocks = <&clks 201>;
1976 + VDDA-supply = <&reg_1p8v>;
1977 + VDDIO-supply = <&reg_3p3v>;
1978 + };
1979 +
1980 + hdmiin: adv7611@4c {
1981 + compatible = "adi,adv7611";
1982 + reg = <0x4c>;
1983 + };
1984 +
1985 + touchscreen: egalax_ts@04 {
1986 + compatible = "eeti,egalax_ts";
1987 + reg = <0x04>;
1988 + interrupt-parent = <&gpio1>;
1989 + interrupts = <11 2>; /* gpio1_11 active low */
1990 + wakeup-gpios = <&gpio1 11 0>;
1991 + };
1992 +
1993 + videoout: adv7393@2a {
1994 + compatible = "adi,adv7393";
1995 + reg = <0x2a>;
1996 + };
1997 +
1998 + videoin: adv7180@20 {
1999 + compatible = "adi,adv7180";
2000 + reg = <0x20>;
2001 + };
2002 +};
2003 +
2004 +&iomuxc {
2005 + pinctrl-names = "default";
2006 + pinctrl-0 = <&pinctrl_hog>;
2007 +
2008 + imx6qdl-gw53xx {
2009 + pinctrl_hog: hoggrp {
2010 + fsl,pins = <
2011 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* PCIE6EXP_DIO0 */
2012 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x80000000 /* PCIE6EXP_DIO1 */
2013 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2014 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000 /* GPS_SHDN */
2015 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2016 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2017 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2018 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2019 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2020 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x80000000 /* PMIC_IRQ# */
2021 + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 /* HUB_RST# */
2022 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* PCIE_WDIS# */
2023 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 /* ACCEL_IRQ# */
2024 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2025 + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x80000000 /* USBOTG_OC# */
2026 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2027 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2028 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x80000000 /* TOUCH_IRQ# */
2029 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* SD3_DET# */
2030 + >;
2031 + };
2032 +
2033 + pinctrl_audmux: audmuxgrp {
2034 + fsl,pins = <
2035 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2036 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2037 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2038 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2039 + >;
2040 + };
2041 +
2042 + pinctrl_enet: enetgrp {
2043 + fsl,pins = <
2044 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2045 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2046 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2047 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2048 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2049 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2050 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2051 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2052 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2053 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2054 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2055 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2056 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2057 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2058 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2059 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2060 + >;
2061 + };
2062 +
2063 + pinctrl_flexcan1: flexcan1grp {
2064 + fsl,pins = <
2065 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2066 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2067 + >;
2068 + };
2069 +
2070 + pinctrl_gpmi_nand: gpminandgrp {
2071 + fsl,pins = <
2072 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2073 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2074 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2075 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2076 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2077 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2078 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2079 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2080 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2081 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2082 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2083 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2084 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2085 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2086 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2087 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2088 + >;
2089 + };
2090 +
2091 + pinctrl_i2c1: i2c1grp {
2092 + fsl,pins = <
2093 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2094 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2095 + >;
2096 + };
2097 +
2098 + pinctrl_i2c2: i2c2grp {
2099 + fsl,pins = <
2100 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2101 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2102 + >;
2103 + };
2104 +
2105 + pinctrl_i2c3: i2c3grp {
2106 + fsl,pins = <
2107 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2108 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2109 + >;
2110 + };
2111 +
2112 + pinctrl_uart1: uart1grp {
2113 + fsl,pins = <
2114 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2115 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2116 + >;
2117 + };
2118 +
2119 + pinctrl_uart2: uart2grp {
2120 + fsl,pins = <
2121 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2122 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2123 + >;
2124 + };
2125 +
2126 + pinctrl_uart5: uart5grp {
2127 + fsl,pins = <
2128 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2129 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2130 + >;
2131 + };
2132 +
2133 + pinctrl_usbotg: usbotggrp {
2134 + fsl,pins = <
2135 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2136 + >;
2137 + };
2138 +
2139 + pinctrl_usdhc3: usdhc3grp {
2140 + fsl,pins = <
2141 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2142 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2143 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2144 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2145 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2146 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2147 + >;
2148 + };
2149 + };
2150 +};
2151 +
2152 +&ldb {
2153 + status = "okay";
2154 +
2155 + lvds-channel@1 {
2156 + fsl,data-mapping = "spwg";
2157 + fsl,data-width = <18>;
2158 + status = "okay";
2159 +
2160 + display-timings {
2161 + native-mode = <&timing0>;
2162 + timing0: hsd100pxn1 {
2163 + clock-frequency = <65000000>;
2164 + hactive = <1024>;
2165 + vactive = <768>;
2166 + hback-porch = <220>;
2167 + hfront-porch = <40>;
2168 + vback-porch = <21>;
2169 + vfront-porch = <7>;
2170 + hsync-len = <60>;
2171 + vsync-len = <10>;
2172 + };
2173 + };
2174 + };
2175 +};
2176 +
2177 +&pcie {
2178 + reset-gpio = <&gpio1 29 0>;
2179 + status = "okay";
2180 +
2181 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2182 + compatible = "marvell,sky2";
2183 + };
2184 +};
2185 +
2186 +&ssi1 {
2187 + fsl,mode = "i2s-slave";
2188 + status = "okay";
2189 +};
2190 +
2191 +&uart1 {
2192 + pinctrl-names = "default";
2193 + pinctrl-0 = <&pinctrl_uart1>;
2194 + status = "okay";
2195 +};
2196 +
2197 +&uart2 {
2198 + pinctrl-names = "default";
2199 + pinctrl-0 = <&pinctrl_uart2>;
2200 + status = "okay";
2201 +};
2202 +
2203 +&uart5 {
2204 + pinctrl-names = "default";
2205 + pinctrl-0 = <&pinctrl_uart5>;
2206 + status = "okay";
2207 +};
2208 +
2209 +&usbotg {
2210 + vbus-supply = <&reg_usb_otg_vbus>;
2211 + pinctrl-names = "default";
2212 + pinctrl-0 = <&pinctrl_usbotg>;
2213 + disable-over-current;
2214 + status = "okay";
2215 +};
2216 +
2217 +&usbh1 {
2218 + vbus-supply = <&reg_usb_h1_vbus>;
2219 + status = "okay";
2220 +};
2221 +
2222 +&usdhc3 {
2223 + pinctrl-names = "default";
2224 + pinctrl-0 = <&pinctrl_usdhc3>;
2225 + cd-gpios = <&gpio7 0 0>;
2226 + vmmc-supply = <&reg_3p3v>;
2227 + status = "okay";
2228 +};
2229 --- /dev/null
2230 +++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
2231 @@ -0,0 +1,580 @@
2232 +/*
2233 + * Copyright 2013 Gateworks Corporation
2234 + *
2235 + * The code contained herein is licensed under the GNU General Public
2236 + * License. You may obtain a copy of the GNU General Public License
2237 + * Version 2 or later at the following locations:
2238 + *
2239 + * http://www.opensource.org/licenses/gpl-license.html
2240 + * http://www.gnu.org/copyleft/gpl.html
2241 + */
2242 +
2243 +/ {
2244 + /* these are used by bootloader for disabling nodes */
2245 + aliases {
2246 + can0 = &can1;
2247 + ethernet0 = &fec;
2248 + ethernet1 = &eth1;
2249 + led0 = &led0;
2250 + led1 = &led1;
2251 + led2 = &led2;
2252 + nand = &gpmi;
2253 + sky2 = &eth1;
2254 + ssi0 = &ssi1;
2255 + usb0 = &usbh1;
2256 + usb1 = &usbotg;
2257 + usdhc2 = &usdhc3;
2258 + };
2259 +
2260 + chosen {
2261 + bootargs = "console=ttymxc1,115200";
2262 + };
2263 +
2264 + leds {
2265 + compatible = "gpio-leds";
2266 +
2267 + led0: user1 {
2268 + label = "user1";
2269 + gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
2270 + default-state = "on";
2271 + linux,default-trigger = "heartbeat";
2272 + };
2273 +
2274 + led1: user2 {
2275 + label = "user2";
2276 + gpios = <&gpio4 7 0>; /* 103 -> MX6_PANLEDR */
2277 + default-state = "off";
2278 + };
2279 +
2280 + led2: user3 {
2281 + label = "user3";
2282 + gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
2283 + default-state = "off";
2284 + };
2285 + };
2286 +
2287 + memory {
2288 + reg = <0x10000000 0x40000000>;
2289 + };
2290 +
2291 + pps {
2292 + compatible = "pps-gpio";
2293 + gpios = <&gpio1 26 0>;
2294 + status = "okay";
2295 + };
2296 +
2297 + regulators {
2298 + compatible = "simple-bus";
2299 + #address-cells = <1>;
2300 + #size-cells = <0>;
2301 +
2302 + reg_1p0v: regulator@0 {
2303 + compatible = "regulator-fixed";
2304 + reg = <0>;
2305 + regulator-name = "1P0V";
2306 + regulator-min-microvolt = <1000000>;
2307 + regulator-max-microvolt = <1000000>;
2308 + regulator-always-on;
2309 + };
2310 +
2311 + reg_3p3v: regulator@1 {
2312 + compatible = "regulator-fixed";
2313 + reg = <1>;
2314 + regulator-name = "3P3V";
2315 + regulator-min-microvolt = <3300000>;
2316 + regulator-max-microvolt = <3300000>;
2317 + regulator-always-on;
2318 + };
2319 +
2320 + reg_usb_h1_vbus: regulator@2 {
2321 + compatible = "regulator-fixed";
2322 + reg = <2>;
2323 + regulator-name = "usb_h1_vbus";
2324 + regulator-min-microvolt = <5000000>;
2325 + regulator-max-microvolt = <5000000>;
2326 + regulator-always-on;
2327 + };
2328 +
2329 + reg_usb_otg_vbus: regulator@3 {
2330 + compatible = "regulator-fixed";
2331 + reg = <3>;
2332 + regulator-name = "usb_otg_vbus";
2333 + regulator-min-microvolt = <5000000>;
2334 + regulator-max-microvolt = <5000000>;
2335 + gpio = <&gpio3 22 0>;
2336 + enable-active-high;
2337 + };
2338 + };
2339 +
2340 + sound {
2341 + compatible = "fsl,imx6q-sabrelite-sgtl5000",
2342 + "fsl,imx-audio-sgtl5000";
2343 + model = "imx6q-sabrelite-sgtl5000";
2344 + ssi-controller = <&ssi1>;
2345 + audio-codec = <&codec>;
2346 + audio-routing =
2347 + "MIC_IN", "Mic Jack",
2348 + "Mic Jack", "Mic Bias",
2349 + "Headphone Jack", "HP_OUT";
2350 + mux-int-port = <1>;
2351 + mux-ext-port = <4>;
2352 + };
2353 +};
2354 +
2355 +&audmux {
2356 + pinctrl-names = "default";
2357 + pinctrl-0 = <&pinctrl_audmux>; /* AUD4<->sgtl5000 */
2358 + status = "okay";
2359 +};
2360 +
2361 +&can1 {
2362 + pinctrl-names = "default";
2363 + pinctrl-0 = <&pinctrl_flexcan1>;
2364 + status = "okay";
2365 +};
2366 +
2367 +&fec {
2368 + pinctrl-names = "default";
2369 + pinctrl-0 = <&pinctrl_enet>;
2370 + phy-mode = "rgmii";
2371 + phy-reset-gpios = <&gpio1 30 0>;
2372 + status = "okay";
2373 +};
2374 +
2375 +&gpmi {
2376 + pinctrl-names = "default";
2377 + pinctrl-0 = <&pinctrl_gpmi_nand>;
2378 + status = "okay";
2379 +};
2380 +
2381 +&i2c1 {
2382 + clock-frequency = <100000>;
2383 + pinctrl-names = "default";
2384 + pinctrl-0 = <&pinctrl_i2c1>;
2385 + status = "okay";
2386 +
2387 + eeprom1: eeprom@50 {
2388 + compatible = "atmel,24c02";
2389 + reg = <0x50>;
2390 + pagesize = <16>;
2391 + };
2392 +
2393 + eeprom2: eeprom@51 {
2394 + compatible = "atmel,24c02";
2395 + reg = <0x51>;
2396 + pagesize = <16>;
2397 + };
2398 +
2399 + eeprom3: eeprom@52 {
2400 + compatible = "atmel,24c02";
2401 + reg = <0x52>;
2402 + pagesize = <16>;
2403 + };
2404 +
2405 + eeprom4: eeprom@53 {
2406 + compatible = "atmel,24c02";
2407 + reg = <0x53>;
2408 + pagesize = <16>;
2409 + };
2410 +
2411 + gpio: pca9555@23 {
2412 + compatible = "nxp,pca9555";
2413 + reg = <0x23>;
2414 + gpio-controller;
2415 + #gpio-cells = <2>;
2416 + };
2417 +
2418 + hwmon: gsc@29 {
2419 + compatible = "gw,gsp";
2420 + reg = <0x29>;
2421 + };
2422 +
2423 + rtc: ds1672@68 {
2424 + compatible = "dallas,ds1672";
2425 + reg = <0x68>;
2426 + };
2427 +};
2428 +
2429 +&i2c2 {
2430 + clock-frequency = <100000>;
2431 + pinctrl-names = "default";
2432 + pinctrl-0 = <&pinctrl_i2c2>;
2433 + status = "okay";
2434 +
2435 + pmic: pfuze100@08 {
2436 + compatible = "fsl,pfuze100";
2437 + reg = <0x08>;
2438 +
2439 + regulators {
2440 + sw1a_reg: sw1ab {
2441 + regulator-min-microvolt = <300000>;
2442 + regulator-max-microvolt = <1875000>;
2443 + regulator-boot-on;
2444 + regulator-always-on;
2445 + regulator-ramp-delay = <6250>;
2446 + };
2447 +
2448 + sw1c_reg: sw1c {
2449 + regulator-min-microvolt = <300000>;
2450 + regulator-max-microvolt = <1875000>;
2451 + regulator-boot-on;
2452 + regulator-always-on;
2453 + regulator-ramp-delay = <6250>;
2454 + };
2455 +
2456 + sw2_reg: sw2 {
2457 + regulator-min-microvolt = <800000>;
2458 + regulator-max-microvolt = <3950000>;
2459 + regulator-boot-on;
2460 + regulator-always-on;
2461 + };
2462 +
2463 + sw3a_reg: sw3a {
2464 + regulator-min-microvolt = <400000>;
2465 + regulator-max-microvolt = <1975000>;
2466 + regulator-boot-on;
2467 + regulator-always-on;
2468 + };
2469 +
2470 + sw3b_reg: sw3b {
2471 + regulator-min-microvolt = <400000>;
2472 + regulator-max-microvolt = <1975000>;
2473 + regulator-boot-on;
2474 + regulator-always-on;
2475 + };
2476 +
2477 + sw4_reg: sw4 {
2478 + regulator-min-microvolt = <800000>;
2479 + regulator-max-microvolt = <3300000>;
2480 + };
2481 +
2482 + swbst_reg: swbst {
2483 + regulator-min-microvolt = <5000000>;
2484 + regulator-max-microvolt = <5150000>;
2485 + };
2486 +
2487 + snvs_reg: vsnvs {
2488 + regulator-min-microvolt = <1000000>;
2489 + regulator-max-microvolt = <3000000>;
2490 + regulator-boot-on;
2491 + regulator-always-on;
2492 + };
2493 +
2494 + vref_reg: vrefddr {
2495 + regulator-boot-on;
2496 + regulator-always-on;
2497 + };
2498 +
2499 + vgen1_reg: vgen1 {
2500 + regulator-min-microvolt = <800000>;
2501 + regulator-max-microvolt = <1550000>;
2502 + };
2503 +
2504 + vgen2_reg: vgen2 {
2505 + regulator-min-microvolt = <800000>;
2506 + regulator-max-microvolt = <1550000>;
2507 + };
2508 +
2509 + vgen3_reg: vgen3 {
2510 + regulator-min-microvolt = <1800000>;
2511 + regulator-max-microvolt = <3300000>;
2512 + };
2513 +
2514 + vgen4_reg: vgen4 {
2515 + regulator-min-microvolt = <1800000>;
2516 + regulator-max-microvolt = <3300000>;
2517 + regulator-always-on;
2518 + };
2519 +
2520 + vgen5_reg: vgen5 {
2521 + regulator-min-microvolt = <1800000>;
2522 + regulator-max-microvolt = <3300000>;
2523 + regulator-always-on;
2524 + };
2525 +
2526 + vgen6_reg: vgen6 {
2527 + regulator-min-microvolt = <1800000>;
2528 + regulator-max-microvolt = <3300000>;
2529 + regulator-always-on;
2530 + };
2531 + };
2532 + };
2533 +
2534 + pciswitch: pex8609@3f {
2535 + compatible = "plx,pex8609";
2536 + reg = <0x3f>;
2537 + };
2538 +
2539 + pciclkgen: si52147@6b {
2540 + compatible = "sil,si52147";
2541 + reg = <0x6b>;
2542 + };
2543 +};
2544 +
2545 +&i2c3 {
2546 + clock-frequency = <100000>;
2547 + pinctrl-names = "default";
2548 + pinctrl-0 = <&pinctrl_i2c3>;
2549 + status = "okay";
2550 +
2551 + accelerometer: fxos8700@1e {
2552 + compatible = "fsl,fxos8700";
2553 + reg = <0x1e>;
2554 + };
2555 +
2556 + codec: sgtl5000@0a {
2557 + compatible = "fsl,sgtl5000";
2558 + reg = <0x0a>;
2559 + clocks = <&clks 201>;
2560 + VDDA-supply = <&sw4_reg>;
2561 + VDDIO-supply = <&reg_3p3v>;
2562 + };
2563 +
2564 + hdmiin: adv7611@4c {
2565 + compatible = "adi,adv7611";
2566 + reg = <0x4c>;
2567 + };
2568 +
2569 + touchscreen: egalax_ts@04 {
2570 + compatible = "eeti,egalax_ts";
2571 + reg = <0x04>;
2572 + interrupt-parent = <&gpio7>;
2573 + interrupts = <12 2>; /* gpio7_12 active low */
2574 + wakeup-gpios = <&gpio7 12 0>;
2575 + };
2576 +
2577 + videoout: adv7393@2a {
2578 + compatible = "adi,adv7393";
2579 + reg = <0x2a>;
2580 + };
2581 +
2582 + videoin: adv7180@20 {
2583 + compatible = "adi,adv7180";
2584 + reg = <0x20>;
2585 + };
2586 +};
2587 +
2588 +&iomuxc {
2589 + pinctrl-names = "default";
2590 + pinctrl-0 = <&pinctrl_hog>;
2591 +
2592 + imx6qdl-gw54xx {
2593 + pinctrl_hog: hoggrp {
2594 + fsl,pins = <
2595 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
2596 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
2597 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* GPS_PPS */
2598 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
2599 + MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
2600 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
2601 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* CAN_STBY */
2602 + MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
2603 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
2604 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x80000000 /* user2 led */
2605 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
2606 + MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
2607 + MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
2608 + >;
2609 + };
2610 +
2611 + pinctrl_audmux: audmuxgrp {
2612 + fsl,pins = <
2613 + MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
2614 + MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
2615 + MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
2616 + MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
2617 + >;
2618 + };
2619 +
2620 + pinctrl_enet: enetgrp {
2621 + fsl,pins = <
2622 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
2623 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
2624 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
2625 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
2626 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
2627 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
2628 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
2629 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
2630 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
2631 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
2632 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
2633 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
2634 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
2635 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
2636 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
2637 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
2638 + >;
2639 + };
2640 +
2641 + pinctrl_flexcan1: flexcan1grp {
2642 + fsl,pins = <
2643 + MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
2644 + MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
2645 + >;
2646 + };
2647 +
2648 + pinctrl_gpmi_nand: gpminandgrp {
2649 + fsl,pins = <
2650 + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
2651 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
2652 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
2653 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
2654 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
2655 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
2656 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
2657 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
2658 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
2659 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
2660 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
2661 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
2662 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
2663 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
2664 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
2665 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
2666 + >;
2667 + };
2668 +
2669 + pinctrl_i2c1: i2c1grp {
2670 + fsl,pins = <
2671 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
2672 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
2673 + >;
2674 + };
2675 +
2676 + pinctrl_i2c2: i2c2grp {
2677 + fsl,pins = <
2678 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
2679 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
2680 + >;
2681 + };
2682 +
2683 + pinctrl_i2c3: i2c3grp {
2684 + fsl,pins = <
2685 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
2686 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
2687 + >;
2688 + };
2689 +
2690 + pinctrl_uart1: uart1grp {
2691 + fsl,pins = <
2692 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
2693 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
2694 + >;
2695 + };
2696 +
2697 + pinctrl_uart2: uart2grp {
2698 + fsl,pins = <
2699 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
2700 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
2701 + >;
2702 + };
2703 +
2704 + pinctrl_uart5: uart5grp {
2705 + fsl,pins = <
2706 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
2707 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
2708 + >;
2709 + };
2710 +
2711 + pinctrl_usbotg: usbotggrp {
2712 + fsl,pins = <
2713 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
2714 + >;
2715 + };
2716 +
2717 + pinctrl_usdhc3: usdhc3grp {
2718 + fsl,pins = <
2719 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
2720 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
2721 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
2722 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
2723 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
2724 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
2725 + >;
2726 + };
2727 + };
2728 +};
2729 +
2730 +&ldb {
2731 + status = "okay";
2732 +
2733 + lvds-channel@1 {
2734 + fsl,data-mapping = "spwg";
2735 + fsl,data-width = <18>;
2736 + status = "okay";
2737 +
2738 + display-timings {
2739 + native-mode = <&timing0>;
2740 + timing0: hsd100pxn1 {
2741 + clock-frequency = <65000000>;
2742 + hactive = <1024>;
2743 + vactive = <768>;
2744 + hback-porch = <220>;
2745 + hfront-porch = <40>;
2746 + vback-porch = <21>;
2747 + vfront-porch = <7>;
2748 + hsync-len = <60>;
2749 + vsync-len = <10>;
2750 + };
2751 + };
2752 + };
2753 +};
2754 +
2755 +&pcie {
2756 + reset-gpio = <&gpio1 29 0>;
2757 + status = "okay";
2758 +
2759 + eth1: sky2@8 { /* MAC/PHY on bus 8 */
2760 + compatible = "marvell,sky2";
2761 + };
2762 +};
2763 +
2764 +&ssi1 {
2765 + fsl,mode = "i2s-slave";
2766 + status = "okay";
2767 +};
2768 +
2769 +&ssi2 {
2770 + fsl,mode = "i2s-slave";
2771 + status = "okay";
2772 +};
2773 +
2774 +&uart1 {
2775 + pinctrl-names = "default";
2776 + pinctrl-0 = <&pinctrl_uart1>;
2777 + status = "okay";
2778 +};
2779 +
2780 +&uart2 {
2781 + pinctrl-names = "default";
2782 + pinctrl-0 = <&pinctrl_uart2>;
2783 + status = "okay";
2784 +};
2785 +
2786 +&uart5 {
2787 + pinctrl-names = "default";
2788 + pinctrl-0 = <&pinctrl_uart5>;
2789 + status = "okay";
2790 +};
2791 +
2792 +&usbotg {
2793 + vbus-supply = <&reg_usb_otg_vbus>;
2794 + pinctrl-names = "default";
2795 + pinctrl-0 = <&pinctrl_usbotg>;
2796 + disable-over-current;
2797 + status = "okay";
2798 +};
2799 +
2800 +&usbh1 {
2801 + vbus-supply = <&reg_usb_h1_vbus>;
2802 + status = "okay";
2803 +};
2804 +
2805 +&usdhc3 {
2806 + pinctrl-names = "default";
2807 + pinctrl-0 = <&pinctrl_usdhc3>;
2808 + cd-gpios = <&gpio7 0 0>;
2809 + vmmc-supply = <&reg_3p3v>;
2810 + status = "okay";
2811 +};
OpenWrt Source Repository