aa54f43e8514015a52e8c4a63c805f0e652463bf
[openwrt/openwrt.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-wac510.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
3
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/leds/common.h>
9
10 / {
11 model = "Netgear WAC510";
12 compatible = "netgear,wac510";
13
14 aliases {
15 led-boot = &led_power_amber;
16 led-failsafe = &led_power_amber;
17 led-running = &led_power_green;
18 led-upgrade = &led_power_amber;
19 };
20
21 chosen {
22 bootargs-append = " root=/dev/ubiblock0_1";
23 };
24
25 soc {
26 rng@22000 {
27 status = "okay";
28 };
29
30 counter@4a1000 {
31 compatible = "qcom,qca-gcnt";
32 reg = <0x4a1000 0x4>;
33 };
34
35 tcsr@1949000 {
36 compatible = "qcom,tcsr";
37 reg = <0x1949000 0x100>;
38 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
39 };
40
41 ess_tcsr@1953000 {
42 compatible = "qcom,tcsr";
43 reg = <0x1953000 0x1000>;
44 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
45 };
46
47 tcsr@1957000 {
48 compatible = "qcom,tcsr";
49 reg = <0x1957000 0x100>;
50 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
51 };
52
53 crypto@8e3a000 {
54 status = "okay";
55 };
56
57 watchdog@b017000 {
58 status = "okay";
59 };
60 };
61
62 keys {
63 compatible = "gpio-keys";
64
65 reset {
66 label = "reset";
67 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_RESTART>;
69 };
70 };
71
72 led_spi {
73 compatible = "spi-gpio";
74 #address-cells = <1>;
75 #size-cells = <0>;
76
77 sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
78 mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
79 num-chipselects = <0>;
80
81 ssr: ssr@0 {
82 compatible = "fairchild,74hc595";
83 reg = <0>;
84 gpio-controller;
85 #gpio-cells = <2>;
86 registers-number = <1>;
87 spi-max-frequency = <1000000>;
88 };
89 };
90
91 leds {
92 compatible = "gpio-leds";
93
94 led_power_amber: led-0 {
95 label = "amber:power";
96 color = <LED_COLOR_ID_AMBER>;
97 function = LED_FUNCTION_POWER;
98 gpios = <&ssr 6 GPIO_ACTIVE_LOW>;
99 panic-indicator;
100 };
101
102 led_power_green: led-1 {
103 label = "green:power";
104 color = <LED_COLOR_ID_GREEN>;
105 function = LED_FUNCTION_POWER;
106 gpios = <&ssr 5 GPIO_ACTIVE_LOW>;
107 };
108
109 led-2 {
110 /* 2.4GHz blue - activity */
111 color = <LED_COLOR_ID_BLUE>;
112 function = LED_FUNCTION_WLAN;
113 function-enumerator = <0>;
114 gpios = <&ssr 4 GPIO_ACTIVE_LOW>;
115 linux,default-trigger = "phy0tpt";
116 };
117
118 led-3 {
119 /* 2.4GHz green - link */
120 color = <LED_COLOR_ID_GREEN>;
121 function = LED_FUNCTION_WLAN;
122 function-enumerator = <0>;
123 gpios = <&ssr 3 GPIO_ACTIVE_LOW>;
124 linux,default-trigger = "phy0radio";
125 };
126
127 led-4 {
128 /* 5GHz blue - activity */
129 color = <LED_COLOR_ID_BLUE>;
130 function = LED_FUNCTION_WLAN;
131 function-enumerator = <1>;
132 gpios = <&ssr 2 GPIO_ACTIVE_LOW>;
133 linux,default-trigger = "phy1tpt";
134 };
135
136 led-5 {
137 /* 5GHz green - link */
138 color = <LED_COLOR_ID_GREEN>;
139 function = LED_FUNCTION_WLAN;
140 function-enumerator = <1>;
141 gpios = <&ssr 1 GPIO_ACTIVE_LOW>;
142 linux,default-trigger = "phy1radio";
143 };
144
145 led-6 {
146 color = <LED_COLOR_ID_GREEN>;
147 function = LED_FUNCTION_ACTIVITY;
148 gpios = <&ssr 0 GPIO_ACTIVE_LOW>;
149 };
150 };
151 };
152
153 &qpic_bam {
154 status = "okay";
155 };
156
157 &tlmm {
158 mdio_pins: mdio_pinmux {
159 mux_1 {
160 pins = "gpio53";
161 function = "mdio";
162 bias-pull-up;
163 };
164
165 mux_2 {
166 pins = "gpio52";
167 function = "mdc";
168 bias-pull-up;
169 };
170 };
171
172 serial_pins: serial_pinmux {
173 mux {
174 pins = "gpio60", "gpio61";
175 function = "blsp_uart0";
176 bias-disable;
177 };
178 };
179
180 spi_0_pins: spi_0_pinmux {
181 pinmux {
182 function = "blsp_spi0";
183 pins = "gpio55", "gpio56", "gpio57";
184 drive-strength = <12>;
185 bias-disable;
186 };
187
188 pinmux_cs {
189 function = "gpio";
190 pins = "gpio54", "gpio59";
191 drive-strength = <2>;
192 bias-disable;
193 output-high;
194 };
195 };
196 };
197
198 &blsp_dma {
199 status = "okay";
200 };
201
202 &blsp1_spi1 {
203 status = "okay";
204
205 pinctrl-0 = <&spi_0_pins>;
206 pinctrl-names = "default";
207 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
208 <&tlmm 59 GPIO_ACTIVE_HIGH>;
209
210 flash@0 {
211 compatible = "jedec,spi-nor";
212 spi-max-frequency = <50000000>;
213 reg = <0>;
214
215 partitions {
216 compatible = "fixed-partitions";
217 #address-cells = <1>;
218 #size-cells = <1>;
219
220 partition@0 {
221 label = "0:SBL1";
222 reg = <0x00000000 0x00040000>;
223 read-only;
224 };
225
226 partition@40000 {
227 label = "0:MIBIB";
228 reg = <0x00040000 0x00020000>;
229 read-only;
230 };
231
232 partition@60000 {
233 label = "0:QSEE";
234 reg = <0x00060000 0x00060000>;
235 read-only;
236 };
237
238 partition@c0000 {
239 label = "0:CDT";
240 reg = <0x000c0000 0x00010000>;
241 read-only;
242 };
243
244 partition@d0000 {
245 label = "0:DDRPARAMS";
246 reg = <0x000d0000 0x00010000>;
247 read-only;
248 };
249
250 partition@e0000 {
251 label = "0:APPSBLENV";
252 reg = <0x000e0000 0x00010000>;
253 };
254
255 partition@f0000 {
256 label = "0:APPSBL";
257 reg = <0x000f0000 0x000f0000>;
258 read-only;
259 };
260
261 partition@1e0000 {
262 label = "0:MANUDATA";
263 reg = <0x001e0000 0x00010000>;
264 read-only;
265 compatible = "nvmem-cells";
266 #address-cells = <1>;
267 #size-cells = <1>;
268
269 macaddr_manudata_6: macaddr@6 {
270 reg = <0x6 0x6>;
271 };
272 };
273
274 partition@1f0000 {
275 label = "0:ART";
276 reg = <0x001f0000 0x00010000>;
277 read-only;
278 compatible = "nvmem-cells";
279 #address-cells = <1>;
280 #size-cells = <1>;
281
282 precal_art_1000: precal@1000 {
283 reg = <0x1000 0x2f20>;
284 };
285
286 precal_art_5000: precal@5000 {
287 reg = <0x5000 0x2f20>;
288 };
289 };
290 };
291 };
292
293 nand@1 {
294 compatible = "spi-nand";
295 reg = <1>;
296 spi-max-frequency = <48000000>;
297
298 partitions {
299 compatible = "fixed-partitions";
300 #address-cells = <1>;
301 #size-cells = <1>;
302
303 partition@0 {
304 label = "rootfs";
305 reg = <0x00000000 0x03800000>;
306 };
307
308 partition@3800000 {
309 label = "rootfs_1";
310 reg = <0x03800000 0x03800000>;
311 };
312
313 partition@7000000 {
314 label = "var_config";
315 reg = <0x07000000 0x00f00000>;
316 read-only;
317 };
318
319 partition@7f00000 {
320 label = "Oops_log";
321 reg = <0x07f00000 0x000c0000>;
322 read-only;
323 };
324 };
325 };
326 };
327
328 &blsp1_uart1 {
329 status = "okay";
330
331 pinctrl-0 = <&serial_pins>;
332 pinctrl-names = "default";
333 };
334
335 &cryptobam {
336 status = "okay";
337 };
338
339 &mdio {
340 status = "okay";
341
342 pinctrl-0 = <&mdio_pins>;
343 pinctrl-names = "default";
344 reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
345 reset-delay-us = <2000>;
346 };
347
348 &wifi0 {
349 status = "okay";
350 nvmem-cell-names = "pre-calibration", "mac-address";
351 nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6>;
352 qcom,ath10k-calibration-variant = "Netgear-WAC510";
353 };
354
355 &wifi1 {
356 status = "okay";
357 nvmem-cell-names = "pre-calibration", "mac-address";
358 nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6>;
359 mac-address-increment = <16>;
360 qcom,ath10k-calibration-variant = "Netgear-WAC510";
361 };