1 /* SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2018 Peng Zhang <sd20@qxwlan.com>
7 #include "qcom-ipq4019-e2600ac.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "Qxwlan E2600AC c2";
13 compatible = "qxwlan,e2600ac-c2";
17 pinctrl-0 = <&spi_0_pins>;
18 pinctrl-names = "default";
20 cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
24 compatible = "jedec,spi-nor";
25 spi-max-frequency = <24000000>;
28 compatible = "fixed-partitions";
39 reg = <0x40000 0x20000>;
44 reg = <0x60000 0x60000>;
49 reg = <0xc0000 0x10000>;
53 label = "0:DDRPARAMS";
54 reg = <0xd0000 0x10000>;
58 label = "0:APPSBLENV";
59 reg = <0xe0000 0x10000>;
64 reg = <0xf0000 0x80000>;
69 reg = <0x170000 0x10000>;
73 compatible = "fixed-layout";
77 macaddr_gmac0: macaddr@0 {
81 macaddr_gmac1: macaddr@6 {
85 precal_art_1000: precal@1000 {
86 reg = <0x1000 0x2f20>;
89 precal_art_5000: precal@5000 {
90 reg = <0x5000 0x2f20>;
99 pinctrl-0 = <&nand_pins>;
100 pinctrl-names = "default";
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
111 reg = <0x00000000 0x04000000>;
118 nand_pins: nand-pins {
121 pins = "gpio53", "gpio58", "gpio59";
127 pins = "gpio54", "gpio55", "gpio56",
128 "gpio57", "gpio60", "gpio61",
129 "gpio62", "gpio63", "gpio64",
130 "gpio65", "gpio66", "gpio67",
140 nvmem-cell-names = "pre-calibration";
141 nvmem-cells = <&precal_art_1000>;
142 qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
147 nvmem-cell-names = "pre-calibration";
148 nvmem-cells = <&precal_art_5000>;
149 qcom,ath10k-calibration-variant = "Qxwlan-E2600AC-C2";
164 nvmem-cell-names = "mac-address";
165 nvmem-cells = <&macaddr_gmac0>;
172 nvmem-cell-names = "mac-address";
173 nvmem-cells = <&macaddr_gmac0>;
180 nvmem-cell-names = "mac-address";
181 nvmem-cells = <&macaddr_gmac1>;