target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ap120c-ac.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "ALFA Network AP120C-AC";
  11         compatible = "alfa-network,ap120c-ac";
  12
  13         aliases {
  14                 led-boot = &status;
  15                 led-failsafe = &status;
  16                 led-running = &status;
  17                 led-upgrade = &status;
  18                 ethernet1 = &swport5;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 reset {
  25                         label = "reset";
  26                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                 };
  29         };
  30
  31         leds {
  32                 compatible = "gpio-leds";
  33
  34                 status: status {
  35                         function = LED_FUNCTION_STATUS;
  36                         color = <LED_COLOR_ID_BLUE>;
  37                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
  38                         default-state = "keep";
  39                 };
  40
  41                 wan {
  42                         function = LED_FUNCTION_WAN;
  43                         color = <LED_COLOR_ID_AMBER>;
  44                         gpios = <&ethphy4 1 GPIO_ACTIVE_HIGH>;
  45                 };
  46
  47                 wlan2g {
  48                         label = "green:wlan2g";
  49                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
  50                         linux,default-trigger = "phy0tpt";
  51                 };
  52
  53                 wlan5g {
  54                         label = "red:wlan5g";
  55                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  56                         linux,default-trigger = "phy1tpt";
  57                 };
  58         };
  59
  60         soc {
  61                 mdio@90000 {
  62                         status = "okay";
  63
  64                         pinctrl-0 = <&mdio_pins>;
  65                         pinctrl-names = "default";
  66                 };
  67
  68                 counter@4a1000 {
  69                         compatible = "qcom,qca-gcnt";
  70                         reg = <0x4a1000 0x4>;
  71                 };
  72
  73                 tcsr@1949000 {
  74                         compatible = "qcom,tcsr";
  75                         reg = <0x1949000 0x100>;
  76                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  77                 };
  78
  79                 tcsr@194b000 {
  80                         compatible = "qcom,tcsr";
  81                         reg = <0x194b000 0x100>;
  82                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  83                 };
  84
  85                 ess_tcsr@1953000 {
  86                         compatible = "qcom,tcsr";
  87                         reg = <0x1953000 0x1000>;
  88                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  89                 };
  90
  91                 tcsr@1957000 {
  92                         compatible = "qcom,tcsr";
  93                         reg = <0x1957000 0x100>;
  94                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  95                 };
  96         };
  97 };
  98
  99 &watchdog {
 100         status = "okay";
 101 };
 102
 103 &prng {
 104         status = "okay";
 105 };
 106
 107 &crypto {
 108         status = "okay";
 109 };
 110
 111 &blsp_dma {
 112         status = "okay";
 113 };
 114
 115 &blsp1_i2c3 {
 116         status = "okay";
 117
 118         pinctrl-0 = <&i2c0_pins>;
 119         pinctrl-names = "default";
 120
 121         tpm@29 {
 122                 compatible = "atmel,at97sc3204t";
 123                 reg = <0x29>;
 124         };
 125 };
 126
 127 &blsp1_spi1 {
 128         status = "okay";
 129
 130         pinctrl-0 = <&spi0_pins>;
 131         pinctrl-names = "default";
 132         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 133                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
 134
 135         flash@0 {
 136                 compatible = "jedec,spi-nor";
 137                 reg = <0>;
 138                 spi-max-frequency = <24000000>;
 139
 140                 partitions {
 141                         compatible = "fixed-partitions";
 142                         #address-cells = <1>;
 143                         #size-cells = <1>;
 144
 145                         partition@0 {
 146                                 label = "SBL1";
 147                                 reg = <0x00000000 0x00040000>;
 148                                 read-only;
 149                         };
 150
 151                         partition@40000 {
 152                                 label = "MIBIB";
 153                                 reg = <0x00040000 0x00020000>;
 154                                 read-only;
 155                         };
 156
 157                         partition@60000 {
 158                                 label = "QSEE";
 159                                 reg = <0x00060000 0x00060000>;
 160                                 read-only;
 161                         };
 162
 163                         partition@c0000 {
 164                                 label = "CDT";
 165                                 reg = <0x000c0000 0x00010000>;
 166                                 read-only;
 167                         };
 168
 169                         partition@d0000 {
 170                                 label = "DDRPARAMS";
 171                                 reg = <0x000d0000 0x00010000>;
 172                                 read-only;
 173                         };
 174
 175                         partition@e0000 {
 176                                 label = "APPSBLENV";
 177                                 reg = <0x000e0000 0x00010000>;
 178                         };
 179
 180                         partition@f0000 {
 181                                 label = "APPSBL";
 182                                 reg = <0x000f0000 0x00080000>;
 183                                 read-only;
 184                         };
 185
 186                         partition@170000 {
 187                                 label = "ART";
 188                                 reg = <0x00170000 0x00010000>;
 189                                 read-only;
 190
 191                                 nvmem-layout {
 192                                         compatible = "fixed-layout";
 193                                         #address-cells = <1>;
 194                                         #size-cells = <1>;
 195
 196                                         precal_art_1000: precal@1000 {
 197                                                 reg = <0x1000 0x2f20>;
 198                                         };
 199
 200                                         precal_art_5000: precal@5000 {
 201                                                 reg = <0x5000 0x2f20>;
 202                                         };
 203                                 };
 204                         };
 205
 206                         partition@180000 {
 207                                 label = "priv_data1";
 208                                 reg = <0x00180000 0x00010000>;
 209                                 read-only;
 210                         };
 211
 212                         partition@190000 {
 213                                 label = "priv_data2";
 214                                 reg = <0x00190000 0x00010000>;
 215                                 read-only;
 216                         };
 217                 };
 218         };
 219
 220         nand@1 {
 221                 compatible = "spi-nand";
 222                 reg = <1>;
 223                 spi-max-frequency = <24000000>;
 224
 225                 partitions {
 226                         compatible = "fixed-partitions";
 227                         #address-cells = <1>;
 228                         #size-cells = <1>;
 229
 230                         partition@0 {
 231                                 label = "rootfs1";
 232                                 reg = <0x00000000 0x04000000>;
 233                         };
 234
 235                         partition@4000000 {
 236                                 label = "rootfs2";
 237                                 reg = <0x04000000 0x04000000>;
 238                         };
 239                 };
 240         };
 241 };
 242
 243 &blsp1_uart1 {
 244         status = "okay";
 245
 246         pinctrl-0 = <&serial0_pins>;
 247         pinctrl-names = "default";
 248 };
 249
 250 &cryptobam {
 251         status = "okay";
 252 };
 253
 254 &ethphy4 {
 255         gpio-controller;
 256         #gpio-cells = <2>;
 257 };
 258
 259 &tlmm {
 260         i2c0_pins: i2c0_pinmux {
 261                 mux_i2c {
 262                         function = "blsp_i2c0";
 263                         pins = "gpio58", "gpio59";
 264                         drive-strength = <16>;
 265                         bias-disable;
 266                 };
 267         };
 268
 269         mdio_pins: mdio_pinmux {
 270                 mux_mdio {
 271                         pins = "gpio53";
 272                         function = "mdio";
 273                         bias-pull-up;
 274                 };
 275
 276                 mux_mdc {
 277                         pins = "gpio52";
 278                         function = "mdc";
 279                         bias-pull-up;
 280                 };
 281         };
 282
 283         serial0_pins: serial0_pinmux {
 284                 mux_uart {
 285                         pins = "gpio60", "gpio61";
 286                         function = "blsp_uart0";
 287                         bias-disable;
 288                 };
 289         };
 290
 291         spi0_pins: spi0_pinmux {
 292                 mux_spi {
 293                         function = "blsp_spi0";
 294                         pins = "gpio55", "gpio56", "gpio57";
 295                         drive-strength = <12>;
 296                         bias-disable;
 297                 };
 298
 299                 mux_cs {
 300                         function = "gpio";
 301                         pins = "gpio54", "gpio4";
 302                         drive-strength = <2>;
 303                         bias-disable;
 304                         output-high;
 305                 };
 306         };
 307 };
 308
 309 &usb2_hs_phy {
 310         status = "okay";
 311 };
 312
 313 &usb2 {
 314         status = "okay";
 315 };
 316
 317 &usb3_hs_phy {
 318         status = "okay";
 319 };
 320
 321 &usb3 {
 322         status = "okay";
 323 };
 324
 325 &usb3_dwc {
 326         phys = <&usb3_hs_phy>;
 327         phy-names = "usb2-phy";
 328 };
 329
 330 &gmac {
 331         status = "okay";
 332 };
 333
 334 &switch {
 335         status = "okay";
 336 };
 337
 338 &swport4 {
 339         status = "okay";
 340
 341         label = "lan";
 342 };
 343
 344 &swport5 {
 345         status = "okay";
 346 };
 347
 348 &wifi0 {
 349         status = "okay";
 350         nvmem-cell-names = "pre-calibration";
 351         nvmem-cells = <&precal_art_1000>;
 352 };
 353
 354 &wifi1 {
 355         status = "okay";
 356         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
 357         nvmem-cell-names = "pre-calibration";
 358         nvmem-cells = <&precal_art_5000>;
 359 };