target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-ea6350v3.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "Linksys EA6350v3";
  11         compatible = "linksys,ea6350v3";
  12
  13         aliases {
  14                 led-boot = &power;
  15                 led-failsafe = &power;
  16                 led-running = &power;
  17                 led-upgrade = &power;
  18         };
  19
  20         soc {
  21                 rng@22000 {
  22                         status = "okay";
  23                 };
  24
  25                 mdio@90000 {
  26                         status = "okay";
  27                 };
  28
  29                 tcsr@1949000 {
  30                         compatible = "qcom,tcsr";
  31                         reg = <0x1949000 0x100>;
  32                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  33                 };
  34
  35                 tcsr@194b000 {
  36                         compatible = "qcom,tcsr";
  37                         reg = <0x194b000 0x100>;
  38                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  39                 };
  40
  41                 ess_tcsr@1953000 {
  42                         compatible = "qcom,tcsr";
  43                         reg = <0x1953000 0x1000>;
  44                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  45                 };
  46
  47                 tcsr@1957000 {
  48                         compatible = "qcom,tcsr";
  49                         reg = <0x1957000 0x100>;
  50                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  51                 };
  52
  53                 crypto@8e3a000 {
  54                         status = "okay";
  55                 };
  56         };
  57
  58         keys {
  59                 compatible = "gpio-keys";
  60
  61                 reset {
  62                         label = "reset";
  63                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  64                         linux,code = <KEY_RESTART>;
  65                 };
  66
  67                 wps {
  68                         label = "wps";
  69                         gpios = <&tlmm 0 GPIO_ACTIVE_LOW>;
  70                         linux,code = <KEY_WPS_BUTTON>;
  71                 };
  72         };
  73
  74         leds {
  75                 compatible = "gpio-leds";
  76
  77                 power: status {
  78                         function = LED_FUNCTION_STATUS;
  79                         color = <LED_COLOR_ID_GREEN>;
  80                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
  81                 };
  82         };
  83 };
  84
  85 &watchdog {
  86         status = "okay";
  87 };
  88
  89 &blsp1_uart1 {
  90         pinctrl-0 = <&serial_pins>;
  91         pinctrl-names = "default";
  92         status = "okay";
  93 };
  94
  95 &cryptobam {
  96         status = "okay";
  97 };
  98
  99 &gmac {
 100         status = "okay";
 101 };
 102
 103 &switch {
 104         status = "okay";
 105 };
 106
 107 &swport1 {
 108         status = "okay";
 109 };
 110
 111 &swport2 {
 112         status = "okay";
 113 };
 114
 115 &swport3 {
 116         status = "okay";
 117 };
 118
 119 &swport4 {
 120         status = "okay";
 121 };
 122
 123 &swport5 {
 124         status = "okay";
 125 };
 126
 127 &wifi0 {
 128         status = "okay";
 129         nvmem-cell-names = "pre-calibration";
 130         nvmem-cells = <&precal_art_1000>;
 131         qcom,ath10k-calibration-variant = "linksys-ea6350v3";
 132 };
 133
 134 &wifi1 {
 135         status = "okay";
 136         nvmem-cell-names = "pre-calibration";
 137         nvmem-cells = <&precal_art_5000>;
 138         qcom,ath10k-calibration-variant = "linksys-ea6350v3";
 139 };
 140
 141 &blsp_dma {
 142         status = "okay";
 143 };
 144
 145 &tlmm {
 146         serial_pins: serial_pinmux {
 147                 mux {
 148                         pins = "gpio60", "gpio61";
 149                         function = "blsp_uart0";
 150                         bias-disable;
 151                 };
 152         };
 153
 154         spi_0_pins: spi_0_pinmux {
 155                 mux {
 156                         function = "blsp_spi0";
 157                         pins = "gpio55", "gpio56", "gpio57";
 158                         drive-strength = <12>;
 159                         bias-disable;
 160                 };
 161
 162                 mux_cs {
 163                         function = "gpio";
 164                         pins = "gpio54", "gpio59";
 165                         drive-strength = <2>;
 166                         bias-disable;
 167                         output-high;
 168                 };
 169         };
 170 };
 171
 172 &blsp1_spi1 { /* BLSP1 QUP1 */
 173         pinctrl-0 = <&spi_0_pins>;
 174         pinctrl-names = "default";
 175         status = "okay";
 176         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 177                    <&tlmm 59 GPIO_ACTIVE_HIGH>;
 178
 179         flash@0 {
 180                 compatible = "jedec,spi-nor";
 181                 reg = <0>;
 182                 spi-max-frequency = <24000000>;
 183
 184                 partitions {
 185                         compatible = "fixed-partitions";
 186                         #address-cells = <1>;
 187                         #size-cells = <1>;
 188
 189                         SBL1@0 {
 190                                 label = "SBL1";
 191                                 reg = <0x00000000 0x00040000>;
 192                                 read-only;
 193                         };
 194                         MBIB@40000 {
 195                                 label = "MIBIB";
 196                                 reg = <0x00040000 0x00020000>;
 197                                 read-only;
 198                         };
 199                         QSEE@60000 {
 200                                 label = "QSEE";
 201                                 reg = <0x00060000 0x00060000>;
 202                                 read-only;
 203                         };
 204                         CDT@c0000 {
 205                                 label = "CDT";
 206                                 reg = <0x000c0000 0x00010000>;
 207                                 read-only;
 208                         };
 209                         APPSBLENV@d0000 {
 210                                 label = "APPSBLENV";
 211                                 reg = <0x000d0000 0x00010000>;
 212                                 read-only;
 213                         };
 214                         APPSBL@e0000 {
 215                                 label = "APPSBL"; /* uboot */
 216                                 reg = <0x000e0000 0x00080000>;
 217                                 read-only;
 218                         };
 219                         ART@160000 {
 220                                 label = "ART";
 221                                 reg = <0x00160000 0x00010000>;
 222                                 read-only;
 223
 224                                 nvmem-layout {
 225                                         compatible = "fixed-layout";
 226                                         #address-cells = <1>;
 227                                         #size-cells = <1>;
 228
 229                                         precal_art_1000: precal@1000 {
 230                                                 reg = <0x1000 0x2f20>;
 231                                         };
 232
 233                                         precal_art_5000: precal@5000 {
 234                                                 reg = <0x5000 0x2f20>;
 235                                         };
 236                                 };
 237                         };
 238                         u_env@170000 {
 239                                 label = "u_env";
 240                                 reg = <0x00170000 0x00020000>;
 241                         };
 242                         s_env@190000 {
 243                                 label = "s_env";
 244                                 reg = <0x00190000 0x00020000>;
 245                         };
 246                         devinfo@1b0000 {
 247                                 label = "devinfo";
 248                                 reg = <0x001b0000 0x00010000>;
 249                         };
 250                         /* 0x001c0000 - 0x00200000 unused */
 251                 };
 252         };
 253
 254         flash@1 {
 255                 status = "okay";
 256                 compatible = "spi-nand";
 257                 reg = <1>;
 258                 spi-max-frequency = <24000000>;
 259
 260                 partitions {
 261                         compatible = "fixed-partitions";
 262                         #address-cells = <1>;
 263                         #size-cells = <1>;
 264
 265                         kernel@0 {
 266                                 label = "kernel";
 267                                 reg = <0x00000000 0x02800000>;
 268                         };
 269                         rootfs@500000 {
 270                                 label = "rootfs";
 271                                 reg = <0x00500000 0x02300000>;
 272                         };
 273                         alt_kernel@2800000 {
 274                                 label = "alt_kernel";
 275                                 reg = <0x02800000 0x02800000>;
 276                         };
 277                         alt_rootfs@2d00000 {
 278                                 label = "alt_rootfs";
 279                                 reg = <0x02d00000 0x02300000>;
 280                         };
 281                         sysdiag@5000000 {
 282                                 label = "sysdiag";
 283                                 reg = <0x05000000 0x00100000>;
 284                         };
 285                         syscfg@5100000 {
 286                                 label = "syscfg";
 287                                 reg = <0x05100000 0x02F00000>;
 288                         };
 289                         /* 0x00000000 - 0x08000000: 128 MiB */
 290                 };
 291         };
 292 };
 293
 294 &usb3_ss_phy {
 295         status = "okay";
 296 };
 297
 298 &usb3_hs_phy {
 299         status = "okay";
 300 };
 301
 302 &usb3 {
 303         status = "okay";
 304 };
 305
 306 &usb2_hs_phy {
 307         status = "okay";
 308 };
 309
 310 &usb2 {
 311         status = "okay";
 312 };