1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2018, Robert Marko <robimarko@gmail.com>
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/soc/qcom,tcsr.h>
18 pinctrl-0 = <&mdio_pins>;
19 pinctrl-names = "default";
23 compatible = "qcom,qca-gcnt";
28 compatible = "qcom,tcsr";
29 reg = <0x1949000 0x100>;
30 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
36 compatible = "qcom,tcsr";
37 reg = <0x194b000 0x100>;
38 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
42 compatible = "qcom,tcsr";
43 reg = <0x1953000 0x1000>;
44 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
48 compatible = "qcom,tcsr";
49 reg = <0x1957000 0x100>;
50 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
68 mdio_pins: mdio_pinmux {
80 pins = "gpio52", "gpio53";
85 serial_pins: serial_pinmux {
87 pins = "gpio60", "gpio61";
88 function = "blsp_uart0";
93 spi_0_pins: spi_0_pinmux {
95 function = "blsp_spi0";
96 pins = "gpio55", "gpio56", "gpio57";
103 pins = "gpio54", "gpio59";
104 drive-strength = <2>;
118 pinctrl-0 = <&spi_0_pins>;
119 pinctrl-names = "default";
120 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
125 compatible = "jedec,spi-nor";
127 spi-max-frequency = <24000000>;
130 compatible = "fixed-partitions";
131 #address-cells = <1>;
136 reg = <0x00000000 0x00040000>;
142 reg = <0x00040000 0x00020000>;
148 reg = <0x00060000 0x00060000>;
154 reg = <0x000c0000 0x00010000>;
160 reg = <0x000d0000 0x00010000>;
165 label = "APPSBLENV"; /* uboot env*/
166 reg = <0x000e0000 0x00010000>;
171 label = "APPSBL"; /* uboot */
172 reg = <0x000f0000 0x00080000>;
178 reg = <0x00170000 0x00010000>;
182 compatible = "fixed-layout";
183 #address-cells = <1>;
186 precal_art_1000: precal@1000 {
187 reg = <0x1000 0x2f20>;
190 precal_art_5000: precal@5000 {
191 reg = <0x5000 0x2f20>;
201 compatible = "spi-nand";
203 spi-max-frequency = <24000000>;
206 compatible = "fixed-partitions";
207 #address-cells = <1>;
212 reg = <0x00000000 0x08000000>;
221 pinctrl-0 = <&serial_pins>;
222 pinctrl-names = "default";
249 nvmem-cell-names = "pre-calibration";
250 nvmem-cells = <&precal_art_1000>;
251 qcom,ath10k-calibration-variant = "8devices-Jalapeno";
256 nvmem-cell-names = "pre-calibration";
257 nvmem-cells = <&precal_art_5000>;
258 qcom,ath10k-calibration-variant = "8devices-Jalapeno";