target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4018-wac510.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /* Copyright (c) 2020, Robert Marko <robimarko@gmail.com> */
   3
   4 #include "qcom-ipq4019.dtsi"
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8 #include <dt-bindings/leds/common.h>
   9
  10 / {
  11         model = "Netgear WAC510";
  12         compatible = "netgear,wac510";
  13
  14         aliases {
  15                 led-boot = &led_power_amber;
  16                 led-failsafe = &led_power_amber;
  17                 led-running = &led_power_green;
  18                 led-upgrade = &led_power_amber;
  19                 ethernet1 = &swport5;
  20         };
  21
  22         chosen {
  23                 bootargs-append = " root=/dev/ubiblock0_1";
  24         };
  25
  26         soc {
  27                 counter@4a1000 {
  28                         compatible = "qcom,qca-gcnt";
  29                         reg = <0x4a1000 0x4>;
  30                 };
  31
  32                 tcsr@1949000 {
  33                         compatible = "qcom,tcsr";
  34                         reg = <0x1949000 0x100>;
  35                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  36                 };
  37
  38                 ess_tcsr@1953000 {
  39                         compatible = "qcom,tcsr";
  40                         reg = <0x1953000 0x1000>;
  41                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  42                 };
  43
  44                 tcsr@1957000 {
  45                         compatible = "qcom,tcsr";
  46                         reg = <0x1957000 0x100>;
  47                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  48                 };
  49         };
  50
  51         keys {
  52                 compatible = "gpio-keys";
  53
  54                 reset {
  55                         label = "reset";
  56                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
  57                         linux,code = <KEY_RESTART>;
  58                 };
  59         };
  60
  61         led_spi {
  62                 compatible = "spi-gpio";
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65
  66                 sck-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
  67                 mosi-gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
  68                 num-chipselects = <0>;
  69
  70                 ssr: ssr@0 {
  71                         compatible = "fairchild,74hc595";
  72                         reg = <0>;
  73                         gpio-controller;
  74                         #gpio-cells = <2>;
  75                         registers-number = <1>;
  76                         spi-max-frequency = <1000000>;
  77                 };
  78         };
  79
  80         leds {
  81                 compatible = "gpio-leds";
  82
  83                 led_power_amber: led-0 {
  84                         color = <LED_COLOR_ID_AMBER>;
  85                         function = LED_FUNCTION_POWER;
  86                         gpios = <&ssr 6 GPIO_ACTIVE_LOW>;
  87                         panic-indicator;
  88                 };
  89
  90                 led_power_green: led-1 {
  91                         color = <LED_COLOR_ID_GREEN>;
  92                         function = LED_FUNCTION_POWER;
  93                         gpios = <&ssr 5 GPIO_ACTIVE_LOW>;
  94                 };
  95
  96                 led-2 {
  97                         /* 2.4GHz blue - activity */
  98                         color = <LED_COLOR_ID_BLUE>;
  99                         function = LED_FUNCTION_WLAN;
 100                         function-enumerator = <0>;
 101                         gpios = <&ssr 4 GPIO_ACTIVE_LOW>;
 102                         linux,default-trigger = "phy0tpt";
 103                 };
 104
 105                 led-3 {
 106                         /* 2.4GHz green - link */
 107                         color = <LED_COLOR_ID_GREEN>;
 108                         function = LED_FUNCTION_WLAN;
 109                         function-enumerator = <0>;
 110                         gpios = <&ssr 3 GPIO_ACTIVE_LOW>;
 111                         linux,default-trigger = "phy0radio";
 112                 };
 113
 114                 led-4 {
 115                         /* 5GHz blue - activity */
 116                         color = <LED_COLOR_ID_BLUE>;
 117                         function = LED_FUNCTION_WLAN;
 118                         function-enumerator = <1>;
 119                         gpios = <&ssr 2 GPIO_ACTIVE_LOW>;
 120                         linux,default-trigger = "phy1tpt";
 121                 };
 122
 123                 led-5 {
 124                         /* 5GHz green - link */
 125                         color = <LED_COLOR_ID_GREEN>;
 126                         function = LED_FUNCTION_WLAN;
 127                         function-enumerator = <1>;
 128                         gpios = <&ssr 1 GPIO_ACTIVE_LOW>;
 129                         linux,default-trigger = "phy1radio";
 130                 };
 131
 132                 led-6 {
 133                         color = <LED_COLOR_ID_GREEN>;
 134                         function = LED_FUNCTION_ACTIVITY;
 135                         gpios = <&ssr 0 GPIO_ACTIVE_LOW>;
 136                 };
 137         };
 138 };
 139
 140 &watchdog {
 141         status = "okay";
 142 };
 143
 144 &prng {
 145         status = "okay";
 146 };
 147
 148 &crypto {
 149         status = "okay";
 150 };
 151
 152 &qpic_bam {
 153         status = "okay";
 154 };
 155
 156 &tlmm {
 157         mdio_pins: mdio_pinmux {
 158                 mux_1 {
 159                         pins = "gpio53";
 160                         function = "mdio";
 161                         bias-pull-up;
 162                 };
 163
 164                 mux_2 {
 165                         pins = "gpio52";
 166                         function = "mdc";
 167                         bias-pull-up;
 168                 };
 169         };
 170
 171         serial_pins: serial_pinmux {
 172                 mux {
 173                         pins = "gpio60", "gpio61";
 174                         function = "blsp_uart0";
 175                         bias-disable;
 176                 };
 177         };
 178
 179         spi_0_pins: spi_0_pinmux {
 180                 pinmux {
 181                         function = "blsp_spi0";
 182                         pins = "gpio55", "gpio56", "gpio57";
 183                         drive-strength = <12>;
 184                         bias-disable;
 185                 };
 186
 187                 pinmux_cs {
 188                         function = "gpio";
 189                         pins = "gpio54", "gpio59";
 190                         drive-strength = <2>;
 191                         bias-disable;
 192                         output-high;
 193                 };
 194         };
 195 };
 196
 197 &blsp_dma {
 198         status = "okay";
 199 };
 200
 201 &blsp1_spi1 {
 202         status = "okay";
 203
 204         pinctrl-0 = <&spi_0_pins>;
 205         pinctrl-names = "default";
 206         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
 207                    <&tlmm 59 GPIO_ACTIVE_HIGH>;
 208
 209         flash@0 {
 210                 compatible = "jedec,spi-nor";
 211                 spi-max-frequency = <50000000>;
 212                 reg = <0>;
 213
 214                 partitions {
 215                         compatible = "fixed-partitions";
 216                         #address-cells = <1>;
 217                         #size-cells = <1>;
 218
 219                         partition@0 {
 220                                 label = "0:SBL1";
 221                                 reg = <0x00000000 0x00040000>;
 222                                 read-only;
 223                         };
 224
 225                         partition@40000 {
 226                                 label = "0:MIBIB";
 227                                 reg = <0x00040000 0x00020000>;
 228                                 read-only;
 229                         };
 230
 231                         partition@60000 {
 232                                 label = "0:QSEE";
 233                                 reg = <0x00060000 0x00060000>;
 234                                 read-only;
 235                         };
 236
 237                         partition@c0000 {
 238                                 label = "0:CDT";
 239                                 reg = <0x000c0000 0x00010000>;
 240                                 read-only;
 241                         };
 242
 243                         partition@d0000 {
 244                                 label = "0:DDRPARAMS";
 245                                 reg = <0x000d0000 0x00010000>;
 246                                 read-only;
 247                         };
 248
 249                         partition@e0000 {
 250                                 label = "0:APPSBLENV";
 251                                 reg = <0x000e0000 0x00010000>;
 252                         };
 253
 254                         partition@f0000 {
 255                                 label = "0:APPSBL";
 256                                 reg = <0x000f0000 0x000f0000>;
 257                                 read-only;
 258                         };
 259
 260                         partition@1e0000 {
 261                                 label = "0:MANUDATA";
 262                                 reg = <0x001e0000 0x00010000>;
 263                                 read-only;
 264
 265                                 nvmem-layout {
 266                                         compatible = "fixed-layout";
 267                                         #address-cells = <1>;
 268                                         #size-cells = <1>;
 269
 270                                         macaddr_manudata_6: macaddr@6 {
 271                                                 compatible = "mac-base";
 272                                                 reg = <0x6 0x6>;
 273                                                 #nvmem-cell-cells = <1>;
 274                                         };
 275                                 };
 276                         };
 277
 278                         partition@1f0000 {
 279                                 label = "0:ART";
 280                                 reg = <0x001f0000 0x00010000>;
 281                                 read-only;
 282
 283                                 nvmem-layout {
 284                                         compatible = "fixed-layout";
 285                                         #address-cells = <1>;
 286                                         #size-cells = <1>;
 287
 288                                         precal_art_1000: precal@1000 {
 289                                                 reg = <0x1000 0x2f20>;
 290                                         };
 291
 292                                         precal_art_5000: precal@5000 {
 293                                                 reg = <0x5000 0x2f20>;
 294                                         };
 295                                 };
 296                         };
 297                 };
 298         };
 299
 300         nand@1 {
 301                 compatible = "spi-nand";
 302                 reg = <1>;
 303                 spi-max-frequency = <48000000>;
 304
 305                 partitions {
 306                         compatible = "fixed-partitions";
 307                         #address-cells = <1>;
 308                         #size-cells = <1>;
 309
 310                         partition@0 {
 311                                 label = "rootfs";
 312                                 reg = <0x00000000 0x03800000>;
 313                         };
 314
 315                         partition@3800000 {
 316                                 label = "rootfs_1";
 317                                 reg = <0x03800000 0x03800000>;
 318                         };
 319
 320                         partition@7000000 {
 321                                 label = "var_config";
 322                                 reg = <0x07000000 0x00f00000>;
 323                                 read-only;
 324                         };
 325
 326                         partition@7f00000 {
 327                                 label = "Oops_log";
 328                                 reg = <0x07f00000 0x000c0000>;
 329                                 read-only;
 330                         };
 331                 };
 332         };
 333 };
 334
 335 &blsp1_uart1 {
 336         status = "okay";
 337
 338         pinctrl-0 = <&serial_pins>;
 339         pinctrl-names = "default";
 340 };
 341
 342 &cryptobam {
 343         status = "okay";
 344 };
 345
 346 &gmac {
 347         status = "okay";
 348 };
 349
 350 &switch {
 351         status = "okay";
 352 };
 353
 354 &swport4 {
 355         status = "okay";
 356
 357         label = "lan";
 358 };
 359
 360 &swport5 {
 361         status = "okay";
 362 };
 363
 364 &mdio {
 365         status = "okay";
 366
 367         pinctrl-0 = <&mdio_pins>;
 368         pinctrl-names = "default";
 369         reset-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>;
 370         reset-delay-us = <2000>;
 371 };
 372
 373 &wifi0 {
 374         status = "okay";
 375         nvmem-cell-names = "pre-calibration", "mac-address";
 376         nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6 0>;
 377         qcom,ath10k-calibration-variant = "Netgear-WAC510";
 378 };
 379
 380 &wifi1 {
 381         status = "okay";
 382         nvmem-cell-names = "pre-calibration", "mac-address";
 383         nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6 16>;
 384         qcom,ath10k-calibration-variant = "Netgear-WAC510";
 385 };