1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Marcin Gajda <mgajda@o2.pl>.
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
14 compatible = "zte,mf18a";
17 led-boot = &led_power;
18 led-failsafe = &led_power;
19 led-running = &led_power;
20 led-upgrade = &led_power;
25 * bootargs forced by u-boot bootipq command:
26 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
28 bootargs-append = " root=/dev/ubiblock0_1";
32 compatible = "gpio-restart";
33 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
37 compatible = "gpio-leds";
40 label = "blue:internal";
41 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
42 default-state = "keep";
46 function = LED_FUNCTION_POWER;
47 color = <LED_COLOR_ID_BLUE>;
48 gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
49 default-state = "keep";
53 function = LED_FUNCTION_WLAN;
54 color = <LED_COLOR_ID_BLUE>;
55 gpios = <&tlmm 23 GPIO_ACTIVE_HIGH>;
56 linux,default-trigger = "phy0tpt";
60 function = LED_FUNCTION_WLAN;
61 color = <LED_COLOR_ID_RED>;
62 gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
66 function = LED_FUNCTION_WLAN;
68 gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
69 linux,default-trigger = "phy1tpt";
74 gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
79 gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
84 compatible = "gpio-keys";
88 linux,code = <KEY_RESTART>;
89 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
94 linux,code = <KEY_WPS_BUTTON>;
95 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
106 pinctrl-0 = <&mdio_pins>;
107 pinctrl-names = "default";
108 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
109 reset-delay-us = <2000>;
113 compatible = "qcom,tcsr";
114 reg = <0x1949000 0x100>;
115 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
119 /* select hostmode */
120 compatible = "qcom,tcsr";
121 reg = <0x194b000 0x100>;
122 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
127 compatible = "qcom,tcsr";
128 reg = <0x1953000 0x1000>;
129 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
133 compatible = "qcom,tcsr";
134 reg = <0x1957000 0x100>;
135 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
153 pinctrl-0 = <&spi_0_pins>;
154 pinctrl-names = "default";
156 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
159 /* u-boot is looking for "n25q128a11" property */
160 compatible = "jedec,spi-nor", "n25q128a11";
161 #address-cells = <1>;
164 spi-max-frequency = <24000000>;
167 compatible = "fixed-partitions";
168 #address-cells = <1>;
179 reg = <0x40000 0x20000>;
185 reg = <0x60000 0x60000>;
191 reg = <0xc0000 0x10000>;
196 label = "0:DDRPARAMS";
197 reg = <0xd0000 0x10000>;
202 label = "0:APPSBLENV";
203 reg = <0xe0000 0x10000>;
209 reg = <0xf0000 0xc0000>;
214 label = "0:reserved1";
215 reg = <0x1b0000 0x50000>;
223 pinctrl-0 = <&serial_pins>;
224 pinctrl-names = "default";
234 nvmem-cell-names = "mac-address";
235 nvmem-cells = <&macaddr_config_0 0>;
247 nvmem-cell-names = "mac-address";
248 nvmem-cells = <&macaddr_config_0 1>;
258 pinctrl-0 = <&nand_pins>;
259 pinctrl-names = "default";
264 compatible = "fixed-partitions";
265 #address-cells = <1>;
276 reg = <0xa0000 0x80000>;
280 compatible = "fixed-layout";
281 #address-cells = <1>;
284 precal_art_1000: precal@1000 {
285 reg = <0x1000 0x2f20>;
288 precal_art_9000: precal@9000 {
289 reg = <0x9000 0x2f20>;
296 reg = <0x120000 0x80000>;
300 compatible = "fixed-layout";
301 #address-cells = <1>;
304 macaddr_config_0: macaddr@0 {
305 compatible = "mac-base";
307 #nvmem-cell-cells = <1>;
314 reg = <0x1a0000 0xc0000>;
320 reg = <0x260000 0x400000>;
326 reg = <0x660000 0x400000>;
331 reg = <0xa60000 0xa0000>;
336 reg = <0xb00000 0x500000>;
342 reg = <0x1000000 0x800000>;
347 reg = <0x1800000 0x1d00000>;
352 reg = <0x3500000 0x1900000>;
357 reg = <0x4e00000 0x2800000>;
362 reg = <0x7600000 0xa00000>;
373 i2c_0_pins: i2c_0_pinmux {
375 pins = "gpio20", "gpio21";
376 function = "blsp_i2c0";
381 mdio_pins: mdio_pinmux {
395 nand_pins: nand_pins {
397 pins = "gpio52", "gpio53", "gpio58",
404 pins = "gpio54", "gpio55", "gpio56",
406 "gpio62", "gpio63", "gpio64",
407 "gpio65", "gpio66", "gpio67",
414 serial_pins: serial_pinmux {
416 pins = "gpio16", "gpio17";
417 function = "blsp_uart0";
422 spi_0_pins: spi_0_pinmux {
424 function = "blsp_spi0";
425 pins = "gpio13", "gpio14", "gpio15";
426 drive-strength = <12>;
433 drive-strength = <2>;
462 nvmem-cell-names = "pre-calibration", "mac-address";
463 nvmem-cells = <&precal_art_1000>, <&macaddr_config_0 2>;
464 qcom,ath10k-calibration-variant = "ZTE-MF18A";
467 //* This node is used for 5Ghz on QCA9982 */
470 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
471 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
472 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
475 reg = <0x00000000 0 0 0 0>;
476 #address-cells = <3>;
481 compatible = "pci168c,0040";
482 nvmem-cell-names = "pre-calibration", "mac-address";
483 nvmem-cells = <&precal_art_9000>, <&macaddr_config_0 3>;
484 qcom,ath10k-calibration-variant = "ZTE-MF18A";
485 reg = <0x00010000 0 0 0 0>;