1 // SPDX-License-Identifier: ISC
2 // Copyright (c) 2015, The Linux Foundation. All rights reserved.
3 // Copyright (c) 2019, Cezary Jackiewicz <cezary@eko.one.pl>.
4 // Copyright (c) 2020, Pawel Dembicki <paweldembicki@gmail.com>.
6 #include "qcom-ipq4019.dtsi"
7 #include <dt-bindings/soc/qcom,tcsr.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
13 model = "Cell C RTL30VW";
14 compatible = "cellc,rtl30vw";
17 led-boot = &led_power_blue;
18 led-failsafe = &led_power_red;
19 led-running = &led_power_blue;
20 led-upgrade = &led_power_red;
24 bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro";
28 compatible = "spi-gpio";
31 num-chipselects = <1>;
33 mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
34 cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
35 sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
37 led_gpio: led_gpio@0 {
38 compatible = "fairchild,74hc595";
42 registers-number = <2>;
43 spi-max-frequency = <1000000>;
48 compatible = "gpio-leds";
50 led_power_blue: power_blue {
51 gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>;
52 function = LED_FUNCTION_POWER;
53 color = <LED_COLOR_ID_BLUE>;
57 led_power_red: power_red {
58 gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>;
59 function = LED_FUNCTION_POWER;
60 color = <LED_COLOR_ID_RED>;
64 gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
66 default-state = "keep";
70 gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
72 default-state = "keep";
76 gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>;
77 label = "blue:wlan2g";
78 linux,default-trigger = "phy0tpt";
82 gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>;
83 label = "blue:wlan5g";
84 linux,default-trigger = "phy1tpt";
88 gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>;
89 function = LED_FUNCTION_WPS;
90 color = <LED_COLOR_ID_BLUE>;
94 gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>;
99 gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>;
104 gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>;
109 gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>;
114 gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>;
119 gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
120 label = "red:signal";
125 compatible = "gpio-keys";
129 linux,code = <KEY_WPS_BUTTON>;
130 gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
135 linux,code = <KEY_RESTART>;
136 gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
146 compatible = "qcom,tcsr";
147 reg = <0x1949000 0x100>;
148 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
152 /* select hostmode */
153 compatible = "qcom,tcsr";
154 reg = <0x194b000 0x100>;
155 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
160 compatible = "qcom,tcsr";
161 reg = <0x1953000 0x1000>;
162 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
166 compatible = "qcom,tcsr";
167 reg = <0x1957000 0x100>;
168 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
190 pinctrl-0 = <&spi_0_pins>;
191 pinctrl-names = "default";
193 cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
196 /*"n25q128a11" is required for proper nand recognition in u-boot. */
197 compatible = "jedec,spi-nor", "n25q128a11";
198 #address-cells = <1>;
201 spi-max-frequency = <24000000>;
204 compatible = "fixed-partitions";
205 #address-cells = <1>;
216 reg = <0x40000 0x20000>;
222 reg = <0x60000 0x60000>;
228 reg = <0xc0000 0x10000>;
233 label = "0:DDRPARAMS";
234 reg = <0xd0000 0x10000>;
239 label = "0:APPSBLENV";
240 reg = <0xe0000 0x10000>;
246 reg = <0xf0000 0x80000>;
252 reg = <0x170000 0x10000>;
257 label = "0:BOOTCONFIG";
258 reg = <0x180000 0x10000>;
266 * Factory U-boot looks in 0:BOOTCONFIG partition for active
267 * partitions settings and mangle partition config. So kernel
268 * /kernel_1 and rootfs/rootfs_1 pairs can be swaped.
269 * It isn't a problem but we never can be sure where OFW put
270 * factory images. "spinand,mt29f" value is required for proper
271 * nand recognition in u-boot.
273 compatible = "spi-nand","spinand,mt29f";
274 #address-cells = <1>;
277 spi-max-frequency = <24000000>;
280 compatible = "fixed-partitions";
281 #address-cells = <1>;
286 reg = <0x0 0x400000>;
291 reg = <0x400000 0x2000000>;
296 reg = <0x2400000 0x400000>;
301 reg = <0x2800000 0x2000000>;
306 reg = <0x4800000 0x3800000>;
313 pinctrl-0 = <&serial_pins>;
314 pinctrl-names = "default";
323 serial_pins: serial_pinmux {
325 pins = "gpio60", "gpio61";
326 function = "blsp_uart0";
331 spi_0_pins: spi_0_pinmux {
333 function = "blsp_spi0";
334 pins = "gpio55", "gpio56", "gpio57";
335 drive-strength = <12>;
341 pins = "gpio54", "gpio59";
342 drive-strength = <2>;
371 qcom,ath10k-calibration-variant = "cellc,rtl30vw";
376 qcom,ath10k-calibration-variant = "cellc,rtl30vw";