target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4019-wpj419.dts

   1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
   2  * Copyright (c) 2019, Nguyen Dinh Phi <phi_nguyen@compex.com.sg>
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  *
  16  */
  17
  18 #include "qcom-ipq4019.dtsi"
  19 #include <dt-bindings/gpio/gpio.h>
  20 #include <dt-bindings/input/input.h>
  21 #include <dt-bindings/soc/qcom,tcsr.h>
  22
  23 / {
  24         model = "Compex WPJ419";
  25         compatible = "compex,wpj419", "qcom,ipq4019";
  26
  27         memory {
  28                 device_type = "memory";
  29                 reg = <0x80000000 0x10000000>;
  30         };
  31
  32         reserved-memory {
  33                 ranges;
  34                 rsvd1@87000000 {
  35                         /* Reserved for other subsystem */
  36                         reg = <0x87000000 0x500000>;
  37                         no-map;
  38                 };
  39                 wifi_dump@87500000 {
  40                         reg = <0x87500000 0x600000>;
  41                         no-map;
  42                 };
  43
  44                 rsvd2@87B00000 {
  45                         /* Reserved for other subsystem */
  46                         reg = <0x87B00000 0x500000>;
  47                         no-map;
  48                 };
  49         };
  50
  51         chosen {
  52                 bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
  53         };
  54
  55         soc {
  56                 pinctrl@1000000 {
  57                         mdio_pins: mdio_pinmux {
  58                                 mux_1 {
  59                                         pins = "gpio6";
  60                                         function = "mdio";
  61                                         bias-pull-up;
  62                                 };
  63
  64                                 mux_2 {
  65                                         pins = "gpio7";
  66                                         function = "mdc";
  67                                         bias-pull-up;
  68                                 };
  69                         };
  70
  71                         serial_0_pins: serial_pinmux {
  72                                 mux {
  73                                         pins = "gpio16", "gpio17";
  74                                         function = "blsp_uart0";
  75                                         bias-disable;
  76                                 };
  77                         };
  78
  79                         serial_1_pins: serial1_pinmux {
  80                                 mux {
  81                                         pins = "gpio8", "gpio9", "gpio10", "gpio11";
  82                                         function = "blsp_uart1";
  83                                         bias-disable;
  84                                 };
  85                         };
  86
  87                         spi_0_pins: spi_0_pinmux {
  88                                 pinmux {
  89                                         function = "blsp_spi0";
  90                                         pins = "gpio13", "gpio14", "gpio15";
  91                                         bias-disable;
  92                                 };
  93
  94                                 pinmux_cs {
  95                                         function = "gpio";
  96                                         pins = "gpio12";
  97                                         bias-disable;
  98                                         output-high;
  99                                 };
 100                         };
 101
 102                         i2c_0_pins: i2c_0_pinmux {
 103                                 mux {
 104                                         pins = "gpio20", "gpio21";
 105                                         function = "blsp_i2c0";
 106                                         bias-disable;
 107                                 };
 108                         };
 109
 110                         nand_pins: nand_pins {
 111                                 pullups {
 112                                         pins = "gpio52", "gpio53", "gpio58", "gpio59";
 113                                         function = "qpic";
 114                                         bias-pull-up;
 115                                 };
 116
 117                                 pulldowns {
 118                                         pins = "gpio54", "gpio55", "gpio56",
 119                                         "gpio57", "gpio60", "gpio61",
 120                                         "gpio62", "gpio63", "gpio64",
 121                                         "gpio65", "gpio66", "gpio67",
 122                                         "gpio68", "gpio69";
 123                                         function = "qpic";
 124                                         bias-pull-down;
 125                                 };
 126                         };
 127
 128                         led_0_pins: led0_pinmux {
 129                                 mux_1 {
 130                                         pins = "gpio36";
 131                                         function = "led0";
 132                                         bias-pull-down;
 133                                 };
 134                                 mux_2 {
 135                                         pins = "gpio40";
 136                                         function = "led4";
 137                                         bias-pull-down;
 138                                 };
 139                         };
 140                 };
 141
 142                 spi_0: spi@78b5000 {
 143                         pinctrl-0 = <&spi_0_pins>;
 144                         pinctrl-names = "default";
 145                         status = "okay";
 146                         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 41 GPIO_ACTIVE_HIGH>;
 147                         num-cs = <2>;
 148
 149                         flash0@0 {
 150                                 reg = <0>;
 151                                 compatible = "jedec,spi-nor";
 152                                 spi-max-frequency = <24000000>;
 153                                 broken-flash-reset;
 154
 155                                 partitions {
 156                                         compatible = "fixed-partitions";
 157                                         #address-cells = <1>;
 158                                         #size-cells = <1>;
 159
 160                                         partition@0 {
 161                                                 label = "0:SBL1";
 162                                                 reg = <0x000000 0x040000>;
 163                                                 read-only;
 164                                         };
 165
 166                                         partition@40000 {
 167                                                 label = "0:MIBIB";
 168                                                 reg = <0x040000 0x020000>;
 169                                                 read-only;
 170                                         };
 171
 172                                         partition@60000 {
 173                                                 label = "0:QSEE";
 174                                                 reg = <0x060000 0x060000>;
 175                                                 read-only;
 176                                         };
 177
 178                                         partition@c0000 {
 179                                                 label = "0:CDT";
 180                                                 reg = <0x0c0000 0x010000>;
 181                                                 read-only;
 182                                         };
 183
 184                                         partition@d0000 {
 185                                                 label = "0:DDRPARAMS";
 186                                                 reg = <0x0d0000 0x010000>;
 187                                                 read-only;
 188                                         };
 189
 190                                         partition@e0000 {
 191                                                 label = "u-boot-env";
 192                                                 reg = <0x0e0000 0x010000>;
 193                                         };
 194
 195                                         partition@f0000 {
 196                                                 label = "u-boot";
 197                                                 reg = <0x0f0000 0x080000>;
 198                                                 read-only;
 199                                         };
 200
 201                                         partition@170000 {
 202                                                 label = "0:ART";
 203                                                 reg = <0x170000 0x010000>;
 204                                                 read-only;
 205
 206                                                 nvmem-layout {
 207                                                         compatible = "fixed-layout";
 208                                                         #address-cells = <1>;
 209                                                         #size-cells = <1>;
 210
 211                                                         precal_art_1000: precal@1000 {
 212                                                                 reg = <0x1000 0x2f20>;
 213                                                         };
 214
 215                                                         precal_art_5000: precal@5000 {
 216                                                                 reg = <0x5000 0x2f20>;
 217                                                         };
 218                                                 };
 219                                         };
 220                                 };
 221                         };
 222
 223                         nand@1 {
 224                                 reg = <1>;
 225                                 status = "okay";
 226                                 compatible = "spi-nand";
 227                                 spi-max-frequency = <24000000>;
 228
 229                                 partitions {
 230                                         compatible = "fixed-partitions";
 231                                         #address-cells = <1>;
 232                                         #size-cells = <1>;
 233
 234                                         /* The device has 128MB, but we can only address
 235                                          * 64MB because of the bootloader's default settings.
 236                                          * This is due to the old mt29f driver,
 237                                          * which detected the deivce with only 64MB
 238                                          */
 239                                         partition@0 {
 240                                                 label = "ubi";
 241                                                 reg = <0x0000000 0x4000000>;
 242                                         };
 243                                 };
 244                         };
 245                 };
 246
 247                 mdio@90000 {
 248                         status = "okay";
 249                         pinctrl-0 = <&mdio_pins>;
 250                         pinctrl-names = "default";
 251                         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
 252                         reset-delay-us = <5000>;
 253                 };
 254
 255                 tcsr@194b000 {
 256                         /* select hostmode */
 257                         compatible = "qcom,tcsr";
 258                         reg = <0x194b000 0x100>;
 259                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
 260                         status = "okay";
 261                 };
 262
 263                 tcsr@1949000 {
 264                         compatible = "qcom,tcsr";
 265                         reg = <0x1949000 0x100>;
 266                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
 267                 };
 268
 269                 ess_tcsr@1953000 {
 270                         compatible = "qcom,tcsr";
 271                         reg = <0x1953000 0x1000>;
 272                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
 273                 };
 274
 275                 tcsr@1957000 {
 276                         compatible = "qcom,tcsr";
 277                         reg = <0x1957000 0x100>;
 278                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 279                 };
 280
 281                 i2c_0: i2c@78b7000 {
 282                         pinctrl-0 = <&i2c_0_pins>;
 283                         pinctrl-names = "default";
 284                         status = "okay";
 285                 };
 286
 287                 pcie0: pci@40000000 {
 288                         status = "okay";
 289                         perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
 290                         wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
 291                 };
 292         };
 293
 294         keys {
 295                 compatible = "gpio-keys";
 296
 297                 reset {
 298                         label = "reset";
 299                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 300                         linux,code = <KEY_RESTART>;
 301                 };
 302         };
 303 };
 304
 305 &blsp_dma {
 306         status = "okay";
 307 };
 308
 309 &blsp1_uart1 {
 310         pinctrl-0 = <&serial_0_pins>;
 311         pinctrl-names = "default";
 312         status = "okay";
 313 };
 314
 315 &blsp1_uart2 {
 316         pinctrl-0 = <&serial_1_pins>;
 317         pinctrl-names = "default";
 318         status = "okay";
 319 };
 320
 321 &watchdog {
 322         status = "okay";
 323 };
 324
 325 &crypto {
 326         status = "okay";
 327 };
 328
 329 &cryptobam {
 330         status = "okay";
 331 };
 332
 333 &usb3_ss_phy {
 334         status = "okay";
 335 };
 336
 337 &usb3_hs_phy {
 338         status = "okay";
 339 };
 340
 341 &usb3 {
 342         status = "okay";
 343 };
 344
 345 &usb2_hs_phy {
 346         status = "okay";
 347 };
 348
 349 &usb2 {
 350         status = "okay";
 351 };
 352
 353 &qpic_bam {
 354         status = "okay";
 355 };
 356
 357 &nand {
 358         pinctrl-0 = <&nand_pins>;
 359         pinctrl-names = "default";
 360         status = "okay";
 361 };
 362
 363 &wifi0 {
 364         status = "okay";
 365         nvmem-cell-names = "pre-calibration";
 366         nvmem-cells = <&precal_art_1000>;
 367 };
 368
 369 &wifi1 {
 370         status = "okay";
 371         nvmem-cell-names = "pre-calibration";
 372         nvmem-cells = <&precal_art_5000>;
 373 };