ipq40xx: use existing labels for crypto node
[openwrt/openwrt.git] / target / linux / ipq40xx / files-6.6 / arch / arm / boot / dts / qcom / qcom-ipq4019-xx8300.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /*
4 * Device Tree Source for Linksys xx8300 (Dallas)
5 *
6 * Copyright (C) 2019, 2022 Jeff Kletsky
7 * Updated 2020 Hans Geiblinger
8 *
9 */
10
11 #include "qcom-ipq4019.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/soc/qcom,tcsr.h>
15
16 //
17 // OEM U-Boot provides either
18 // init=/sbin/init rootfstype=ubifs ubi.mtd=11,2048 \
19 // root=ubi0:ubifs rootwait rw
20 // or the same with ubi.mtd=13,2048
21 //
22
23 / {
24 chosen {
25 bootargs-append = " root=/dev/ubiblock0_0 rootfstype=squashfs ro";
26 };
27
28
29 soc {
30 mdio@90000 {
31 status = "okay";
32 };
33
34 tcsr@1949000 {
35 compatible = "qcom,tcsr";
36 reg = <0x1949000 0x100>;
37 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
38 };
39
40 tcsr@194b000 {
41 compatible = "qcom,tcsr";
42 reg = <0x194b000 0x100>;
43 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
44 };
45
46 ess_tcsr@1953000 {
47 compatible = "qcom,tcsr";
48 reg = <0x1953000 0x1000>;
49 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
50 };
51
52 tcsr@1957000 {
53 compatible = "qcom,tcsr";
54 reg = <0x1957000 0x100>;
55 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
56 };
57 };
58
59 regulator-usb-vbus {
60 compatible = "regulator-fixed";
61 regulator-name = "USB_VBUS";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
64 regulator-always-on;
65 regulator-boot-on;
66 gpio = <&tlmm 68 GPIO_ACTIVE_LOW>;
67 };
68 };
69
70 &watchdog {
71 status = "okay";
72 };
73
74 &prng {
75 status = "okay";
76 };
77
78 &crypto {
79 status = "okay";
80 };
81
82 &blsp_dma {
83 status = "okay";
84 };
85
86 &blsp1_uart1 {
87 status = "okay";
88 pinctrl-0 = <&serial_0_pins>;
89 pinctrl-names = "default";
90
91 };
92
93 &cryptobam {
94 status = "okay";
95 };
96
97 &nand {
98 status = "okay";
99
100 pinctrl-0 = <&nand_pins>;
101 pinctrl-names = "default";
102
103 nand@0 {
104 partitions {
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
107 #size-cells = <1>;
108
109 partition@0 {
110 label = "sbl1";
111 reg = <0x0 0x100000>;
112 read-only;
113 };
114
115 partition@100000 {
116 label = "mibib";
117 reg = <0x100000 0x100000>;
118 read-only;
119 };
120
121 partition@200000 {
122 label = "qsee";
123 reg = <0x200000 0x100000>;
124 read-only;
125 };
126
127 partition@300000 {
128 label = "cdt";
129 reg = <0x300000 0x80000>;
130 read-only;
131 };
132
133 partition@380000 {
134 label = "appsblenv";
135 reg = <0x380000 0x80000>;
136 read-only;
137 };
138
139 partition@400000 {
140 label = "ART";
141 reg = <0x400000 0x80000>;
142 read-only;
143 };
144
145 partition@480000 {
146 label = "appsbl";
147 reg = <0x480000 0x200000>;
148 read-only;
149 };
150
151 partition@680000 {
152 label = "u_env";
153 reg = <0x680000 0x80000>;
154 // writable -- U-Boot environment
155 };
156
157 partition@700000 {
158 label = "s_env";
159 reg = <0x700000 0x40000>;
160 // writable -- Boot counter records
161 };
162
163 partition@740000 {
164 label = "devinfo";
165 reg = <0x740000 0x40000>;
166 read-only;
167 };
168
169 partition@780000 {
170 label = "kernel";
171 reg = <0x780000 0x5800000>;
172 };
173
174 partition@c80000 {
175 label = "rootfs";
176 reg = <0xc80000 0x5300000>;
177 };
178
179 partition@5f80000 {
180 label = "alt_kernel";
181 reg = <0x5f80000 0x5800000>;
182 };
183
184 partition@6480000 {
185 label = "alt_rootfs";
186 reg = <0x6480000 0x5300000>;
187 };
188
189 partition@b780000 {
190 label = "sysdiag";
191 reg = <0xb780000 0x100000>;
192 read-only;
193 };
194
195 partition@b880000 {
196 label = "syscfg";
197 reg = <0xb880000 0x4680000>;
198 read-only;
199 };
200 };
201 };
202 };
203
204 &pcie0 {
205 status = "okay";
206
207 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
208 wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
209
210 bridge@0,0 {
211 reg = <0x00000000 0 0 0 0>;
212 #address-cells = <3>;
213 #size-cells = <2>;
214 ranges;
215
216 wifi2: wifi@1,0 {
217 compatible = "qcom,ath10k";
218 reg = <0x00010000 0 0 0 0>;
219 };
220 };
221 };
222
223 &qpic_bam {
224 status = "okay";
225 };
226
227 &tlmm {
228 serial_0_pins: serial0-pinmux {
229 pins = "gpio16", "gpio17";
230 function = "blsp_uart0";
231 bias-disable;
232 };
233
234 nand_pins: nand_pins {
235 pullups {
236 pins = "gpio53", "gpio58", "gpio59";
237 function = "qpic";
238 bias-pull-up;
239 };
240
241 // gpio61 controls led_usb
242
243 pulldowns {
244 pins = "gpio55", "gpio56", "gpio57",
245 "gpio60", "gpio62", "gpio63",
246 "gpio64", "gpio65", "gpio66",
247 "gpio67", "gpio69";
248 function = "qpic";
249 bias-pull-down;
250 };
251 };
252 };
253
254 &usb2_hs_phy {
255 status = "okay";
256 };
257
258 &usb2 {
259 status = "okay";
260
261 usb@6000000 {
262 #address-cells = <1>;
263 #size-cells = <0>;
264
265 usb2_port1: port@1 {
266 reg = <1>;
267 #trigger-source-cells = <0>;
268 };
269 };
270 };
271
272 &usb3_hs_phy {
273 status = "okay";
274 };
275
276 &usb3_ss_phy {
277 status = "okay";
278 };
279
280 &usb3 {
281 status = "okay";
282 };
283
284 &usb3_dwc {
285 #address-cells = <1>;
286 #size-cells = <0>;
287
288 usb3_port1: port@1 {
289 reg = <1>;
290 #trigger-source-cells = <0>;
291 };
292
293 usb3_port2: port@2 {
294 reg = <2>;
295 #trigger-source-cells = <0>;
296 };
297 };
298
299 &gmac {
300 status = "okay";
301 };
302
303 &switch {
304 status = "okay";
305 };
306
307 &swport1 {
308 status = "okay";
309 };
310
311 &swport2 {
312 status = "okay";
313 };
314
315 &swport3 {
316 status = "okay";
317 };
318
319 &swport4 {
320 status = "okay";
321 };
322
323 &swport5 {
324 status = "okay";
325 };