target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-ap-303h.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Aruba AP-303H";
  10         compatible = "aruba,ap-303h";
  11
  12         aliases {
  13                 led-boot = &led_system_green;
  14                 led-failsafe = &led_system_red;
  15                 led-running = &led_system_green;
  16                 led-upgrade = &led_system_amber;
  17         };
  18
  19         memory {
  20                 device_type = "memory";
  21                 reg = <0x80000000 0x10000000>;
  22         };
  23
  24         soc {
  25                 mdio@90000 {
  26                         status = "okay";
  27                         pinctrl-0 = <&mdio_pins>;
  28                         pinctrl-names = "default";
  29
  30                         reset-gpios = <&tlmm 19 GPIO_ACTIVE_LOW>;
  31                         reset-delay-us = <2000>;
  32                 };
  33
  34                 counter@4a1000 {
  35                         compatible = "qcom,qca-gcnt";
  36                         reg = <0x4a1000 0x4>;
  37                 };
  38
  39                 ess_tcsr@1953000 {
  40                         compatible = "qcom,tcsr";
  41                         reg = <0x1953000 0x1000>;
  42                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  43                 };
  44
  45                 tcsr@1949000 {
  46                         compatible = "qcom,tcsr";
  47                         reg = <0x1949000 0x100>;
  48                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  49                 };
  50
  51                 tcsr@194b000 {
  52                         compatible = "qcom,tcsr";
  53                         reg = <0x194b000 0x100>;
  54                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  55                 };
  56
  57                 tcsr@1957000 {
  58                         compatible = "qcom,tcsr";
  59                         reg = <0x1957000 0x100>;
  60                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  61                 };
  62
  63                 crypto@8e3a000 {
  64                         status = "okay";
  65                 };
  66         };
  67
  68         leds {
  69                 compatible = "gpio-leds";
  70
  71                 wifi_green {
  72                         label = "green:wifi";
  73                         gpios = <&tlmm 27 GPIO_ACTIVE_HIGH>;
  74                         linux,default-trigger = "phy0tpt";
  75                 };
  76
  77                 wifi_amber {
  78                         label = "amber:wifi";
  79                         gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
  80                         linux,default-trigger = "phy1tpt";
  81                 };
  82
  83                 pse {
  84                         label = "green:pse";
  85                         gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
  86                 };
  87
  88                 led_system_red: system_red {
  89                         label = "red:system";
  90                         gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
  91                 };
  92
  93                 led_system_green: system_green {
  94                         label = "green:system";
  95                         gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 led_system_amber: system_amber {
  99                         label = "amber:system";
 100                         gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
 101                 };
 102         };
 103
 104         keys {
 105                 compatible = "gpio-keys";
 106
 107                 reset {
 108                         label = "Reset button";
 109                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
 110                         linux,code = <KEY_RESTART>;
 111                 };
 112         };
 113 };
 114
 115 &watchdog {
 116         status = "okay";
 117 };
 118
 119 &prng {
 120         status = "okay";
 121 };
 122
 123 &blsp_dma {
 124         status = "okay";
 125 };
 126
 127 &blsp1_uart1 {
 128         pinctrl-0 = <&serial_0_pins>;
 129         pinctrl-names = "default";
 130         status = "okay";
 131 };
 132
 133 &blsp1_uart2 {
 134         /* Texas Instruments CC2540T BLE radio */
 135         pinctrl-0 = <&serial_1_pins>;
 136         pinctrl-names = "default";
 137         status = "okay";
 138 };
 139
 140 &cryptobam {
 141         status = "okay";
 142 };
 143
 144 &qpic_bam {
 145         status = "okay";
 146 };
 147
 148 &tlmm {
 149         /*
 150          * In addition to the Pins listed below,
 151          * the following GPIOs have "features":
 152          * 39 - out - active low to force HW reset
 153          * 32 - out - active low to reset TPM
 154          * 43 - out - active low to reset BLE radio
 155          * 41 - out - pulse to set warm reset status
 156          * 34 - out - active low to enable PSE port
 157          * 22 - in  - active low when 802.3at powered
 158          * 29 - in  - active high when DC powered
 159          * 40 - in  - active low when reset due to cold HW reset
 160          * 30 - in  - active low when USB overcurrent detected
 161          * 35 - in  - interrupt line for power monitor chip
 162          * 31 - in  - active low when PSE port active
 163          */
 164         mdio_pins: mdio_pinmux {
 165                 mux_1 {
 166                         pins = "gpio6";
 167                         function = "mdio";
 168                         bias-pull-up;
 169                 };
 170                 mux_2 {
 171                         pins = "gpio7";
 172                         function = "mdc";
 173                         bias-pull-up;
 174                 };
 175         };
 176
 177         spi_0_pins: spi_0_pinmux {
 178                 pin {
 179                         function = "blsp_spi0";
 180                         pins = "gpio13", "gpio14", "gpio15";
 181                         drive-strength = <12>;
 182                         bias-disable;
 183                 };
 184                 pin_cs {
 185                         function = "gpio";
 186                         pins = "gpio12", "gpio59";
 187                         drive-strength = <2>;
 188                         bias-disable;
 189                         output-high;
 190                 };
 191         };
 192
 193         i2c_0_pins: i2c_0_pinmux {
 194                 mux {
 195                         pins = "gpio20", "gpio21";
 196                         function = "blsp_i2c0";
 197                         drive-strength = <4>;
 198                         bias-pull-up;
 199                 };
 200         };
 201
 202         serial_0_pins: serial_0_pinmux {
 203                 mux {
 204                         pins = "gpio16", "gpio17";
 205                         function = "blsp_uart0";
 206                         bias-disable;
 207                 };
 208         };
 209
 210         serial_1_pins: serial_1_pinmux {
 211                 mux {
 212                         pins = "gpio8", "gpio9";
 213                         function = "blsp_uart1";
 214                         bias-disable;
 215                 };
 216         };
 217
 218         usb-power {
 219                 line-name = "USB-power";
 220                 gpios = <23 GPIO_ACTIVE_HIGH>;
 221                 gpio-hog;
 222                 output-high;
 223         };
 224 };
 225
 226 &blsp1_i2c3 {
 227         pinctrl-0 = <&i2c_0_pins>;
 228         pinctrl-names = "default";
 229         status = "okay";
 230         clock-frequency = <400000>;
 231
 232         tpm@29 {
 233                 /* No Driver */
 234                 compatible = "atmel,at97sc3203";
 235                 reg = <0x29>;
 236                 read-only;
 237         };
 238
 239         power-monitor@40 {
 240                 /* No driver */
 241                 /* Device also replies on address 0x3f, see   */
 242                 /* ISL28022 datasheet, "Broadcast Addressing" */
 243                 compatible = "isl,isl28022";
 244                 reg = <0x40>;
 245         };
 246 };
 247
 248 &blsp1_spi1 {
 249         pinctrl-0 = <&spi_0_pins>;
 250         pinctrl-names = "default";
 251         status = "okay";
 252         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 253
 254         flash@0 {
 255                 compatible = "jedec,spi-nor";
 256                 reg = <0>;
 257                 spi-max-frequency = <24000000>;
 258
 259                 partitions {
 260                         compatible = "fixed-partitions";
 261                         #address-cells = <1>;
 262                         #size-cells = <1>;
 263
 264                         /*
 265                          * There is no partition map for the NOR flash
 266                          * in the stock firmware.
 267                          *
 268                          * All partitions here are based on offsets
 269                          * found in the U-Boot GPL code and information
 270                          * from smem.
 271                          */
 272
 273                         partition@0 {
 274                                 label = "sbl1";
 275                                 reg = <0x0 0x40000>;
 276                                 read-only;
 277                         };
 278
 279                         partition@40000 {
 280                                 label = "mibib";
 281                                 reg = <0x40000 0x20000>;
 282                                 read-only;
 283                         };
 284
 285                         partition@60000 {
 286                                 label = "qsee";
 287                                 reg = <0x60000 0x60000>;
 288                                 read-only;
 289                         };
 290
 291                         partition@c0000 {
 292                                 label = "cdt";
 293                                 reg = <0xc0000 0x10000>;
 294                                 read-only;
 295                         };
 296
 297                         partition@d0000 {
 298                                 label = "ddrparams";
 299                                 reg = <0xd0000 0x10000>;
 300                                 read-only;
 301                         };
 302
 303                         partition@e0000 {
 304                                 label = "appsblenv";
 305                                 reg = <0xe0000 0x10000>;
 306                                 read-only;
 307                         };
 308
 309                         partition@f0000 {
 310                                 label = "appsbl";
 311                                 reg = <0xf0000 0x100000>;
 312                                 read-only;
 313                         };
 314
 315                         partition@1e0000 {
 316                                 label = "ART";
 317                                 reg = <0x1f0000 0x10000>;
 318                                 read-only;
 319
 320                                 nvmem-layout {
 321                                         compatible = "fixed-layout";
 322                                         #address-cells = <1>;
 323                                         #size-cells = <1>;
 324
 325                                         precal_art_1000: precal@1000 {
 326                                                 reg = <0x1000 0x2f20>;
 327                                         };
 328
 329                                         precal_art_5000: precal@5000 {
 330                                                 reg = <0x5000 0x2f20>;
 331                                         };
 332                                 };
 333                         };
 334
 335                         partition@1f0000 {
 336                                 label = "osss";
 337                                 reg = <0x200000 0x170000>;
 338                                 read-only;
 339                         };
 340
 341                         partition@200000 {
 342                                 label = "pds";
 343                                 reg = <0x370000 0x10000>;
 344                                 read-only;
 345                         };
 346
 347                         partition@380000 {
 348                                 label = "apcd";
 349                                 reg = <0x380000 0x10000>;
 350                                 read-only;
 351                         };
 352
 353                         partition@390000 {
 354                                 label = "mfginfo";
 355                                 reg = <0x390000 0x10000>;
 356                                 read-only;
 357
 358                                 nvmem-layout {
 359                                         compatible = "fixed-layout";
 360                                         #address-cells = <1>;
 361                                         #size-cells = <1>;
 362
 363                                         macaddr_mfginfo_1d: macaddr@1d {
 364                                                 compatible = "mac-base";
 365                                                 reg = <0x1d 0x6>;
 366                                                 #nvmem-cell-cells = <1>;
 367                                         };
 368
 369                                         macaddr_mfginfo_45: macaddr@45 {
 370                                                 compatible = "mac-base";
 371                                                 reg = <0x45 0x6>;
 372                                                 #nvmem-cell-cells = <1>;
 373                                         };
 374                                 };
 375                         };
 376
 377                         partition@3a0000 {
 378                                 label = "fcache";
 379                                 reg = <0x3a0000 0x10000>;
 380                                 read-only;
 381                         };
 382
 383                         partition@3b0000 {
 384                                 /* Called osss1 in smem */
 385                                 label = "u-boot-env-bak";
 386                                 reg = <0x3b0000 0x10000>;
 387                                 read-only;
 388                         };
 389
 390                         partition@3f0000 {
 391                                 label = "u-boot-env";
 392                                 reg = <0x3c0000 0x40000>;
 393                                 read-only;
 394                         };
 395                 };
 396         };
 397
 398         flash@1 {
 399                 status = "okay";
 400
 401                 compatible = "spi-nand";
 402                 reg = <1>;
 403                 spi-max-frequency = <24000000>;
 404
 405                 partitions {
 406                         compatible = "fixed-partitions";
 407                         #address-cells = <1>;
 408                         #size-cells = <1>;
 409
 410                         partition@0 {
 411                                 /* 'aos0' in Aruba firmware */
 412                                 label = "aos0";
 413                                 reg = <0x0 0x2000000>;
 414                                 read-only;
 415                         };
 416
 417                         partition@2000000 {
 418                                 /* 'aos1' in Aruba firmware */
 419                                 label = "ubi";
 420                                 reg = <0x2000000 0x2000000>;
 421                         };
 422
 423                         partition@4000000 {
 424                                 label = "aruba-ubifs";
 425                                 reg = <0x4000000 0x4000000>;
 426                                 read-only;
 427                         };
 428                 };
 429         };
 430 };
 431
 432 &usb3 {
 433         status = "okay";
 434 };
 435
 436 &usb3_dwc {
 437         phys = <&usb3_hs_phy>;
 438         phy-names = "usb2-phy";
 439 };
 440
 441 &usb3_hs_phy {
 442         status = "okay";
 443 };
 444
 445 &gmac {
 446         status = "okay";
 447
 448         nvmem-cell-names = "mac-address";
 449         nvmem-cells = <&macaddr_mfginfo_1d 1>;
 450 };
 451
 452 &switch {
 453         status = "okay";
 454 };
 455
 456 &swport2 {
 457         status = "okay";
 458
 459         label = "lan1";
 460 };
 461
 462 &swport3 {
 463         status = "okay";
 464
 465         label = "lan2";
 466 };
 467
 468 &swport4 {
 469         status = "okay";
 470
 471         label = "lan3";
 472 };
 473
 474 &swport5 {
 475         status = "okay";
 476
 477         label = "wan";
 478         nvmem-cell-names = "mac-address";
 479         nvmem-cells = <&macaddr_mfginfo_1d 0>;
 480 };
 481
 482 &wifi0 {
 483         status = "okay";
 484         nvmem-cell-names = "pre-calibration", "mac-address";
 485         nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_45 0>;
 486         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 487 };
 488
 489 &wifi1 {
 490         status = "okay";
 491         nvmem-cell-names = "pre-calibration", "mac-address";
 492         nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_45 1>;
 493         qcom,ath10k-calibration-variant = "Aruba-AP-303";
 494 };