target/linux/ipq40xx/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq4029-gl-s1300.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4019.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/leds/common.h>
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8
   9 / {
  10         model = "GL.iNet GL-S1300";
  11         compatible = "glinet,gl-s1300";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         memory {
  21                 device_type = "memory";
  22                 reg = <0x80000000 0x10000000>;
  23         };
  24
  25         soc {
  26                 tcsr@1949000 {
  27                         compatible = "qcom,tcsr";
  28                         reg = <0x1949000 0x100>;
  29                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
  30                 };
  31
  32                 tcsr@194b000 {
  33                         /* select hostmode */
  34                         compatible = "qcom,tcsr";
  35                         reg = <0x194b000 0x100>;
  36                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
  37                         status = "okay";
  38                 };
  39
  40                 ess_tcsr@1953000 {
  41                         compatible = "qcom,tcsr";
  42                         reg = <0x1953000 0x1000>;
  43                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
  44                 };
  45
  46                 tcsr@1957000 {
  47                         compatible = "qcom,tcsr";
  48                         reg = <0x1957000 0x100>;
  49                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
  50                 };
  51         };
  52
  53         keys {
  54                 compatible = "gpio-keys";
  55
  56                 wps {
  57                         label = "wps";
  58                         gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
  59                         linux,code = <KEY_WPS_BUTTON>;
  60                 };
  61
  62                 reset {
  63                         label = "reset";
  64                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
  65                         linux,code = <KEY_RESTART>;
  66                 };
  67         };
  68
  69         leds {
  70                 compatible = "gpio-leds";
  71
  72                 led_power: power {
  73                         function = LED_FUNCTION_POWER;
  74                         color = <LED_COLOR_ID_GREEN>;
  75                         gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>;
  76                         default-state = "on";
  77                 };
  78
  79                 mesh {
  80                         label = "green:mesh";
  81                         gpios = <&tlmm 59 GPIO_ACTIVE_HIGH>;
  82                 };
  83
  84                 wlan {
  85                         function = LED_FUNCTION_WLAN;
  86                         color = <LED_COLOR_ID_GREEN>;
  87                         gpios = <&tlmm 60 GPIO_ACTIVE_HIGH>;
  88                         linux,default-trigger = "phy0tpt";
  89                 };
  90         };
  91 };
  92
  93 &watchdog {
  94         status = "okay";
  95 };
  96
  97 &prng {
  98         status = "okay";
  99 };
 100
 101 &crypto {
 102         status = "okay";
 103 };
 104
 105 &vqmmc {
 106         status = "okay";
 107 };
 108
 109 &sdhci {
 110         status = "okay";
 111         pinctrl-0 = <&sd_pins>;
 112         pinctrl-names = "default";
 113         cd-gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
 114         vqmmc-supply = <&vqmmc>;
 115 };
 116
 117 &blsp_dma {
 118         status = "okay";
 119 };
 120
 121 &cryptobam {
 122         status = "okay";
 123 };
 124
 125 &blsp1_spi1 {
 126         pinctrl-0 = <&spi_0_pins>;
 127         pinctrl-names = "default";
 128         status = "okay";
 129         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
 130
 131         flash@0 {
 132                 compatible = "jedec,spi-nor";
 133                 reg = <0>;
 134                 spi-max-frequency = <24000000>;
 135
 136                 partitions {
 137                         compatible = "fixed-partitions";
 138                         #address-cells = <1>;
 139                         #size-cells = <1>;
 140
 141                         SBL1@0 {
 142                                 label = "SBL1";
 143                                 reg = <0x0 0x40000>;
 144                                 read-only;
 145                         };
 146
 147                         MIBIB@40000 {
 148                                 label = "MIBIB";
 149                                 reg = <0x40000 0x20000>;
 150                                 read-only;
 151                         };
 152
 153                         QSEE@60000 {
 154                                 label = "QSEE";
 155                                 reg = <0x60000 0x60000>;
 156                                 read-only;
 157                         };
 158
 159                         CDT@c0000 {
 160                                 label = "CDT";
 161                                 reg = <0xc0000 0x10000>;
 162                                 read-only;
 163                         };
 164
 165                         DDRPARAMS@d0000 {
 166                                 label = "DDRPARAMS";
 167                                 reg = <0xd0000 0x10000>;
 168                                 read-only;
 169                         };
 170
 171                         APPSBLENV@e0000 {
 172                                 label = "APPSBLENV";
 173                                 reg = <0xe0000 0x10000>;
 174                                 read-only;
 175                         };
 176
 177                         APPSBL@f0000 {
 178                                 label = "APPSBL";
 179                                 reg = <0xf0000 0x80000>;
 180                                 read-only;
 181                         };
 182
 183                         ART@170000 {
 184                                 label = "ART";
 185                                 reg = <0x170000 0x10000>;
 186                                 read-only;
 187
 188                                 nvmem-layout {
 189                                         compatible = "fixed-layout";
 190                                         #address-cells = <1>;
 191                                         #size-cells = <1>;
 192
 193                                         precal_art_1000: precal@1000 {
 194                                                 reg = <0x1000 0x2f20>;
 195                                         };
 196
 197                                         precal_art_5000: precal@5000 {
 198                                                 reg = <0x5000 0x2f20>;
 199                                         };
 200                                 };
 201                         };
 202
 203                         firmware@180000 {
 204                                 compatible = "denx,fit";
 205                                 label = "firmware";
 206                                 reg = <0x180000 0xe80000>;
 207                         };
 208                 };
 209         };
 210 };
 211
 212 &blsp1_spi2 {
 213         pinctrl-0 = <&spi_1_pins>;
 214         pinctrl-names = "default";
 215         status = "okay";
 216
 217         spidev1: spi@0 {
 218                 compatible = "silabs,si3210";
 219                 reg = <0>;
 220                 spi-max-frequency = <24000000>;
 221         };
 222 };
 223
 224 &blsp1_uart1 {
 225         pinctrl-0 = <&serial_pins>;
 226         pinctrl-names = "default";
 227         status = "okay";
 228 };
 229
 230 &blsp1_uart2 {
 231         pinctrl-0 = <&serial_1_pins>;
 232         pinctrl-names = "default";
 233         status = "okay";
 234 };
 235
 236 &tlmm {
 237         serial_pins: serial_pinmux {
 238                 mux {
 239                         pins = "gpio16", "gpio17";
 240                         function = "blsp_uart0";
 241                         bias-disable;
 242                 };
 243         };
 244
 245         serial_1_pins: serial1_pinmux {
 246                 mux {
 247                         pins = "gpio8", "gpio9",
 248                                 "gpio10", "gpio11";
 249                         function = "blsp_uart1";
 250                         bias-disable;
 251                 };
 252         };
 253
 254         spi_0_pins: spi_0_pinmux {
 255                 pinmux {
 256                         function = "blsp_spi0";
 257                         pins = "gpio13", "gpio14", "gpio15";
 258                 };
 259                 pinmux_cs {
 260                         function = "gpio";
 261                         pins = "gpio12";
 262                 };
 263                 pinconf {
 264                         pins = "gpio13", "gpio14", "gpio15";
 265                         drive-strength = <12>;
 266                         bias-disable;
 267                 };
 268                 pinconf_cs {
 269                         pins = "gpio12";
 270                         drive-strength = <2>;
 271                         bias-disable;
 272                         output-high;
 273                 };
 274         };
 275
 276         spi_1_pins: spi_1_pinmux {
 277                 mux {
 278                         pins = "gpio44", "gpio46", "gpio47";
 279                         function = "blsp_spi1";
 280                         bias-disable;
 281                 };
 282                 host_int {
 283                         pins = "gpio42";
 284                         function = "gpio";
 285                         input;
 286                 };
 287                 cs {
 288                         pins = "gpio45";
 289                         function = "gpio";
 290                         bias-pull-up;
 291                 };
 292                 wake {
 293                         pins = "gpio40";
 294                         function = "gpio";
 295                         output-high;
 296                 };
 297                 reset {
 298                         pins = "gpio49";
 299                         function = "gpio";
 300                         output-high;
 301                 };
 302         };
 303
 304         sd_pins: sd_pins {
 305                 pinmux {
 306                         function = "sdio";
 307                         pins = "gpio23", "gpio24", "gpio25", "gpio26",
 308                                 "gpio28", "gpio29", "gpio30", "gpio31";
 309                         drive-strength = <10>;
 310                 };
 311
 312                 pinmux_sd_clk {
 313                         function = "sdio";
 314                         pins = "gpio27";
 315                         drive-strength = <16>;
 316                 };
 317
 318                 pinmux_sd7 {
 319                         function = "sdio";
 320                         pins = "gpio32";
 321                         drive-strength = <10>;
 322                         bias-disable;
 323                 };
 324         };
 325 };
 326
 327 &usb2_hs_phy {
 328         status = "okay";
 329 };
 330
 331 &usb2 {
 332         status = "okay";
 333 };
 334
 335 &usb3_hs_phy {
 336         status = "okay";
 337 };
 338
 339 &usb3_ss_phy {
 340         status = "okay";
 341 };
 342
 343 &usb3 {
 344         status = "okay";
 345 };
 346
 347 &mdio {
 348         status = "okay";
 349 };
 350
 351 &wifi0 {
 352         status = "okay";
 353         nvmem-cell-names = "pre-calibration";
 354         nvmem-cells = <&precal_art_1000>;
 355         qcom,ath10k-calibration-variant = "GL-S1300";
 356 };
 357
 358 &wifi1 {
 359         status = "okay";
 360         nvmem-cell-names = "pre-calibration";
 361         nvmem-cells = <&precal_art_5000>;
 362         qcom,ath10k-calibration-variant = "GL-S1300";
 363 };