1 #include "qcom-ipq8064-v2.0.dtsi"
3 #include <dt-bindings/input/input.h>
6 model = "Netgear Nighthawk X4 R7500v2";
7 compatible = "netgear,r7500v2", "qcom,ipq8064";
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
16 reg = <0x5fe00000 0x200000>;
25 led-failsafe = &power;
31 bootargs = "rootfstype=squashfs noinitrd";
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
80 label = "amber:status";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
85 label = "white:internet";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
122 button_pins: button_pins {
124 pins = "gpio6", "gpio54", "gpio65";
126 drive-strength = <2>;
133 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
134 "gpio24","gpio26", "gpio53", "gpio64";
136 drive-strength = <2>;
141 usb0_pwr_en_pins: usb0_pwr_en_pins {
145 drive-strength = <12>;
151 usb1_pwr_en_pins: usb1_pwr_en_pins {
153 pins = "gpio16", "gpio68";
155 drive-strength = <12>;
173 pinctrl-0 = <&usb0_pwr_en_pins>;
174 pinctrl-names = "default";
180 pinctrl-0 = <&usb1_pwr_en_pins>;
181 pinctrl-names = "default";
186 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
187 pinctrl-0 = <&pcie0_pins>;
188 pinctrl-names = "default";
191 reg = <0x00000000 0 0 0 0>;
192 #address-cells = <3>;
197 compatible = "pci168c,0040";
198 reg = <0x00010000 0 0 0 0>;
200 nvmem-cells = <&macaddr_art_6>;
201 nvmem-cell-names = "mac-address";
202 mac-address-increment = <(1)>;
209 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
210 pinctrl-0 = <&pcie1_pins>;
211 pinctrl-names = "default";
212 max-link-speed = <1>;
215 reg = <0x00000000 0 0 0 0>;
216 #address-cells = <3>;
221 compatible = "pci168c,0040";
222 reg = <0x00010000 0 0 0 0>;
224 nvmem-cells = <&macaddr_art_6>;
225 nvmem-cell-names = "mac-address";
226 mac-address-increment = <(2)>;
234 pinctrl-0 = <&nand_pins>;
235 pinctrl-names = "default";
239 compatible = "qcom,nandcs";
241 nand-ecc-strength = <4>;
242 nand-bus-width = <8>;
243 nand-ecc-step-size = <512>;
246 qcom,boot_pages_size = <0x1180000>;
249 compatible = "fixed-partitions";
250 #address-cells = <1>;
255 reg = <0x0000000 0x0c80000>;
261 reg = <0x0c80000 0x0500000>;
267 reg = <0x1180000 0x0080000>;
273 reg = <0x1200000 0x0140000>;
277 artbak: art@1340000 {
279 reg = <0x1340000 0x0140000>;
285 reg = <0x1480000 0x0400000>;
290 reg = <0x1880000 0x6080000>;
295 reg = <0x7900000 0x0700000>;
305 pinctrl-0 = <&mdio0_pins>;
306 pinctrl-names = "default";
308 phy0: ethernet-phy@0 {
310 qca,ar8327-initvals = <
311 0x00004 0x7600000 /* PAD0_MODE */
312 0x00008 0x1000000 /* PAD5_MODE */
313 0x0000c 0x80 /* PAD6_MODE */
314 0x000e4 0xaa545 /* MAC_POWER_SEL */
315 0x000e0 0xc74164de /* SGMII_CTRL */
316 0x0007c 0x4e /* PORT0_STATUS */
317 0x00094 0x4e /* PORT6_STATUS */
321 phy4: ethernet-phy@4 {
331 pinctrl-0 = <&rgmii2_pins>;
332 pinctrl-names = "default";
334 nvmem-cells = <&macaddr_art_6>;
335 nvmem-cell-names = "mac-address";
348 nvmem-cells = <&macaddr_art_0>;
349 nvmem-cell-names = "mac-address";
358 compatible = "nvmem-cells";
359 #address-cells = <1>;
362 macaddr_art_0: macaddr@0 {
366 macaddr_art_6: macaddr@6 {