1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "qcom-ipq8065-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
7 model = "Arris TR4400 v2";
8 compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
16 led-boot = &led_status_blue;
17 led-failsafe = &led_status_red;
18 led-running = &led_status_blue;
19 led-upgrade = &led_status_red;
23 bootargs = "rootfstype=squashfs noinitrd";
27 compatible = "gpio-keys";
28 pinctrl-0 = <&button_pins>;
29 pinctrl-names = "default";
33 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
35 debounce-interval = <60>;
41 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 debounce-interval = <60>;
49 compatible = "gpio-leds";
50 pinctrl-0 = <&led_pins>;
51 pinctrl-names = "default";
53 led_status_red: status_red {
55 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
58 led_status_blue: status_blue {
59 label = "blue:status";
60 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
66 button_pins: button_pins {
68 pins = "gpio6", "gpio54";
77 pins = "gpio7", "gpio8";
84 rgmii2_pins: rgmii2-pins {
86 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
94 drive-strength = <12>;
100 qcom,mode = <GSBI_PROT_SPI>;
106 pinctrl-0 = <&spi_pins>;
107 pinctrl-names = "default";
109 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
112 compatible = "everspin,mr25h256";
113 spi-max-frequency = <40000000>;
124 compatible = "qcom,nandcs";
126 nand-ecc-strength = <4>;
127 nand-bus-width = <8>;
128 nand-ecc-step-size = <512>;
130 qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
139 reg = <0x0000000 0x0040000>;
144 reg = <0x0040000 0x0140000>;
149 reg = <0x0180000 0x0140000>;
154 reg = <0x02c0000 0x0280000>;
158 label = "0:DDRCONFIG";
159 reg = <0x0540000 0x0120000>;
164 reg = <0x0660000 0x0120000>;
169 reg = <0x0780000 0x0280000>;
174 reg = <0x0a00000 0x0280000>;
179 reg = <0x0c80000 0x0500000>;
183 label = "0:APPSBLENV";
184 reg = <0x1180000 0x0080000>;
188 reg = <0x1200000 0x0140000>;
192 compatible = "fixed-layout";
193 #address-cells = <1>;
196 precal_ART_1000: precal@1000 {
197 reg = <0x1000 0x2f20>;
199 precal_ART_5000: precal@5000 {
200 reg = <0x5000 0x2f20>;
204 stock_partition@1340000 {
205 label = "stock_rootfs";
206 reg = <0x1340000 0x4000000>;
208 compatible = "fixed-partitions";
209 #address-cells = <1>;
214 reg = <0x0 0x4000000>;
218 label = "0:BOOTCONFIG";
219 reg = <0x5340000 0x0060000>;
224 reg = <0x53a0000 0x0140000>;
229 reg = <0x54e0000 0x0280000>;
233 label = "0:DDRCONFIG_1";
234 reg = <0x5760000 0x0120000>;
239 reg = <0x5880000 0x0120000>;
244 reg = <0x59a0000 0x0280000>;
249 reg = <0x5c20000 0x0280000>;
253 label = "0:BOOTCONFIG1";
254 reg = <0x5ea0000 0x0060000>;
258 label = "0:APPSBL_1";
259 reg = <0x5f00000 0x0500000>;
262 stock_partition@6400000 {
263 label = "stock_rootfs_1";
264 reg = <0x6400000 0x4000000>;
266 compatible = "fixed-partitions";
267 #address-cells = <1>;
272 reg = <0x0 0x100000>;
275 compatible = "fixed-layout";
276 #address-cells = <1>;
279 macaddr_fw_env_0: macaddr@0 {
282 macaddr_fw_env_6: macaddr@6 {
285 macaddr_fw_env_c: macaddr@c {
288 macaddr_fw_env_12: macaddr@12 {
291 macaddr_fw_env_18: macaddr@18 {
299 reg = <0x100000 0x9b00000>;
302 stock_partition@a400000 {
303 label = "stock_fw_env";
304 reg = <0xa400000 0x0100000>;
306 stock_partition@a500000 {
307 label = "stock_config";
308 reg = <0xa500000 0x0800000>;
310 stock_partition@ad00000 {
312 reg = <0xad00000 0x0200000>;
314 stock_partition@af00000 {
315 label = "stock_scfgmgr";
316 reg = <0xaf00000 0x0100000>;
325 pinctrl-0 = <&mdio0_pins>;
326 pinctrl-names = "default";
329 compatible = "qca,qca8337";
330 #address-cells = <1>;
335 #address-cells = <1>;
343 tx-internal-delay-ps = <1000>;
344 rx-internal-delay-ps = <1000>;
355 phy-mode = "internal";
356 phy-handle = <&phy_port1>;
362 phy-mode = "internal";
363 phy-handle = <&phy_port2>;
369 phy-mode = "internal";
370 phy-handle = <&phy_port3>;
376 phy-mode = "internal";
377 phy-handle = <&phy_port4>;
385 qca,sgmii-enable-pll;
395 #address-cells = <1>;
416 phy7: ethernet-phy@7 {
426 nvmem-cells = <&macaddr_fw_env_18>;
427 nvmem-cell-names = "mac-address";
429 pinctrl-0 = <&rgmii2_pins>;
430 pinctrl-names = "default";
443 nvmem-cells = <&macaddr_fw_env_0>;
444 nvmem-cell-names = "mac-address";
456 phy-handle = <&phy7>;
458 nvmem-cells = <&macaddr_fw_env_6>;
459 nvmem-cell-names = "mac-address";
480 reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
481 pinctrl-0 = <&pcie0_pins>;
482 pinctrl-names = "default";
485 reg = <0x00000000 0 0 0 0>;
486 #address-cells = <3>;
491 compatible = "pci168c,0046";
492 reg = <0x00010000 0 0 0 0>;
494 nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
495 nvmem-cell-names = "pre-calibration", "mac-address";
502 reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
503 pinctrl-0 = <&pcie1_pins>;
504 pinctrl-names = "default";
505 max-link-speed = <1>;
508 reg = <0x00000000 0 0 0 0>;
509 #address-cells = <3>;
514 compatible = "pci168c,0040";
515 reg = <0x00010000 0 0 0 0>;
517 nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
518 nvmem-cell-names = "pre-calibration", "mac-address";