1 #include "qcom-ipq8064-v1.0.dtsi"
4 model = "Qualcomm IPQ8064/AP161";
5 compatible = "qcom,ipq8064-ap161", "qcom,ipq8064";
8 reg = <0x42000000 0x1e000000>;
9 device_type = "memory";
17 reg = <0x41200000 0x300000>;
28 rgmii2_pins: rgmii2_pins {
30 pins = "gpio27", "gpio28", "gpio29",
31 "gpio30", "gpio31", "gpio32",
32 "gpio51", "gpio52", "gpio59",
33 "gpio60", "gpio61", "gpio62",
40 * The i2c device on gsbi4 should not be enabled.
41 * On ipq806x designs gsbi4 i2c is meant for exclusive
42 * RPM usage. Turning this on in kernel manifests as
43 * i2c failure for the RPM.
48 compatible = "qcom,smem";
76 pinctrl-0 = <&nand_pins>;
77 pinctrl-names = "default";
81 compatible = "qcom,nandcs";
83 nand-ecc-strength = <4>;
85 nand-ecc-step-size = <512>;
88 compatible = "qcom,smem";
96 pinctrl-0 = <&mdio0_pins>;
97 pinctrl-names = "default";
99 phy0: ethernet-phy@0 {
101 qca,ar8327-initvals = <
102 0x00004 0x7600000 /* PAD0_MODE */
103 0x00008 0x1000000 /* PAD5_MODE */
104 0x0000c 0x20080 /* PAD6_MODE */
105 0x000e4 0x6a545 /* MAC_POWER_SEL */
106 0x000e0 0xc74164de /* SGMII_CTRL */
107 0x0007c 0x4e /* PORT0_STATUS */
108 0x00094 0x4e /* PORT6_STATUS */
112 phy4: ethernet-phy@4 {
119 phy3: ethernet-phy@3 {
120 device_type = "ethernet-phy";
130 pinctrl-0 = <&rgmii2_pins>;
131 pinctrl-names = "default";