target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts

   1 #include "qcom-ipq8064-v1.0.dtsi"
   2
   3 / {
   4         model = "Qualcomm IPQ8064/DB149";
   5         compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
   6
   7         reserved-memory {
   8                 #address-cells = <1>;
   9                 #size-cells = <1>;
  10                 ranges;
  11                 rsvd@41200000 {
  12                         reg = <0x41200000 0x300000>;
  13                         no-map;
  14                 };
  15         };
  16
  17         alias {
  18                 serial0 = &uart2;
  19                 mdio-gpio0 = &mdio0;
  20         };
  21
  22         chosen {
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         soc {
  27                 mdio0: mdio@37000000 {
  28                         #address-cells = <1>;
  29                         #size-cells = <0>;
  30
  31                         compatible = "qcom,ipq8064-mdio", "syscon";
  32                         reg = <0x37000000 0x200000>;
  33                         resets = <&gcc GMAC_CORE1_RESET>;
  34                         reset-names = "stmmaceth";
  35                         clocks = <&gcc GMAC_CORE1_CLK>;
  36                         clock-names = "stmmaceth";
  37
  38                         pinctrl-0 = <&mdio0_pins>;
  39                         pinctrl-names = "default";
  40
  41                         phy0: ethernet-phy@0 {
  42                                 reg = <0>;
  43                                 qca,ar8327-initvals = <
  44                                         0x00004 0x7600000   /* PAD0_MODE */
  45                                         0x00008 0x1000000   /* PAD5_MODE */
  46                                         0x0000c 0x80        /* PAD6_MODE */
  47                                         0x000e4 0x6a545     /* MAC_POWER_SEL */
  48                                         0x000e0 0xc74164de  /* SGMII_CTRL */
  49                                         0x0007c 0x4e        /* PORT0_STATUS */
  50                                         0x00094 0x4e        /* PORT6_STATUS */
  51                                 >;
  52                         };
  53
  54                         phy4: ethernet-phy@4 {
  55                                 reg = <4>;
  56                         };
  57
  58                         phy6: ethernet-phy@6 {
  59                                 reg = <6>;
  60                         };
  61
  62                         phy7: ethernet-phy@7 {
  63                                 reg = <7>;
  64                         };
  65                 };
  66         };
  67 };
  68
  69 &qcom_pinmux {
  70         i2c4_pins: i2c4_pinmux {
  71                 pins = "gpio12", "gpio13";
  72                 function = "gsbi4";
  73                 bias-disable;
  74         };
  75
  76         spi_pins: spi_pins {
  77                 mux {
  78                         pins = "gpio18", "gpio19", "gpio21";
  79                         function = "gsbi5";
  80                         drive-strength = <10>;
  81                         bias-none;
  82                 };
  83         };
  84
  85         mdio0_pins: mdio0_pins {
  86                 mux {
  87                         pins = "gpio0", "gpio1";
  88                         function = "mdio";
  89                         drive-strength = <8>;
  90                         bias-disable;
  91                 };
  92         };
  93
  94         rgmii0_pins: rgmii0_pins {
  95                 mux {
  96                         pins = "gpio2", "gpio66";
  97                         drive-strength = <8>;
  98                         bias-disable;
  99                 };
 100         };
 101 };
 102
 103 &gsbi2 {
 104         qcom,mode = <GSBI_PROT_I2C_UART>;
 105         status = "okay";
 106         uart2: serial@12490000 {
 107                 status = "okay";
 108         };
 109 };
 110
 111 &gsbi5 {
 112         qcom,mode = <GSBI_PROT_SPI>;
 113         status = "okay";
 114
 115         spi4: spi@1a280000 {
 116                 status = "okay";
 117                 spi-max-frequency = <50000000>;
 118
 119                 pinctrl-0 = <&spi_pins>;
 120                 pinctrl-names = "default";
 121
 122                 cs-gpios = <&qcom_pinmux 20 0>;
 123
 124                 m25p80@0 {
 125                         compatible = "s25fl256s1";
 126                         #address-cells = <1>;
 127                         #size-cells = <1>;
 128                         spi-max-frequency = <50000000>;
 129                         reg = <0>;
 130                         m25p,fast-read;
 131
 132                         partition@0 {
 133                                 label = "lowlevel_init";
 134                                 reg = <0x0 0x1b0000>;
 135                         };
 136
 137                         partition@1 {
 138                                 label = "u-boot";
 139                                 reg = <0x1b0000 0x80000>;
 140                         };
 141
 142                         partition@2 {
 143                                 label = "u-boot-env";
 144                                 reg = <0x230000 0x40000>;
 145                         };
 146
 147                         partition@3 {
 148                                 label = "caldata";
 149                                 reg = <0x270000 0x40000>;
 150                         };
 151
 152                         partition@4 {
 153                                 label = "firmware";
 154                                 reg = <0x2b0000 0x1d50000>;
 155                         };
 156                 };
 157         };
 158 };
 159
 160 &sata_phy {
 161         status = "okay";
 162 };
 163
 164 &sata {
 165         status = "okay";
 166 };
 167
 168 &usb3_0 {
 169         status = "okay";
 170 };
 171
 172 &usb3_1 {
 173         status = "okay";
 174 };
 175
 176 &pcie0 {
 177         status = "okay";
 178 };
 179
 180 &pcie1 {
 181         status = "okay";
 182 };
 183
 184 &pcie2 {
 185         status = "okay";
 186 };
 187
 188 &gmac0 {
 189         status = "okay";
 190         phy-mode = "rgmii";
 191         qcom,id = <0>;
 192         phy-handle = <&phy4>;
 193
 194         pinctrl-0 = <&rgmii0_pins>;
 195         pinctrl-names = "default";
 196 };
 197
 198 &gmac1 {
 199         status = "okay";
 200         phy-mode = "sgmii";
 201         qcom,id = <1>;
 202
 203         fixed-link {
 204                 speed = <1000>;
 205                 full-duplex;
 206         };
 207 };
 208
 209 &gmac2 {
 210         status = "okay";
 211         phy-mode = "sgmii";
 212         qcom,id = <2>;
 213         phy-handle = <&phy6>;
 214 };
 215
 216 &gmac3 {
 217         status = "okay";
 218         phy-mode = "sgmii";
 219         qcom,id = <3>;
 220         phy-handle = <&phy7>;
 221 };