eb8de37708712beff48b27c9e4c634b6c36d133f
[openwrt/openwrt.git] / target / linux / ipq806x / files-5.4 / arch / arm / boot / dts / qcom-ipq8064-db149.dts
1 #include "qcom-ipq8064-v1.0.dtsi"
2
3 / {
4 model = "Qualcomm IPQ8064/DB149";
5 compatible = "qcom,ipq8064-db149", "qcom,ipq8064";
6
7 reserved-memory {
8 #address-cells = <1>;
9 #size-cells = <1>;
10 ranges;
11 rsvd@41200000 {
12 reg = <0x41200000 0x300000>;
13 no-map;
14 };
15 };
16
17 alias {
18 serial0 = &uart2;
19 mdio-gpio0 = &mdio0;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 soc {
27 pinmux@800000 {
28 i2c4_pins: i2c4_pinmux {
29 pins = "gpio12", "gpio13";
30 function = "gsbi4";
31 bias-disable;
32 };
33
34 spi_pins: spi_pins {
35 mux {
36 pins = "gpio18", "gpio19", "gpio21";
37 function = "gsbi5";
38 drive-strength = <10>;
39 bias-none;
40 };
41 };
42
43 mdio0_pins: mdio0_pins {
44 mux {
45 pins = "gpio0", "gpio1";
46 function = "mdio";
47 drive-strength = <8>;
48 bias-disable;
49 };
50 };
51
52 rgmii0_pins: rgmii0_pins {
53 mux {
54 pins = "gpio2", "gpio66";
55 drive-strength = <8>;
56 bias-disable;
57 };
58 };
59 };
60
61 gsbi2: gsbi@12480000 {
62 qcom,mode = <GSBI_PROT_I2C_UART>;
63 status = "okay";
64 uart2: serial@12490000 {
65 status = "okay";
66 };
67 };
68
69 gsbi5: gsbi@1a200000 {
70 qcom,mode = <GSBI_PROT_SPI>;
71 status = "okay";
72
73 spi4: spi@1a280000 {
74 status = "okay";
75 spi-max-frequency = <50000000>;
76
77 pinctrl-0 = <&spi_pins>;
78 pinctrl-names = "default";
79
80 cs-gpios = <&qcom_pinmux 20 0>;
81
82 m25p80@0 {
83 compatible = "s25fl256s1";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 spi-max-frequency = <50000000>;
87 reg = <0>;
88 m25p,fast-read;
89
90 partition@0 {
91 label = "lowlevel_init";
92 reg = <0x0 0x1b0000>;
93 };
94
95 partition@1 {
96 label = "u-boot";
97 reg = <0x1b0000 0x80000>;
98 };
99
100 partition@2 {
101 label = "u-boot-env";
102 reg = <0x230000 0x40000>;
103 };
104
105 partition@3 {
106 label = "caldata";
107 reg = <0x270000 0x40000>;
108 };
109
110 partition@4 {
111 label = "firmware";
112 reg = <0x2b0000 0x1d50000>;
113 };
114 };
115 };
116 };
117
118 sata-phy@1b400000 {
119 status = "okay";
120 };
121
122 sata@29000000 {
123 status = "okay";
124 };
125
126 usb3_0: usb3@110f8800 {
127 status = "okay";
128 };
129
130 usb3_1: usb3@100f8800 {
131 status = "okay";
132 };
133
134 pcie0: pci@1b500000 {
135 status = "okay";
136 };
137
138 pcie1: pci@1b700000 {
139 status = "okay";
140 };
141
142 pcie2: pci@1b900000 {
143 status = "okay";
144 };
145
146 mdio0: mdio@37000000 {
147 #address-cells = <1>;
148 #size-cells = <0>;
149
150 compatible = "qcom,ipq8064-mdio", "syscon";
151 reg = <0x37000000 0x200000>;
152 resets = <&gcc GMAC_CORE1_RESET>;
153 reset-names = "stmmaceth";
154 clocks = <&gcc GMAC_CORE1_CLK>;
155 clock-names = "stmmaceth";
156
157 pinctrl-0 = <&mdio0_pins>;
158 pinctrl-names = "default";
159
160 phy0: ethernet-phy@0 {
161 reg = <0>;
162 qca,ar8327-initvals = <
163 0x00004 0x7600000 /* PAD0_MODE */
164 0x00008 0x1000000 /* PAD5_MODE */
165 0x0000c 0x80 /* PAD6_MODE */
166 0x000e4 0x6a545 /* MAC_POWER_SEL */
167 0x000e0 0xc74164de /* SGMII_CTRL */
168 0x0007c 0x4e /* PORT0_STATUS */
169 0x00094 0x4e /* PORT6_STATUS */
170 >;
171 };
172
173 phy4: ethernet-phy@4 {
174 reg = <4>;
175 };
176
177 phy6: ethernet-phy@6 {
178 reg = <6>;
179 };
180
181 phy7: ethernet-phy@7 {
182 reg = <7>;
183 };
184 };
185
186 gmac0: ethernet@37000000 {
187 status = "okay";
188 phy-mode = "rgmii";
189 qcom,id = <0>;
190 phy-handle = <&phy4>;
191
192 pinctrl-0 = <&rgmii0_pins>;
193 pinctrl-names = "default";
194 };
195
196 gmac1: ethernet@37200000 {
197 status = "okay";
198 phy-mode = "sgmii";
199 qcom,id = <1>;
200
201 fixed-link {
202 speed = <1000>;
203 full-duplex;
204 };
205 };
206
207 gmac2: ethernet@37400000 {
208 status = "okay";
209 phy-mode = "sgmii";
210 qcom,id = <2>;
211 phy-handle = <&phy6>;
212 };
213
214 gmac3: ethernet@37600000 {
215 status = "okay";
216 phy-mode = "sgmii";
217 qcom,id = <3>;
218 phy-handle = <&phy7>;
219 };
220 };
221 };