1 // SPDX-License-Identifier: GPL-2.0-or-later
3 #include "qcom-ipq8065-smb208.dtsi"
4 #include <dt-bindings/input/input.h>
7 model = "Arris TR4400 v2";
8 compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
16 led-boot = &led_status_blue;
17 led-failsafe = &led_status_red;
18 led-running = &led_status_blue;
19 led-upgrade = &led_status_red;
23 bootargs = "rootfstype=squashfs noinitrd";
27 compatible = "gpio-keys";
28 pinctrl-0 = <&button_pins>;
29 pinctrl-names = "default";
33 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
34 linux,code = <KEY_RESTART>;
35 debounce-interval = <60>;
41 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_WPS_BUTTON>;
43 debounce-interval = <60>;
49 compatible = "gpio-leds";
50 pinctrl-0 = <&led_pins>;
51 pinctrl-names = "default";
53 led_status_red: status_red {
55 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
58 led_status_blue: status_blue {
59 label = "blue:status";
60 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
66 button_pins: button_pins {
68 pins = "gpio6", "gpio54";
77 pins = "gpio7", "gpio8";
84 rgmii2_pins: rgmii2-pins {
86 pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
94 drive-strength = <12>;
100 qcom,mode = <GSBI_PROT_SPI>;
106 pinctrl-0 = <&spi_pins>;
107 pinctrl-names = "default";
109 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
112 compatible = "everspin,mr25h256";
113 spi-max-frequency = <40000000>;
124 compatible = "qcom,nandcs";
126 nand-ecc-strength = <4>;
127 nand-bus-width = <8>;
128 nand-ecc-step-size = <512>;
130 qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
133 compatible = "fixed-partitions";
134 #address-cells = <1>;
139 reg = <0x0000000 0x0040000>;
144 reg = <0x0040000 0x0140000>;
149 reg = <0x0180000 0x0140000>;
154 reg = <0x02c0000 0x0280000>;
158 label = "0:DDRCONFIG";
159 reg = <0x0540000 0x0120000>;
164 reg = <0x0660000 0x0120000>;
169 reg = <0x0780000 0x0280000>;
174 reg = <0x0a00000 0x0280000>;
179 reg = <0x0c80000 0x0500000>;
183 label = "0:APPSBLENV";
184 reg = <0x1180000 0x0080000>;
188 reg = <0x1200000 0x0140000>;
191 compatible = "nvmem-cells";
192 #address-cells = <1>;
195 precal_ART_1000: precal@1000 {
196 reg = <0x1000 0x2f20>;
198 precal_ART_5000: precal@5000 {
199 reg = <0x5000 0x2f20>;
202 stock_partition@1340000 {
203 label = "stock_rootfs";
204 reg = <0x1340000 0x4000000>;
207 label = "0:BOOTCONFIG";
208 reg = <0x5340000 0x0060000>;
213 reg = <0x53a0000 0x0140000>;
218 reg = <0x54e0000 0x0280000>;
222 label = "0:DDRCONFIG_1";
223 reg = <0x5760000 0x0120000>;
228 reg = <0x5880000 0x0120000>;
233 reg = <0x59a0000 0x0280000>;
238 reg = <0x5c20000 0x0280000>;
242 label = "0:BOOTCONFIG1";
243 reg = <0x5ea0000 0x0060000>;
247 label = "0:APPSBL_1";
248 reg = <0x5f00000 0x0500000>;
251 stock_partition@6400000 {
252 label = "stock_rootfs_1";
253 reg = <0x6400000 0x4000000>;
255 stock_partition@a400000 {
256 label = "stock_fw_env";
257 reg = <0xa400000 0x0100000>;
259 stock_partition@a500000 {
260 label = "stock_config";
261 reg = <0xa500000 0x0800000>;
263 stock_partition@ad00000 {
265 reg = <0xad00000 0x0200000>;
267 stock_partition@af00000 {
268 label = "stock_scfgmgr";
269 reg = <0xaf00000 0x0100000>;
274 reg = <0x6400000 0x0100000>;
276 compatible = "nvmem-cells";
277 #address-cells = <1>;
280 macaddr_fw_env_0: macaddr@0 {
283 macaddr_fw_env_6: macaddr@6 {
286 macaddr_fw_env_c: macaddr@c {
289 macaddr_fw_env_12: macaddr@12 {
292 macaddr_fw_env_18: macaddr@18 {
298 reg = <0x6500000 0x9b00000>;
302 reg = <0x1340000 0x4000000>;
311 pinctrl-0 = <&mdio0_pins>;
312 pinctrl-names = "default";
316 qca,ar8327-initvals = <
317 0x00004 0x7600000 /* PAD0_MODE */
318 0x00008 0x1000000 /* PAD5_MODE */
319 0x0000c 0x80 /* PAD6_MODE */
320 0x000e4 0xaa545 /* MAC_POWER_SEL */
321 0x000e0 0xc74164de /* SGMII_CTRL */
322 0x0007c 0x4e /* PORT0_STATUS */
323 0x00094 0x4e /* PORT6_STATUS */
327 phy7: ethernet-phy@7 {
337 nvmem-cells = <&macaddr_fw_env_18>;
338 nvmem-cell-names = "mac-address";
340 pinctrl-0 = <&rgmii2_pins>;
341 pinctrl-names = "default";
354 nvmem-cells = <&macaddr_fw_env_0>;
355 nvmem-cell-names = "mac-address";
367 phy-handle = <&phy7>;
369 nvmem-cells = <&macaddr_fw_env_6>;
370 nvmem-cell-names = "mac-address";
391 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
392 pinctrl-0 = <&pcie0_pins>;
393 pinctrl-names = "default";
396 reg = <0x00000000 0 0 0 0>;
397 #address-cells = <3>;
402 compatible = "pci168c,0046";
403 reg = <0x00010000 0 0 0 0>;
405 nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
406 nvmem-cell-names = "pre-calibration", "mac-address";
413 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
414 pinctrl-0 = <&pcie1_pins>;
415 pinctrl-names = "default";
416 max-link-speed = <1>;
419 reg = <0x00000000 0 0 0 0>;
420 #address-cells = <3>;
425 compatible = "pci168c,0040";
426 reg = <0x00010000 0 0 0 0>;
428 nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
429 nvmem-cell-names = "pre-calibration", "mac-address";