kernel: update 3.14 to 3.14.18
[openwrt/openwrt.git] / target / linux / ipq806x / patches / 0002-ARM-msm-Remove-pen_release-usage.patch
1 From 18d53dfa103e63154fb8e548d55016d6ad210d28 Mon Sep 17 00:00:00 2001
2 From: Rohit Vaswani <rvaswani@codeaurora.org>
3 Date: Fri, 21 Jun 2013 12:17:37 -0700
4 Subject: [PATCH 002/182] ARM: msm: Remove pen_release usage
5
6 pen_release is no longer required as the synchronization
7 is now managed by generic arm code.
8 This is done as suggested in https://lkml.org/lkml/2013/6/4/184
9
10 Cc: Russell King <linux@arm.linux.org.uk>
11 Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
12 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
13 Signed-off-by: Kumar Gala <galak@codeaurora.org>
14 ---
15 arch/arm/mach-msm/Makefile | 2 +-
16 arch/arm/mach-msm/headsmp.S | 39 ---------------------------------------
17 arch/arm/mach-msm/hotplug.c | 31 ++++---------------------------
18 arch/arm/mach-msm/platsmp.c | 37 +++----------------------------------
19 4 files changed, 8 insertions(+), 101 deletions(-)
20 delete mode 100644 arch/arm/mach-msm/headsmp.S
21
22 --- a/arch/arm/mach-msm/Makefile
23 +++ b/arch/arm/mach-msm/Makefile
24 @@ -19,7 +19,7 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot.
25 CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1)
26
27 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
28 -obj-$(CONFIG_SMP) += headsmp.o platsmp.o
29 +obj-$(CONFIG_SMP) += platsmp.o
30
31 obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o
32 obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o
33 --- a/arch/arm/mach-msm/headsmp.S
34 +++ /dev/null
35 @@ -1,39 +0,0 @@
36 -/*
37 - * linux/arch/arm/mach-realview/headsmp.S
38 - *
39 - * Copyright (c) 2003 ARM Limited
40 - * All Rights Reserved
41 - *
42 - * This program is free software; you can redistribute it and/or modify
43 - * it under the terms of the GNU General Public License version 2 as
44 - * published by the Free Software Foundation.
45 - */
46 -#include <linux/linkage.h>
47 -#include <linux/init.h>
48 -
49 -/*
50 - * MSM specific entry point for secondary CPUs. This provides
51 - * a "holding pen" into which all secondary cores are held until we're
52 - * ready for them to initialise.
53 - */
54 -ENTRY(msm_secondary_startup)
55 - mrc p15, 0, r0, c0, c0, 5
56 - and r0, r0, #15
57 - adr r4, 1f
58 - ldmia r4, {r5, r6}
59 - sub r4, r4, r5
60 - add r6, r6, r4
61 -pen: ldr r7, [r6]
62 - cmp r7, r0
63 - bne pen
64 -
65 - /*
66 - * we've been released from the holding pen: secondary_stack
67 - * should now contain the SVC stack for this core
68 - */
69 - b secondary_startup
70 -ENDPROC(msm_secondary_startup)
71 -
72 - .align
73 -1: .long .
74 - .long pen_release
75 --- a/arch/arm/mach-msm/hotplug.c
76 +++ b/arch/arm/mach-msm/hotplug.c
77 @@ -24,33 +24,10 @@ static inline void cpu_leave_lowpower(vo
78
79 static inline void platform_do_lowpower(unsigned int cpu)
80 {
81 - /* Just enter wfi for now. TODO: Properly shut off the cpu. */
82 - for (;;) {
83 - /*
84 - * here's the WFI
85 - */
86 - asm("wfi"
87 - :
88 - :
89 - : "memory", "cc");
90 -
91 - if (pen_release == cpu_logical_map(cpu)) {
92 - /*
93 - * OK, proper wakeup, we're done
94 - */
95 - break;
96 - }
97 -
98 - /*
99 - * getting here, means that we have come out of WFI without
100 - * having been woken up - this shouldn't happen
101 - *
102 - * The trouble is, letting people know about this is not really
103 - * possible, since we are currently running incoherently, and
104 - * therefore cannot safely call printk() or anything else
105 - */
106 - pr_debug("CPU%u: spurious wakeup call\n", cpu);
107 - }
108 + asm("wfi"
109 + :
110 + :
111 + : "memory", "cc");
112 }
113
114 /*
115 --- a/arch/arm/mach-msm/platsmp.c
116 +++ b/arch/arm/mach-msm/platsmp.c
117 @@ -12,13 +12,10 @@
118 #include <linux/errno.h>
119 #include <linux/delay.h>
120 #include <linux/device.h>
121 -#include <linux/jiffies.h>
122 #include <linux/smp.h>
123 #include <linux/io.h>
124
125 -#include <asm/cacheflush.h>
126 #include <asm/cputype.h>
127 -#include <asm/mach-types.h>
128 #include <asm/smp_plat.h>
129
130 #include "scm-boot.h"
131 @@ -28,7 +25,7 @@
132 #define SCSS_CPU1CORE_RESET 0xD80
133 #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64
134
135 -extern void msm_secondary_startup(void);
136 +extern void secondary_startup(void);
137
138 static DEFINE_SPINLOCK(boot_lock);
139
140 @@ -41,13 +38,6 @@ static inline int get_core_count(void)
141 static void msm_secondary_init(unsigned int cpu)
142 {
143 /*
144 - * let the primary processor know we're out of the
145 - * pen, then head off into the C entry point
146 - */
147 - pen_release = -1;
148 - smp_wmb();
149 -
150 - /*
151 * Synchronise with the boot thread.
152 */
153 spin_lock(&boot_lock);
154 @@ -57,7 +47,7 @@ static void msm_secondary_init(unsigned
155 static void prepare_cold_cpu(unsigned int cpu)
156 {
157 int ret;
158 - ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
159 + ret = scm_set_boot_addr(virt_to_phys(secondary_startup),
160 SCM_FLAG_COLDBOOT_CPU1);
161 if (ret == 0) {
162 void __iomem *sc1_base_ptr;
163 @@ -75,7 +65,6 @@ static void prepare_cold_cpu(unsigned in
164
165 static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
166 {
167 - unsigned long timeout;
168 static int cold_boot_done;
169
170 /* Only need to bring cpu out of reset this way once */
171 @@ -91,39 +80,19 @@ static int msm_boot_secondary(unsigned i
172 spin_lock(&boot_lock);
173
174 /*
175 - * The secondary processor is waiting to be released from
176 - * the holding pen - release it, then wait for it to flag
177 - * that it has been released by resetting pen_release.
178 - *
179 - * Note that "pen_release" is the hardware CPU ID, whereas
180 - * "cpu" is Linux's internal ID.
181 - */
182 - pen_release = cpu_logical_map(cpu);
183 - sync_cache_w(&pen_release);
184 -
185 - /*
186 * Send the secondary CPU a soft interrupt, thereby causing
187 * the boot monitor to read the system wide flags register,
188 * and branch to the address found there.
189 */
190 arch_send_wakeup_ipi_mask(cpumask_of(cpu));
191
192 - timeout = jiffies + (1 * HZ);
193 - while (time_before(jiffies, timeout)) {
194 - smp_rmb();
195 - if (pen_release == -1)
196 - break;
197 -
198 - udelay(10);
199 - }
200 -
201 /*
202 * now the secondary core is starting up let it run its
203 * calibrations, then wait for it to finish
204 */
205 spin_unlock(&boot_lock);
206
207 - return pen_release != -1 ? -ENOSYS : 0;
208 + return 0;
209 }
210
211 /*