target/linux/ipq806x/patches/0006-clocksource-qcom-split-building-of-legacy-vs-multipl.patch

   1 From 085d4b834dfced8580aab74707e30699b63e7c36 Mon Sep 17 00:00:00 2001
   2 From: Kumar Gala <galak@codeaurora.org>
   3 Date: Wed, 29 Jan 2014 17:01:37 -0600
   4 Subject: [PATCH 006/182] clocksource: qcom: split building of legacy vs
   5  multiplatform support
   6
   7 The majority of the clocksource code for the Qualcomm platform is shared
   8 between newer (multiplatform) and older platforms.  However there is a bit
   9 of code that isn't, so only build it for the appropriate config.
  10
  11 Acked-by: Olof Johansson <olof@lixom.net>
  12 Signed-off-by: Kumar Gala <galak@codeaurora.org>
  13 ---
  14  drivers/clocksource/qcom-timer.c |   23 ++++++++++++-----------
  15  1 file changed, 12 insertions(+), 11 deletions(-)
  16
  17 diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c
  18 index dca829e..e807acf 100644
  19 --- a/drivers/clocksource/qcom-timer.c
  20 +++ b/drivers/clocksource/qcom-timer.c
  21 @@ -106,15 +106,6 @@ static notrace cycle_t msm_read_timer_count(struct clocksource *cs)
  22         return readl_relaxed(source_base + TIMER_COUNT_VAL);
  23  }
  24
  25 -static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
  26 -{
  27 -       /*
  28 -        * Shift timer count down by a constant due to unreliable lower bits
  29 -        * on some targets.
  30 -        */
  31 -       return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
  32 -}
  33 -
  34  static struct clocksource msm_clocksource = {
  35         .name   = "dg_timer",
  36         .rating = 300,
  37 @@ -228,7 +219,7 @@ err:
  38         sched_clock_register(msm_sched_clock_read, sched_bits, dgt_hz);
  39  }
  40
  41 -#ifdef CONFIG_OF
  42 +#ifdef CONFIG_ARCH_QCOM
  43  static void __init msm_dt_timer_init(struct device_node *np)
  44  {
  45         u32 freq;
  46 @@ -281,7 +272,7 @@ static void __init msm_dt_timer_init(struct device_node *np)
  47  }
  48  CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init);
  49  CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init);
  50 -#endif
  51 +#else
  52
  53  static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
  54                                 u32 sts)
  55 @@ -301,6 +292,15 @@ static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source,
  56         return 0;
  57  }
  58
  59 +static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs)
  60 +{
  61 +       /*
  62 +        * Shift timer count down by a constant due to unreliable lower bits
  63 +        * on some targets.
  64 +        */
  65 +       return msm_read_timer_count(cs) >> MSM_DGT_SHIFT;
  66 +}
  67 +
  68  void __init msm7x01_timer_init(void)
  69  {
  70         struct clocksource *cs = &msm_clocksource;
  71 @@ -327,3 +327,4 @@ void __init qsd8x50_timer_init(void)
  72                 return;
  73         msm_timer_init(19200000 / 4, 32, 7, false);
  74  }
  75 +#endif
  76 --
  77 1.7.10.4
  78