target/linux/ipq806x/patches/0061-i2c-qup-Add-device-tree-bindings-information.patch

   1 From 81480a89c72d811376e9e040729721705b2a984d Mon Sep 17 00:00:00 2001
   2 From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
   3 Date: Thu, 13 Mar 2014 19:07:42 -0700
   4 Subject: [PATCH 061/182] i2c: qup: Add device tree bindings information
   5
   6 The Qualcomm Universal Peripherial (QUP) wraps I2C mini-core and
   7 provide input and output FIFO's for it. I2C controller can operate
   8 as master with supported bus speeds of 100Kbps and 400Kbps.
   9
  10 Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
  11 [bjorn: reformulated part of binding description
  12         added version to compatible
  13         cleaned up example]
  14 Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
  15 Acked-by: Rob Herring <robh@kernel.org>
  16 [wsa: removed the dummy child node which was a confusing example]
  17 Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
  18 ---
  19  .../devicetree/bindings/i2c/qcom,i2c-qup.txt       |   40 ++++++++++++++++++++
  20  1 file changed, 40 insertions(+)
  21  create mode 100644 Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt
  22
  23 diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt
  24 new file mode 100644
  25 index 0000000..dc71754
  26 --- /dev/null
  27 +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-qup.txt
  28 @@ -0,0 +1,40 @@
  29 +Qualcomm Universal Peripheral (QUP) I2C controller
  30 +
  31 +Required properties:
  32 + - compatible: Should be:
  33 +   * "qcom,i2c-qup-v1.1.1" for 8660, 8960 and 8064.
  34 +   * "qcom,i2c-qup-v2.1.1" for 8974 v1.
  35 +   * "qcom,i2c-qup-v2.2.1" for 8974 v2 and later.
  36 + - reg: Should contain QUP register address and length.
  37 + - interrupts: Should contain I2C interrupt.
  38 +
  39 + - clocks: A list of phandles + clock-specifiers, one for each entry in
  40 +   clock-names.
  41 + - clock-names: Should contain:
  42 +   * "core" for the core clock
  43 +   * "iface" for the AHB clock
  44 +
  45 + - #address-cells: Should be <1> Address cells for i2c device address
  46 + - #size-cells: Should be <0> as i2c addresses have no size component
  47 +
  48 +Optional properties:
  49 + - clock-frequency: Should specify the desired i2c bus clock frequency in Hz,
  50 +                    defaults to 100kHz if omitted.
  51 +
  52 +Child nodes should conform to i2c bus binding.
  53 +
  54 +Example:
  55 +
  56 + i2c@f9924000 {
  57 +       compatible = "qcom,i2c-qup-v2.2.1";
  58 +       reg = <0xf9924000 0x1000>;
  59 +       interrupts = <0 96 0>;
  60 +
  61 +       clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>;
  62 +       clock-names = "core", "iface";
  63 +
  64 +       clock-frequency = <355000>;
  65 +
  66 +       #address-cells = <1>;
  67 +       #size-cells = <0>;
  68 + };
  69 --
  70 1.7.10.4
  71