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4 Subject: [v3,10/13] clk: qcom: Add KPSS ACC/GCC driver
5 From: Stephen Boyd <sboyd@codeaurora.org>
6 X-Patchwork-Id: 6063201
7 Message-Id: <1426920332-9340-11-git-send-email-sboyd@codeaurora.org>
8 To: Mike Turquette <mturquette@linaro.org>, Stephen Boyd <sboyd@codeaurora.org>
9 Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
10 linux-pm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
11 Viresh Kumar <viresh.kumar@linaro.org>, <devicetree@vger.kernel.org>
12 Date: Fri, 20 Mar 2015 23:45:29 -0700
14 The ACC and GCC regions present in KPSSv1 contain registers to
15 control clocks and power to each Krait CPU and L2. For CPUfreq
16 purposes probe these devices and expose a mux clock that chooses
19 Cc: <devicetree@vger.kernel.org>
20 Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
23 .../devicetree/bindings/arm/msm/qcom,kpss-acc.txt | 7 ++
24 .../devicetree/bindings/arm/msm/qcom,kpss-gcc.txt | 28 +++++++
25 drivers/clk/qcom/Kconfig | 8 ++
26 drivers/clk/qcom/Makefile | 1 +
27 drivers/clk/qcom/kpss-xcc.c | 95 ++++++++++++++++++++++
28 5 files changed, 139 insertions(+)
29 create mode 100644 Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
30 create mode 100644 drivers/clk/qcom/kpss-xcc.c
32 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
33 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
35 the register region. An optional second element specifies
36 the base address and size of the alias register region.
38 +- clock-output-names:
40 + Value type: <string>
41 + Definition: Name of the output clock. Typically acpuX_aux where X is a
42 + CPU number starting at 0.
46 clock-controller@2088000 {
47 compatible = "qcom,kpss-acc-v2";
48 reg = <0x02088000 0x1000>,
50 + clock-output-names = "acpu0_aux";
53 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
55 +Krait Processor Sub-system (KPSS) Global Clock Controller (GCC)
61 + Value type: <string>
62 + Definition: should be one of:
67 + Value type: <prop-encoded-array>
68 + Definition: base address and size of the register region
70 +- clock-output-names:
72 + Value type: <string>
73 + Definition: Name of the output clock. Typically acpu_l2_aux indicating
74 + an L2 cache auxiliary clock.
78 + l2cc: clock-controller@2011000 {
79 + compatible = "qcom,kpss-gcc";
80 + reg = <0x2011000 0x1000>;
81 + clock-output-names = "acpu_l2_aux";
83 --- a/drivers/clk/qcom/Kconfig
84 +++ b/drivers/clk/qcom/Kconfig
86 Say Y if you want to support CPU frequency scaling on devices
87 such as MSM8974, APQ8084, etc.
90 + tristate "KPSS Clock Controller"
91 + depends on COMMON_CLK_QCOM
93 + Support for the Krait ACC and GCC clock controllers. Say Y
94 + if you want to support CPU frequency scaling on devices such
95 + as MSM8960, APQ8064, etc.
99 select KRAIT_L2_ACCESSORS
100 --- a/drivers/clk/qcom/Makefile
101 +++ b/drivers/clk/qcom/Makefile
103 clk-qcom-y += clk-regmap-divider.o
104 clk-qcom-y += clk-regmap-mux.o
105 clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o
106 +obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
107 clk-qcom-y += clk-hfpll.o
108 clk-qcom-y += reset.o
109 clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
111 +++ b/drivers/clk/qcom/kpss-xcc.c
113 +/* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
115 + * This program is free software; you can redistribute it and/or modify
116 + * it under the terms of the GNU General Public License version 2 and
117 + * only version 2 as published by the Free Software Foundation.
119 + * This program is distributed in the hope that it will be useful,
120 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
121 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
122 + * GNU General Public License for more details.
125 +#include <linux/kernel.h>
126 +#include <linux/init.h>
127 +#include <linux/module.h>
128 +#include <linux/platform_device.h>
129 +#include <linux/err.h>
130 +#include <linux/io.h>
131 +#include <linux/of.h>
132 +#include <linux/of_device.h>
133 +#include <linux/clk.h>
134 +#include <linux/clk-provider.h>
136 +static const char *aux_parents[] = {
141 +static unsigned int aux_parent_map[] = {
146 +static const struct of_device_id kpss_xcc_match_table[] = {
147 + { .compatible = "qcom,kpss-acc-v1", .data = (void *)1UL },
148 + { .compatible = "qcom,kpss-gcc" },
151 +MODULE_DEVICE_TABLE(of, kpss_xcc_match_table);
153 +static int kpss_xcc_driver_probe(struct platform_device *pdev)
155 + const struct of_device_id *id;
157 + struct resource *res;
158 + void __iomem *base;
161 + id = of_match_device(kpss_xcc_match_table, &pdev->dev);
165 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
166 + base = devm_ioremap_resource(&pdev->dev, res);
168 + return PTR_ERR(base);
171 + if (of_property_read_string_index(pdev->dev.of_node,
172 + "clock-output-names", 0, &name))
176 + name = "acpu_l2_aux";
180 + clk = clk_register_mux_table(&pdev->dev, name, aux_parents,
181 + ARRAY_SIZE(aux_parents), 0, base, 0, 0x3,
182 + 0, aux_parent_map, NULL);
184 + platform_set_drvdata(pdev, clk);
186 + return PTR_ERR_OR_ZERO(clk);
189 +static int kpss_xcc_driver_remove(struct platform_device *pdev)
191 + clk_unregister_mux(platform_get_drvdata(pdev));
195 +static struct platform_driver kpss_xcc_driver = {
196 + .probe = kpss_xcc_driver_probe,
197 + .remove = kpss_xcc_driver_remove,
199 + .name = "kpss-xcc",
200 + .of_match_table = kpss_xcc_match_table,
203 +module_platform_driver(kpss_xcc_driver);
205 +MODULE_DESCRIPTION("Krait Processor Sub System (KPSS) Clock Driver");
206 +MODULE_LICENSE("GPL v2");
207 +MODULE_ALIAS("platform:kpss-xcc");