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4 Subject: [v3,3/5] dt/bindings: qcom_nandc: Add DT bindings
5 From: Archit Taneja <architt@codeaurora.org>
6 X-Patchwork-Id: 6927141
7 Message-Id: <1438578498-32254-4-git-send-email-architt@codeaurora.org>
8 To: linux-mtd@lists.infradead.org, dehrenberg@google.com,
9 cernekee@gmail.com, computersforpeace@gmail.com
10 Cc: linux-arm-msm@vger.kernel.org, agross@codeaurora.org,
11 sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
12 Archit Taneja <architt@codeaurora.org>, devicetree@vger.kernel.org
13 Date: Mon, 3 Aug 2015 10:38:16 +0530
15 Add DT bindings document for the Qualcomm NAND controller driver.
17 Cc: devicetree@vger.kernel.org
20 - Don't use '0x' when specifying nand controller address space
21 - Add optional property for on-flash bbt usage
23 Acked-by: Andy Gross <agross@codeaurora.org>
24 Signed-off-by: Archit Taneja <architt@codeaurora.org>
27 .../devicetree/bindings/mtd/qcom_nandc.txt | 49 ++++++++++++++++++++++
28 1 file changed, 49 insertions(+)
29 create mode 100644 Documentation/devicetree/bindings/mtd/qcom_nandc.txt
32 +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
34 +* Qualcomm NAND controller
37 +- compatible: should be "qcom,ebi2-nand" for IPQ806x
38 +- reg: MMIO address range
39 +- clocks: must contain core clock and always on clock
40 +- clock-names: must contain "core" for the core clock and "aon" for the
42 +- dmas: DMA specifier, consisting of a phandle to the ADM DMA
43 + controller node and the channel number to be used for
44 + NAND. Refer to dma.txt and qcom_adm.txt for more details
45 +- dma-names: must be "rxtx"
46 +- qcom,cmd-crci: must contain the ADM command type CRCI block instance
47 + number specified for the NAND controller on the given
49 +- qcom,data-crci: must contain the ADM data type CRCI block instance
50 + number specified for the NAND controller on the given
54 +- nand-bus-width: bus width. Must be 8 or 16. If not present, 8 is chosen
57 +- nand-ecc-strength: number of bits to correct per ECC step. Must be 4 or 8
58 + bits. If not present, 4 is chosen as default
59 +- nand-on-flash-bbt: Create/use on-flash bad block table
61 +The device tree may optionally contain sub-nodes describing partitions of the
62 +address space. See partition.txt for more detail.
67 + compatible = "qcom,ebi2-nandc";
68 + reg = <0x1ac00000 0x800>;
70 + clocks = <&gcc EBI2_CLK>,
71 + <&gcc EBI2_AON_CLK>;
72 + clock-names = "core", "aon";
74 + dmas = <&adm_dma 3>;
76 + qcom,cmd-crci = <15>;
77 + qcom,data-crci = <3>;