1 From ac369071920d427dd484cf74cddba2774bba45f5 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Thu, 9 Jul 2020 22:35:54 +0200
4 Subject: [PATCH 09/10] dt-bindings: thermal: tsens: Document ipq8064 bindings
6 Document the use of bindings used for msm8960 tsens based devices.
7 msm8960 use the same gcc regs and is set as a child of the qcom gcc.
9 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
10 Reviewed-by: Rob Herring <robh@kernel.org>
12 .../bindings/thermal/qcom-tsens.yaml | 56 ++++++++++++++++---
13 1 file changed, 48 insertions(+), 8 deletions(-)
15 diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
16 index 95462e071ab4..1785b1c75a3c 100644
17 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
18 +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
19 @@ -19,6 +19,11 @@ description: |
23 + - description: msm9860 TSENS based
26 + - qcom,ipq8064-tsens
28 - description: v0.1 of TSENS
31 @@ -73,7 +78,9 @@ properties:
42 @@ -88,12 +95,20 @@ properties:
43 Number of cells required to uniquely identify the thermal sensors. Since
44 we have multiple sensors this is set to 1
50 + - "#thermal-sensor-cells"
59 + - qcom,ipq8064-tsens
63 @@ -114,17 +129,42 @@ allOf:
73 - - "#thermal-sensor-cells"
87 additionalProperties: false
91 + #include <dt-bindings/interrupt-controller/arm-gic.h>
92 + // Example msm9860 based SoC (ipq8064):
93 + gcc: clock-controller {
97 + tsens: thermal-sensor {
98 + compatible = "qcom,ipq8064-tsens";
100 + nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
101 + nvmem-cell-names = "calib", "calib_backup";
102 + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
103 + interrupt-names = "uplow";
105 + #qcom,sensors = <11>;
106 + #thermal-sensor-cells = <1>;
111 #include <dt-bindings/interrupt-controller/arm-gic.h>
112 // Example 1 (legacy: for pre v1 IP):