target/linux/ixp4xx/patches-5.10/150-ARM-dts-add-gateway7001.patch

   1 diff -ruN a/arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts b/arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts
   2 --- a/arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts   1970-01-01 01:00:00.000000000 +0100
   3 +++ b/arch/arm/boot/dts/intel-ixp42x-gateway-7001.dts   2021-05-19 15:37:54.621241935 +0200
   4 @@ -0,0 +1,152 @@
   5 +// SPDX-License-Identifier: ISC
   6 +/*
   7 + * Device Tree file for Gateway 7001 AP
   8 + * Copyright (c) 2021 Zoltan HERPAI <wigyori@uid0.hu>
   9 + */
  10 +
  11 +/dts-v1/;
  12 +
  13 +#include "intel-ixp42x.dtsi"
  14 +#include <dt-bindings/input/input.h>
  15 +
  16 +/ {
  17 +       model = "Gateway 7001 AP";
  18 +       compatible = "gateway,7001", "intel,ixp42x";
  19 +       #address-cells = <1>;
  20 +       #size-cells = <1>;
  21 +
  22 +       memory@0 {
  23 +               /* 32 MB SDRAM */
  24 +               device_type = "memory";
  25 +               reg = <0x00000000 0x2000000>;
  26 +       };
  27 +
  28 +       chosen {
  29 +               bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
  30 +               stdout-path = "uart1:115200n8";
  31 +       };
  32 +
  33 +       aliases {
  34 +               serial0 = &uart1;
  35 +       };
  36 +
  37 +       gpio_keys {
  38 +               compatible = "gpio-keys";
  39 +
  40 +               button-power {
  41 +                       wakeup-source;
  42 +                       linux,code = <KEY_POWER>;
  43 +                       label = "power";
  44 +                       gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
  45 +               };
  46 +               button-reset {
  47 +                       wakeup-source;
  48 +                       linux,code = <KEY_ESC>;
  49 +                       label = "reset";
  50 +                       gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  51 +               };
  52 +       };
  53 +
  54 +       i2c {
  55 +               compatible = "i2c-gpio";
  56 +               sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  57 +               scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
  58 +               #address-cells = <1>;
  59 +               #size-cells = <0>;
  60 +
  61 +               rtc@6f {
  62 +                       compatible = "xicor,x1205";
  63 +                       reg = <0x6f>;
  64 +               };
  65 +       };
  66 +
  67 +       gpio-poweroff {
  68 +               compatible = "gpio-poweroff";
  69 +               gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
  70 +               timeout-ms = <5000>;
  71 +       };
  72 +
  73 +       /* The first 16MB region on the expansion bus */
  74 +       flash@50000000 {
  75 +               compatible = "intel,ixp4xx-flash", "cfi-flash";
  76 +               bank-width = <2>;
  77 +               /*
  78 +                * 8 MB of Flash in 0x20000 byte blocks
  79 +                * mapped in at 0x50000000
  80 +                */
  81 +               reg = <0x50000000 0x800000>;
  82 +
  83 +               partitions {
  84 +                       compatible = "redboot-fis";
  85 +                       /* Eraseblock at 0x7e0000 */
  86 +                       fis-index-block = <0x3f>;
  87 +               };
  88 +       };
  89 +
  90 +       soc {
  91 +               pci@c0000000 {
  92 +                       status = "ok";
  93 +
  94 +                       /*
  95 +                        * Taken from NSLU2 PCI boardfile, INT A, B, C swizzled D constant
  96 +                        * We have slots (IDSEL) 1, 2 and 3.
  97 +                        */
  98 +                       interrupt-map =
  99 +                       /* IDSEL 1 */
 100 +                       <0x0800 0 0 1 &gpio0 11 3>, /* INT A on slot 1 is irq 11 */
 101 +                       <0x0800 0 0 2 &gpio0 10 3>, /* INT B on slot 1 is irq 10 */
 102 +                       <0x0800 0 0 3 &gpio0 9  3>, /* INT C on slot 1 is irq 9 */
 103 +                       <0x0800 0 0 4 &gpio0 8  3>, /* INT D on slot 1 is irq 8 */
 104 +                       /* IDSEL 2 */
 105 +                       <0x1000 0 0 1 &gpio0 10 3>, /* INT A on slot 2 is irq 10 */
 106 +                       <0x1000 0 0 2 &gpio0 9  3>, /* INT B on slot 2 is irq 9 */
 107 +                       <0x1000 0 0 3 &gpio0 11 3>, /* INT C on slot 2 is irq 11 */
 108 +                       <0x1000 0 0 4 &gpio0 8  3>, /* INT D on slot 2 is irq 8 */
 109 +                       /* IDSEL 3 */
 110 +                       <0x1800 0 0 1 &gpio0 9  3>, /* INT A on slot 3 is irq 9 */
 111 +                       <0x1800 0 0 2 &gpio0 11 3>, /* INT B on slot 3 is irq 11 */
 112 +                       <0x1800 0 0 3 &gpio0 10 3>, /* INT C on slot 3 is irq 10 */
 113 +                       <0x1800 0 0 4 &gpio0 8  3>; /* INT D on slot 3 is irq 8 */
 114 +               };
 115 +       };
 116 +
 117 +       soc {
 118 +               ethernet@c8009000 {
 119 +                       status = "ok";
 120 +                       queue-rx = <&qmgr 3>;
 121 +                       queue-txready = <&qmgr 20>;
 122 +                       phy-mode = "rgmii";
 123 +                       phy-handle = <&phy1>;
 124 +
 125 +                       mdio {
 126 +                               #address-cells = <1>;
 127 +                               #size-cells = <0>;
 128 +
 129 +                               phy1: ethernet-phy@1 {
 130 +                                       reg = <1>;
 131 +                               };
 132 +                       };
 133 +               };
 134 +
 135 +               ethernet@c800a000 {
 136 +                       status = "ok";
 137 +                       queue-rx = <&qmgr 4>;
 138 +                       queue-txready = <&qmgr 21>;
 139 +                       phy-mode = "rgmii";
 140 +                       phy-handle = <&phy2>;
 141 +
 142 +                       mdio {
 143 +                               #address-cells = <1>;
 144 +                               #size-cells = <0>;
 145 +
 146 +                               phy2: ethernet-phy@2 {
 147 +                                       reg = <2>;
 148 +                               };
 149 +                       };
 150 +               };
 151 +       };
 152 +};
 153 +
 154 +&uart0 {
 155 +       status = "disabled";
 156 +};
 157 diff -ruN a/arch/arm/boot/dts/intel-ixp4xx.dtsi b/arch/arm/boot/dts/intel-ixp4xx.dtsi
 158 diff -ruN a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
 159 --- a/arch/arm/boot/dts/Makefile        2021-05-17 13:36:56.001312909 +0200
 160 +++ b/arch/arm/boot/dts/Makefile        2021-05-17 13:36:14.141559230 +0200
 161 @@ -244,6 +244,7 @@
 162         integratorap-im-pd1.dtb \
 163         integratorcp.dtb
 164  dtb-$(CONFIG_ARCH_IXP4XX) += \
 165 +       intel-ixp42x-gateway-7001.dtb \
 166         intel-ixp42x-linksys-nslu2.dtb \
 167         intel-ixp43x-gateworks-gw2358.dtb
 168  dtb-$(CONFIG_ARCH_KEYSTONE) += \