lantiq: dts: assign the NAND pins to the nand-controller node
[openwrt/openwrt.git] / target / linux / lantiq / files / arch / mips / boot / dts / danube.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "lantiq,xway", "lantiq,danube";
7
8 aliases {
9 serial0 = &asc1;
10 };
11
12 chosen {
13 stdout-path = "serial0:115200n8";
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 cpu@0 {
21 compatible = "mips,mips24Kc";
22 reg = <0>;
23 };
24 };
25
26 reboot {
27 compatible = "syscon-reboot";
28
29 regmap = <&rcu0>;
30 offset = <0x10>;
31 mask = <0x40000000>;
32 };
33
34 biu@1f800000 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "lantiq,biu", "simple-bus";
38 reg = <0x1f800000 0x800000>;
39 ranges = <0x0 0x1f800000 0x7fffff>;
40
41 icu0: icu@80200 {
42 #interrupt-cells = <1>;
43 interrupt-controller;
44 compatible = "lantiq,icu";
45 reg = <0x80200 0x28
46 0x80228 0x28
47 0x80250 0x28
48 0x80278 0x28
49 0x802a0 0x28>;
50 };
51
52 watchdog@803f0 {
53 compatible = "lantiq,wdt";
54 reg = <0x803f0 0x10>;
55 };
56 };
57
58 sram@1f000000 {
59 #address-cells = <1>;
60 #size-cells = <1>;
61 compatible = "lantiq,sram", "simple-bus";
62 reg = <0x1f000000 0x800000>;
63 ranges = <0x0 0x1f000000 0x7fffff>;
64
65 eiu0: eiu@101000 {
66 #interrupt-cells = <1>;
67 interrupt-controller;
68 compatible = "lantiq,eiu-xway";
69 reg = <0x101000 0x1000>;
70 interrupt-parent = <&icu0>;
71 lantiq,eiu-irqs = <166 135 66>;
72 };
73
74 pmu0: pmu@102000 {
75 compatible = "lantiq,pmu-xway";
76 reg = <0x102000 0x1000>;
77 };
78
79 cgu0: cgu@103000 {
80 compatible = "lantiq,cgu-xway";
81 reg = <0x103000 0x1000>;
82 #clock-cells = <1>;
83 };
84
85 vmmc: vmmc@107000 {
86 status = "disabled";
87 compatible = "lantiq,vmmc-xway";
88 reg = <0x107000 0x400>;
89 interrupt-parent = <&icu0>;
90 interrupts = <150 151 152 153 154 155>;
91 };
92
93 rcu0: rcu@203000 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "lantiq,danube-rcu", "simple-mfd", "syscon";
97 reg = <0x203000 0x1000>;
98 ranges = <0x0 0x203000 0x100>;
99 big-endian;
100
101 reset: reset-controller@10 {
102 compatible = "lantiq,danube-reset";
103 reg = <0x10 4>, <0x14 4>;
104
105 #reset-cells = <2>;
106 };
107
108 usb_phy: usb2-phy@18 {
109 compatible = "lantiq,danube-usb2-phy";
110 reg = <0x18 4>;
111 status = "disabled";
112
113 resets = <&reset 4 4>;
114 reset-names = "ctrl";
115 #phy-cells = <0>;
116 };
117 };
118 };
119
120 fpi@10000000 {
121 #address-cells = <1>;
122 #size-cells = <1>;
123 compatible = "lantiq,fpi", "simple-bus";
124 ranges = <0x0 0x10000000 0xeefffff>;
125 reg = <0x10000000 0xef00000>;
126
127 localbus: localbus@0 {
128 #address-cells = <2>;
129 #size-cells = <1>;
130 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
131 1 0 0x4000000 0x4000010>; /* addsel1 */
132 compatible = "lantiq,localbus", "simple-bus";
133 };
134
135 gptu@e100a00 {
136 compatible = "lantiq,gptu-xway";
137 reg = <0xe100a00 0x100>;
138 interrupt-parent = <&icu0>;
139 interrupts = <126 127 128 129 130 131>;
140 };
141
142 gpios: stp@e100bb0 {
143 #gpio-cells = <2>;
144 compatible = "lantiq,gpio-stp-xway";
145 gpio-controller;
146 reg = <0xe100bb0 0x40>;
147 lantiq,shadow = <0xfff>;
148 lantiq,groups = <0x3>;
149 status = "disabled";
150 };
151
152 asc0: serial@e100400 {
153 compatible = "lantiq,asc";
154 reg = <0xe100400 0x400>;
155 interrupt-parent = <&icu0>;
156 interrupts = <104 105 106>;
157 status = "disabled";
158 };
159
160 gpio: pinmux@e100b10 {
161 compatible = "lantiq,danube-pinctrl";
162 #gpio-cells = <2>;
163 gpio-controller;
164 reg = <0xe100b10 0xa0>;
165
166 nand_pins: nand {
167 mux-0 {
168 lantiq,groups = "nand cle", "nand ale",
169 "nand rd";
170 lantiq,function = "ebu";
171 lantiq,output = <1>;
172 lantiq,open-drain = <0>;
173 lantiq,pull = <0>;
174 };
175 mux-1 {
176 lantiq,groups = "nand rdy";
177 lantiq,function = "ebu";
178 lantiq,output = <0>;
179 lantiq,pull = <2>;
180 };
181 };
182
183 nand_cs1_pins: nand-cs1 {
184 mux {
185 lantiq,groups = "nand cs1";
186 lantiq,function = "ebu";
187 lantiq,open-drain = <0>;
188 lantiq,pull = <0>;
189 };
190 };
191 };
192
193 asc1: serial@e100c00 {
194 compatible = "lantiq,asc";
195 reg = <0xe100c00 0x400>;
196 interrupt-parent = <&icu0>;
197 interrupts = <112 113 114>;
198 };
199
200 usb: usb@e101000 {
201 compatible = "lantiq,danube-usb";
202 reg = <0xe101000 0x1000
203 0xe120000 0x3f000>;
204 interrupt-parent = <&icu0>;
205 interrupts = <62>;
206 dr_mode = "host";
207 phys = <&usb_phy>;
208 phy-names = "usb2-phy";
209 status = "disabled";
210 };
211
212 deu@e103100 {
213 compatible = "lantiq,deu-danube";
214 reg = <0xe103100 0xf00>;
215 };
216
217 dma0: dma@e104100 {
218 compatible = "lantiq,dma-xway";
219 reg = <0xe104100 0x800>;
220 };
221
222 ebu0: ebu@e105300 {
223 compatible = "lantiq,ebu-xway";
224 reg = <0xe105300 0x100>;
225 };
226
227 mei@e116000 {
228 compatible = "lantiq,mei-xway";
229 reg = <0xe116000 0x400>;
230 interrupt-parent = <&icu0>;
231 interrupts = <63>;
232 };
233
234 gsw: etop@e180000 {
235 compatible = "lantiq,etop-xway";
236 reg = <0xe180000 0x40000>;
237 interrupt-parent = <&icu0>;
238 interrupts = <73 78>;
239 mac-address = [ 00 11 22 33 44 55 ];
240 };
241
242 ppe@e234000 {
243 compatible = "lantiq,ppe-danube";
244 reg = <0xe234000 0x40000>;
245 interrupt-parent = <&icu0>;
246 interrupts = <96>;
247 };
248
249 pci0: pci@e105400 {
250 status = "disabled";
251
252 #address-cells = <3>;
253 #size-cells = <2>;
254 #interrupt-cells = <1>;
255 compatible = "lantiq,pci-xway";
256 bus-range = <0x0 0x0>;
257 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
258 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
259 reg = <0x7000000 0x8000 /* config space */
260 0xe105400 0x400>; /* pci bridge */
261 lantiq,bus-clock = <33333333>;
262 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
263 interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
264 req-mask = <0x1>; /* GNT1 */
265 };
266 };
267
268 adsl {
269 compatible = "lantiq,adsl-danube";
270 };
271 };