target/linux/lantiq/files/arch/mips/boot/dts/lantiq/falcon.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "lantiq,falcon";
   7
   8         cpus {
   9                 #address-cells = <1>;
  10                 #size-cells = <0>;
  11
  12                 cpu@0 {
  13                         compatible = "mips,mips34kc";
  14                         reg = <0>;
  15                 };
  16         };
  17
  18         aliases {
  19                 serial0 = &serial0;
  20                 serial1 = &serial1;
  21                 gpio0 = &gpio0;
  22                 gpio1 = &gpio1;
  23                 gpio2 = &gpio2;
  24                 gpio3 = &gpio3;
  25                 gpio4 = &gpio4;
  26         };
  27
  28         chosen {
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         ebu_cs0: localbus@10000000 {
  33                 #address-cells = <1>;
  34                 #size-cells = <1>;
  35                 compatible = "lantiq,localbus", "simple-bus";
  36                 reg = <0x10000000 0x4000000>;
  37                 ranges = <0x0 0x10000000 0x4000000>;
  38         };
  39         ebu_cs1: localbus@14000000 {
  40                 #address-cells = <1>;
  41                 #size-cells = <1>;
  42                 compatible = "lantiq,localbus", "simple-mfd";
  43                 reg = <0x14000000 0x4000000>;
  44                 ranges = <0x0 0x14000000 0x4000000>;
  45         };
  46
  47         ebu@18000000 {
  48                 compatible = "lantiq,ebu-falcon";
  49                 reg = <0x18000000 0x100>;
  50         };
  51
  52         sbs2@1d000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 compatible = "lantiq,sysb2", "simple-bus";
  56                 reg = <0x1d000000 0x1000000>;
  57                 ranges = <0x0 0x1d000000 0x1000000>;
  58
  59                 clock_sysgpe: clock-controller@700000 {
  60                         compatible = "lantiq,sysgpe-falcon";
  61                         reg = <0x700000 0x100>;
  62                         #clock-cells = <1>;
  63                 };
  64
  65                 mps@4000 {
  66                         compatible = "lantiq,mps-falcon", "lantiq,mps-xrx100";
  67                         reg = <0x4000 0x1000>;
  68                         interrupt-parent = <&icu0>;
  69                         interrupts = <154 155>;
  70                         lantiq,mbx = <&mpsmbx>;
  71                 };
  72
  73                 gpio0: gpio@810000 {
  74                         compatible = "lantiq,falcon-gpio";
  75                         #address-cells = <0>;
  76                         gpio-controller;
  77                         #gpio-cells = <2>;
  78                         interrupt-controller;
  79                         #interrupt-cells = <2>;
  80                         interrupt-parent = <&icu0>;
  81                         interrupts = <44>;
  82                         reg = <0x810000 0x80>;
  83                         clocks = <&clock_syseth 16>;
  84                 };
  85
  86                 gpio2: gpio@810100 {
  87                         compatible = "lantiq,falcon-gpio";
  88                         #address-cells = <0>;
  89                         gpio-controller;
  90                         #gpio-cells = <2>;
  91                         interrupt-controller;
  92                         #interrupt-cells = <2>;
  93                         interrupt-parent = <&icu0>;
  94                         interrupts = <46>;
  95                         reg = <0x810100 0x80>;
  96                         clocks = <&clock_syseth 17>;
  97                 };
  98
  99                 clock_syseth: clock-controller@b00000 {
 100                         compatible = "lantiq,syseth-falcon";
 101                         reg = <0xb00000 0x100>;
 102                         #clock-cells = <1>;
 103                 };
 104
 105                 pad@b01000 {
 106                         compatible = "lantiq,pad-falcon";
 107                         reg = <0xb01000 0x100>;
 108                         lantiq,bank = <0>;
 109                         clocks = <&clock_syseth 20>;
 110                 };
 111
 112                 pad@b02000 {
 113                         compatible = "lantiq,pad-falcon";
 114                         reg = <0xb02000 0x100>;
 115                         lantiq,bank = <2>;
 116                         clocks = <&clock_syseth 21>;
 117                 };
 118         };
 119
 120         fpi@1e000000 {
 121                 #address-cells = <1>;
 122                 #size-cells = <1>;
 123                 compatible = "lantiq,fpi", "simple-bus";
 124                 reg = <0x1e000000 0x1000000>;
 125                 ranges = <0x0 0x1e000000 0x1000000>;
 126
 127                 serial1: serial@100b00 {
 128                         status = "disabled";
 129                         compatible = "lantiq,asc";
 130                         reg = <0x100b00 0x100>;
 131                         interrupt-parent = <&icu0>;
 132                         interrupts = <112 113 114>;
 133                         line = <1>;
 134                         pinctrl-names = "default";
 135                         pinctrl-0 = <&asc1_pins>;
 136                         clocks = <&clock_sys1 11>;
 137                 };
 138
 139                 serial0: serial@100c00 {
 140                         compatible = "lantiq,asc";
 141                         reg = <0x100c00 0x100>;
 142                         interrupt-parent = <&icu0>;
 143                         interrupts = <104 105 106>;
 144                         line = <0>;
 145                         pinctrl-names = "default";
 146                         pinctrl-0 = <&asc0_pins>;
 147                         clocks = <&clock_sys1 12>;
 148                 };
 149
 150                 spi: spi@100d00 {
 151                         status = "disabled";
 152                         compatible = "lantiq,falcon-spi", "lantiq,xrx100-spi", "lantiq,spi-lantiq-ssc";
 153                         interrupts = <22 23 24 25>;
 154                         interrupt-names = "spi_tx", "spi_rx", "spi_err", "spi_frm";
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157                         reg = <0x100d00 0x100>;
 158                         interrupt-parent = <&icu0>;
 159                         clocks = <&clock_sys1 13>;
 160                         base_cs = <1>;
 161                         num_cs = <2>;
 162                 };
 163
 164                 gptc@100e00 {
 165                         compatible = "lantiq,gptc-falcon";
 166                         reg = <0x100e00 0x100>;
 167                 };
 168
 169                 i2c: i2c@200000 {
 170                         status = "disabled";
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         compatible = "lantiq,lantiq-i2c";
 174                         reg = <0x200000 0x10000>;
 175                         interrupt-parent = <&icu0>;
 176                         interrupts = <18 19 20 21>;
 177                         gpios = <&gpio1 7 0 &gpio1 8 0>;
 178                         pinctrl-names = "default";
 179                         pinctrl-0 = <&i2c_pins>;
 180                         clocks = <&clock_sys1 14>;
 181                 };
 182
 183                 gpio1: gpio@800100 {
 184                         compatible = "lantiq,falcon-gpio";
 185                         gpio-controller;
 186                         #gpio-cells = <2>;
 187                         #address-cells = <0>;
 188                         interrupt-controller;
 189                         #interrupt-cells = <2>;
 190                         interrupt-parent = <&icu0>;
 191                         interrupts = <45>;
 192                         reg = <0x800100 0x100>;
 193                         clocks = <&clock_sys1 16>;
 194                 };
 195
 196                 gpio3: gpio@800200 {
 197                         compatible = "lantiq,falcon-gpio";
 198                         gpio-controller;
 199                         #gpio-cells = <2>;
 200                         #address-cells = <0>;
 201                         interrupt-controller;
 202                         #interrupt-cells = <2>;
 203                         interrupt-parent = <&icu0>;
 204                         interrupts = <47>;
 205                         reg = <0x800200 0x100>;
 206                         clocks = <&clock_sys1 17>;
 207                 };
 208
 209                 gpio4: gpio@800300 {
 210                         compatible = "lantiq,falcon-gpio";
 211                         gpio-controller;
 212                         #gpio-cells = <2>;
 213                         #address-cells = <0>;
 214                         interrupt-controller;
 215                         #interrupt-cells = <2>;
 216                         interrupt-parent = <&icu0>;
 217                         interrupts = <48>;
 218                         reg = <0x800300 0x100>;
 219                         clocks = <&clock_sys1 18>;
 220                 };
 221
 222                 pad@800400 {
 223                         compatible = "lantiq,pad-falcon";
 224                         reg = <0x800400 0x100>;
 225                         lantiq,bank = <1>;
 226                         clocks = <&clock_sys1 20>;
 227                 };
 228
 229                 pad@800500 {
 230                         compatible = "lantiq,pad-falcon";
 231                         reg = <0x800500 0x100>;
 232                         lantiq,bank = <3>;
 233                         clocks = <&clock_sys1 21>;
 234                 };
 235
 236                 pad@800600 {
 237                         compatible = "lantiq,pad-falcon";
 238                         reg = <0x800600 0x100>;
 239                         lantiq,bank = <4>;
 240                         clocks = <&clock_sys1 22>;
 241                 };
 242
 243                 status@802000 {
 244                         compatible = "lantiq,status-falcon";
 245                         reg = <0x802000 0x80>;
 246                 };
 247
 248                 clock_sys1: clock-controller@f00000 {
 249                         compatible = "lantiq,sys1-falcon";
 250                         reg = <0xf00000 0x100>;
 251                         #clock-cells = <1>;
 252                 };
 253         };
 254
 255         sbs0@1f000000 {
 256                 #address-cells = <1>;
 257                 #size-cells = <1>;
 258                 compatible = "simple-bus";
 259                 reg = <0x1f000000 0x400000>;
 260                 ranges = <0x0 0x1f000000 0x400000>;
 261
 262                 mpsmbx: mpsmbx@200000 {
 263                         reg = <0x200000 0x200>;
 264                 };
 265         };
 266
 267         biu@1f800000 {
 268                 #address-cells = <1>;
 269                 #size-cells = <1>;
 270                 compatible = "lantiq,biu", "simple-bus";
 271                 reg = <0x1f800000 0x800000>;
 272                 ranges = <0x0 0x1f800000 0x800000>;
 273
 274                 icu0: icu@80200 {
 275                         #interrupt-cells = <1>;
 276                         #address-cells = <0>;
 277                         interrupt-controller;
 278                         compatible = "lantiq,icu";
 279                         /* TODO: Number of ICUs isn't known */
 280                         reg = <0x80200 0xc8>;
 281                 };
 282
 283                 watchdog@803f0 {
 284                         compatible = "lantiq,wdt";
 285                         reg = <0x803f0 0x10>;
 286                 };
 287         };
 288
 289         pinctrl {
 290                 compatible = "lantiq,pinctrl-falcon";
 291                 pinctrl-names = "default";
 292                 pinctrl-0 = <&state_default>;
 293
 294                 state_default: pinctrl0 {
 295                         /*ntr {
 296                                 lantiq,groups = "ntr8k";
 297                                 lantiq,function = "ntr";
 298                         };*/
 299                         hrst {
 300                                 lantiq,groups = "hrst";
 301                                 lantiq,function = "rst";
 302                         };
 303                 };
 304
 305                 asc0_pins: asc0 {
 306                         asc0 {
 307                                 lantiq,groups = "asc0";
 308                                 lantiq,function = "asc";
 309                         };
 310                 };
 311                 asc1_pins: asc1 {
 312                         asc1 {
 313                                 lantiq,groups = "asc1";
 314                                 lantiq,function = "asc";
 315                         };
 316                 };
 317                 i2c_pins: i2c_pins {
 318                         i2c_pins {
 319                                 lantiq,groups = "i2c";
 320                                 lantiq,function = "i2c";
 321                         };
 322                 };
 323                 bootled_pins: bootled {
 324                         bootled {
 325                                 lantiq,groups = "bootled";
 326                                 lantiq,function = "led";
 327                         };
 328                 };
 329                 ntr_ntr8k: ntr8k {
 330                         ntr8k {
 331                                 lantiq,groups = "ntr8k";
 332                                 lantiq,function = "ntr";
 333                         };
 334                 };
 335                 ntr_pps: pps {
 336                         pps {
 337                                 lantiq,groups = "pps";
 338                                 lantiq,function = "ntr";
 339                         };
 340                 };
 341                 ntr_gpio: gpio {
 342                         gpio {
 343                                 lantiq,pins = "io5";
 344                                 lantiq,mux = <1>;
 345                                 lantiq,output = <0>;
 346                         };
 347                 };
 348                 slic_pins: slic {
 349                         slic {
 350                                 lantiq,groups = "slic";
 351                                 lantiq,function = "slic";
 352                         };
 353                 };
 354         };
 355
 356         pinselect-ntr {
 357                 compatible = "lantiq,onu-ntr","lantiq,pinselect-ntr";
 358                 pinctrl-names = "ntr8k", "pps", "gpio";
 359                 pinctrl-0 = <&ntr_ntr8k>;
 360                 pinctrl-1 = <&ntr_pps>;
 361                 pinctrl-2 = <&ntr_gpio>;
 362         };
 363
 364         pinselect-asc1 {
 365                 compatible = "lantiq,onu-asc1","lantiq,pinselect-asc1";
 366                 pinctrl-names = "default", "asc1";
 367                 pinctrl-0 = <&slic_pins>;
 368                 pinctrl-1 = <&asc1_pins>;
 369         };
 370
 371 };