target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "vr9.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   7
   8 / {
   9         compatible = "avm,fritz3390", "lantiq,xway", "lantiq,vr9";
  10         model = "AVM FRITZ!Box 3390";
  11
  12         chosen {
  13                 bootargs = "console=ttyLTQ0,115200";
  14         };
  15
  16         aliases {
  17                 led-boot = &led_power_green;
  18                 led-failsafe = &led_power_red;
  19                 led-running = &led_power_green;
  20                 led-upgrade = &led_power_red;
  21
  22                 led-dsl = &led_dsl;
  23                 led-internet = &led_info;
  24                 led-wifi = &led_wifi;
  25         };
  26
  27         memory@0 {
  28                 device_type = "memory";
  29                 reg = <0x0 0x8000000>;
  30         };
  31
  32         keys {
  33                 compatible = "gpio-keys-polled";
  34                 poll-interval = <100>;
  35
  36                 power {
  37                         label = "power";
  38                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  39                         linux,code = <KEY_POWER>;
  40                 };
  41
  42                 wifi {
  43                         label = "wifi";
  44                         gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
  45                         linux,code = <KEY_RFKILL>;
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51
  52                 led_power_green: power_green {
  53                         label = "green:power";
  54                         gpios = <&gpio 45 GPIO_ACTIVE_LOW>;
  55                         default-state = "keep";
  56                 };
  57
  58                 led_power_red: power_red {
  59                         label = "red:power";
  60                         gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
  61                 };
  62
  63                 led_wifi: wifi {
  64                         label = "green:wifi";
  65                         gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
  66                 };
  67
  68                 led_dsl: dsl {
  69                         label = "green:dsl";
  70                         gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
  71                 };
  72
  73                 led_lan {
  74                         label = "green:lan";
  75                         gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
  76                 };
  77
  78                 led_info: info {
  79                         label = "green:info";
  80                         gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
  81                 };
  82         };
  83
  84         usb0_vbus: regulator-usb0-vbus {
  85                 compatible = "regulator-fixed";
  86
  87                 regulator-name = "USB0_VBUS";
  88
  89                 regulator-min-microvolt = <5000000>;
  90                 regulator-max-microvolt = <5000000>;
  91
  92                 gpio = <&gpio 14 GPIO_ACTIVE_HIGH>;
  93                 enable-active-high;
  94         };
  95
  96         usb1_vbus: regulator-usb1-vbus {
  97                 compatible = "regulator-fixed";
  98
  99                 regulator-name = "USB1_VBUS";
 100
 101                 regulator-min-microvolt = <5000000>;
 102                 regulator-max-microvolt = <5000000>;
 103
 104                 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
 105                 enable-active-high;
 106         };
 107 };
 108
 109 &eth0 {
 110         interface@0 {
 111                 compatible = "lantiq,xrx200-pdi";
 112                 #address-cells = <1>;
 113                 #size-cells = <0>;
 114                 reg = <0>;
 115                 lantiq,switch;
 116
 117                 ethernet@0 {
 118                         compatible = "lantiq,xrx200-pdi-port";
 119                         reg = <0>;
 120                         phy-mode = "rgmii";
 121                         phy-handle = <&phy0>;
 122                         gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
 123                 };
 124
 125                 ethernet@1 {
 126                         compatible = "lantiq,xrx200-pdi-port";
 127                         reg = <1>;
 128                         phy-mode = "rgmii";
 129                         phy-handle = <&phy1>;
 130                         gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
 131                 };
 132
 133                 ethernet@2 {
 134                         compatible = "lantiq,xrx200-pdi-port";
 135                         reg = <2>;
 136                         phy-mode = "gmii";
 137                         phy-handle = <&phy11>;
 138                 };
 139
 140                 ethernet@4 {
 141                         compatible = "lantiq,xrx200-pdi-port";
 142                         reg = <4>;
 143                         phy-mode = "gmii";
 144                         phy-handle = <&phy13>;
 145                 };
 146         };
 147
 148         mdio {
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151                 compatible = "lantiq,xrx200-mdio";
 152
 153                 phy0: ethernet-phy@0 {
 154                         reg = <0x0>;
 155                         compatible = "ethernet-phy-ieee802.3-c22";
 156                 };
 157
 158                 phy1: ethernet-phy@1 {
 159                         reg = <0x1>;
 160                         compatible = "ethernet-phy-ieee802.3-c22";
 161                 };
 162
 163                 phy11: ethernet-phy@11 {
 164                         reg = <0x11>;
 165                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 166                 };
 167
 168                 phy13: ethernet-phy@13 {
 169                         reg = <0x13>;
 170                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 171                 };
 172         };
 173 };
 174
 175 &gphy0 {
 176         lantiq,gphy-mode = <GPHY_MODE_GE>;
 177 };
 178
 179 &gphy1 {
 180         lantiq,gphy-mode = <GPHY_MODE_GE>;
 181 };
 182
 183 &gpio {
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&state_default>;
 186
 187         state_default: pinmux {
 188                 phy-rst {
 189                         lantiq,pins = "io32", "io44";
 190                         lantiq,pull = <0>;
 191                         lantiq,open-drain;
 192                         lantiq,output = <1>;
 193                 };
 194
 195                 pcie-rst {
 196                         lantiq,pins = "io21";
 197                         lantiq,open-drain;
 198                         lantiq,output = <1>;
 199                 };
 200         };
 201
 202         pcie-rst-dev {
 203                 gpio-hog;
 204                 line-name = "pcie-rst-dev";
 205                 gpios = <22 GPIO_ACTIVE_LOW>;
 206                 output-low;
 207         };
 208 };
 209
 210 &spi {
 211         status = "okay";
 212
 213         flash@4 {
 214                 compatible = "jedec,spi-nor";
 215                 reg = <4>;
 216                 spi-max-frequency = <10000000>;
 217
 218                 partitions {
 219                         compatible = "fixed-partitions";
 220                         #address-cells = <1>;
 221                         #size-cells = <1>;
 222
 223                         partition@0 {
 224                                 reg = <0x0 0x20000>;
 225                                 label = "urlader";
 226                                 read-only;
 227                         };
 228
 229                         partition@20000 {
 230                                 reg = <0x20000 0x10000>;
 231                                 label = "tffs (1)";
 232                                 read-only;
 233                         };
 234
 235                         partition@30000 {
 236                                 reg = <0x30000 0x10000>;
 237                                 label = "tffs (2)";
 238                                 read-only;
 239                         };
 240                 };
 241         };
 242 };
 243
 244 &localbus {
 245         flash@1 {
 246                 compatible = "lantiq,nand-xway";
 247                 bank-width = <1>;
 248                 reg = <1 0x0 0x2000000>;
 249
 250                 pinctrl-0 = <&nand_pins>;
 251                 pinctrl-names = "default";
 252
 253                 nand-ecc-mode = "on-die";
 254
 255                 partitions {
 256                         compatible = "fixed-partitions";
 257                         #address-cells = <1>;
 258                         #size-cells = <1>;
 259
 260                         partition@0 {
 261                                 label = "kernel";
 262                                 reg = <0x0 0x400000>;
 263                         };
 264
 265                         partition@400000 {
 266                                 label = "ubi";
 267                                 reg = <0x400000 0x7c00000>;
 268                         };
 269                 };
 270         };
 271 };
 272
 273 &usb_phy0 {
 274         status = "okay";
 275 };
 276
 277 &usb_phy1 {
 278         status = "okay";
 279 };
 280
 281 &usb0 {
 282         status = "okay";
 283         vbus-supply = <&usb0_vbus>;
 284 };
 285
 286 &usb1 {
 287         status = "okay";
 288         vbus-supply = <&usb1_vbus>;
 289 };
 290
 291 &pcie0 {
 292         status = "okay";
 293         reset-gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
 294 };
 295
 296 &pcie_bridge0 {
 297         wifi@0,0 {
 298                 compatible = "pci168c,0033";
 299                 reg = <0 0 0 0 0>;
 300                 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
 301         };
 302 };