8c43416ace1b536e8fe7b18a856e6ffd11d10dfa
[openwrt/staging/mkresin.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_avm_fritz7430.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7
8 / {
9 compatible = "avm,fritz7430", "lantiq,xway", "lantiq,vr9";
10 model = "AVM FRITZ!Box 7430";
11
12 chosen {
13 bootargs = "console=ttyLTQ0,115200";
14 };
15
16 aliases {
17 led-boot = &led_power;
18 led-failsafe = &led_info_red;
19 led-running = &led_power;
20 led-upgrade = &led_info_green;
21
22 led-dsl = &led_info_green;
23 led-wifi = &led_wifi;
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x8000000>;
29 };
30
31 keys {
32 compatible = "gpio-keys-polled";
33 poll-interval = <100>;
34
35 dect {
36 label = "dect";
37 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
38 linux,code = <KEY_PHONE>;
39 };
40
41 wifi {
42 label = "wifi";
43 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
44 linux,code = <KEY_RFKILL>;
45 };
46 };
47
48 leds {
49 compatible = "gpio-leds";
50
51 led_power: power {
52 label = "green:power";
53 gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
54 default-state = "keep";
55 };
56
57 led_info_green: info_green {
58 label = "green:info";
59 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
60 };
61
62 led_info_red: info_red {
63 label = "red:info";
64 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
65 };
66
67 led_wifi: wifi {
68 label = "green:wifi";
69 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
70 };
71
72 dect {
73 label = "green:dect";
74 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
75 };
76
77 fon {
78 label = "green:fon";
79 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
80 };
81 };
82
83 usb0_vbus: regulator-usb0-vbus {
84 compatible = "regulator-fixed";
85
86 regulator-name = "USB0_VBUS";
87
88 regulator-min-microvolt = <5000000>;
89 regulator-max-microvolt = <5000000>;
90
91 gpio = <&gpio 5 GPIO_ACTIVE_HIGH>;
92 enable-active-high;
93 };
94 };
95
96 &localbus {
97 flash@0 {
98 compatible = "lantiq,nand-xway";
99 bank-width = <2>;
100 reg = <0 0x0 0x8000000>;
101 lantiq,cs = <1>;
102
103 pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
104 pinctrl-names = "default";
105
106 partitions {
107 compatible = "fixed-partitions";
108 #address-cells = <1>;
109 #size-cells = <1>;
110
111 partition@0 {
112 label = "urlader";
113 reg = <0x0 0x40000>;
114 read-only;
115 };
116
117 partition@40000 {
118 label = "nand-tffs";
119 reg = <0x40000 0x400000>;
120 read-only;
121 };
122
123 partition@440000 {
124 label = "kernel";
125 reg = <0x440000 0x400000>;
126 };
127
128 partition@840000 {
129 label = "ubi";
130 reg = <0x840000 0x3000000>;
131 };
132
133 partition@3840000 {
134 label = "reserved-kernel";
135 reg = <0x3840000 0x400000>;
136 read-only;
137 };
138
139 partition@3c40000 {
140 label = "reserved-filesystem";
141 reg = <0x3c40000 0x3000000>;
142 read-only;
143 };
144
145 partition@6c40000 {
146 label = "config";
147 reg = <0x6c40000 0x200000>;
148 read-only;
149 };
150
151 partition@6e40000 {
152 label = "nand-filesystem";
153 reg = <0x6e40000 0x11c0000>;
154 read-only;
155 };
156 };
157 };
158 };
159
160 &pcie0 {
161 status = "okay";
162 gpio-reset = <&gpio 11 GPIO_ACTIVE_LOW>;
163 };
164
165 &pcie_bridge0 {
166 wifi@0,0{
167 compatible = "pci168c,abcd";
168 reg = <0 0 0 0 0>;
169 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
170 };
171 };
172
173 &gphy0 {
174 lantiq,gphy-mode = <GPHY_MODE_FE>;
175 };
176
177 &gphy1 {
178 lantiq,gphy-mode = <GPHY_MODE_FE>;
179 };
180
181 &eth0 {
182 interface@0 {
183 compatible = "lantiq,xrx200-pdi";
184 #address-cells = <1>;
185 #size-cells = <0>;
186 reg = <0>;
187 lantiq,switch;
188
189 ethernet@2 {
190 compatible = "lantiq,xrx200-pdi-port";
191 reg = <2>;
192 phy-mode = "mii";
193 phy-handle = <&phy11>;
194 };
195
196 ethernet@3 {
197 compatible = "lantiq,xrx200-pdi-port";
198 reg = <3>;
199 phy-mode = "mii";
200 phy-handle = <&phy12>;
201 };
202
203 ethernet@4 {
204 compatible = "lantiq,xrx200-pdi-port";
205 reg = <4>;
206 phy-mode = "mii";
207 phy-handle = <&phy13>;
208 };
209
210 ethernet@5 {
211 compatible = "lantiq,xrx200-pdi-port";
212 reg = <5>;
213 phy-mode = "mii";
214 phy-handle = <&phy14>;
215 };
216 };
217
218 mdio {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 compatible = "lantiq,xrx200-mdio";
222
223 phy11: ethernet-phy@11 {
224 reg = <0x11>;
225 compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
226 };
227
228 phy12: ethernet-phy@12 {
229 reg = <0x12>;
230 compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
231 };
232
233 phy13: ethernet-phy@13 {
234 reg = <0x13>;
235 compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
236 };
237
238 phy14: ethernet-phy@14 {
239 reg = <0x14>;
240 compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
241 };
242 };
243 };
244
245 &gpio {
246 pinctrl-names = "default";
247 pinctrl-0 = <&state_default>;
248
249 state_default: pinmux {
250 pcie-rst {
251 lantiq,pins = "io11";
252 lantiq,open-drain = <1>;
253 lantiq,output = <1>;
254 };
255 };
256 };
257
258 &usb_phy0 {
259 status = "okay";
260 };
261
262 &usb0 {
263 status = "okay";
264
265 vbus-supply = <&usb0_vbus>;
266 };