target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "tplink,tdw89x0", "lantiq,xway", "lantiq,vr9";
   8
   9         chosen {
  10                 bootargs = "console=ttyLTQ0,115200";
  11         };
  12
  13         aliases {
  14                 /* the power led can't be controlled, use the wps led instead */
  15                 led-boot = &led_wps;
  16                 led-failsafe = &led_wps;
  17
  18                 led-dsl = &led_dsl;
  19                 led-internet = &led_internet;
  20                 led-wifi = &led_wifi;
  21         };
  22
  23         memory@0 {
  24                 device_type = "memory";
  25                 reg = <0x0 0x4000000>;
  26         };
  27
  28         keys {
  29                 compatible = "gpio-keys-polled";
  30                 poll-interval = <100>;
  31                 reset {
  32                         label = "reset";
  33                         gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_RESTART>;
  35                 };
  36
  37                 wifi {
  38                         label = "wifi";
  39                         gpios = <&gpio 9 GPIO_ACTIVE_HIGH>;
  40                         linux,code = <KEY_RFKILL>;
  41                         linux,input-type = <EV_SW>;
  42                 };
  43
  44                 wps {
  45                         label = "wps";
  46                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_WPS_BUTTON>;
  48                 };
  49         };
  50
  51         leds: leds {
  52                 compatible = "gpio-leds";
  53
  54                 /*
  55                         power is not controllable via gpio
  56                 */
  57
  58                 led_dsl: dsl {
  59                         label = "green:dsl";
  60                         gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
  61                 };
  62
  63                 led_internet: internet {
  64                         label = "green:internet";
  65                         gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
  66                 };
  67
  68                 usb0 {
  69                         label = "green:usb";
  70                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
  71                         trigger-sources = <&ehci_port1>;
  72                         linux,default-trigger = "usbport";
  73                 };
  74
  75                 usb2 {
  76                         label = "green:usb2";
  77                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
  78                         trigger-sources = <&ehci_port2>;
  79                         linux,default-trigger = "usbport";
  80                 };
  81
  82                 led_wps: wps {
  83                         label = "green:wps";
  84                         gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
  85                 };
  86         };
  87
  88         ath9k-leds {
  89                 compatible = "gpio-leds";
  90
  91                 led_wifi: wifi {
  92                         label = "green:wifi";
  93                         gpios = <&ath9k 0 GPIO_ACTIVE_HIGH>;
  94                         linux,default-trigger = "phy0tpt";
  95                 };
  96         };
  97
  98
  99         usb_vbus: regulator-usb-vbus {
 100                 compatible = "regulator-fixed";
 101
 102                 regulator-name = "USB_VBUS";
 103
 104                 regulator-min-microvolt = <5000000>;
 105                 regulator-max-microvolt = <5000000>;
 106
 107                 gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
 108                 enable-active-high;
 109         };
 110 };
 111
 112 &eth0 {
 113         pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
 114         pinctrl-names = "default";
 115
 116         interface@0 {
 117                 compatible = "lantiq,xrx200-pdi";
 118                 #address-cells = <1>;
 119                 #size-cells = <0>;
 120                 reg = <0>;
 121                 mtd-mac-address = <&ath9k_cal 0xf100>;
 122                 lantiq,switch;
 123
 124                 ethernet@0 {
 125                         compatible = "lantiq,xrx200-pdi-port";
 126                         reg = <0>;
 127                         phy-mode = "rgmii";
 128                         phy-handle = <&phy0>;
 129                         // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
 130                 };
 131                 ethernet@2 {
 132                         compatible = "lantiq,xrx200-pdi-port";
 133                         reg = <2>;
 134                         phy-mode = "gmii";
 135                         phy-handle = <&phy11>;
 136                 };
 137                 ethernet@4 {
 138                         compatible = "lantiq,xrx200-pdi-port";
 139                         reg = <4>;
 140                         phy-mode = "gmii";
 141                         phy-handle = <&phy13>;
 142                 };
 143                 ethernet@5 {
 144                         compatible = "lantiq,xrx200-pdi-port";
 145                         reg = <5>;
 146                         phy-mode = "rgmii";
 147                         phy-handle = <&phy5>;
 148                 };
 149         };
 150
 151         mdio {
 152                 #address-cells = <1>;
 153                 #size-cells = <0>;
 154                 compatible = "lantiq,xrx200-mdio";
 155
 156                 phy0: ethernet-phy@0 {
 157                         reg = <0x0>;
 158                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 159                 };
 160                 phy5: ethernet-phy@5 {
 161                         reg = <0x5>;
 162                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 163                 };
 164                 phy11: ethernet-phy@11 {
 165                         reg = <0x11>;
 166                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 167                 };
 168                 phy13: ethernet-phy@13 {
 169                         reg = <0x13>;
 170                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 171                 };
 172         };
 173 };
 174
 175 &gphy0 {
 176         lantiq,gphy-mode = <GPHY_MODE_GE>;
 177 };
 178
 179 &gphy1 {
 180         lantiq,gphy-mode = <GPHY_MODE_GE>;
 181 };
 182
 183 &gpio {
 184         pinctrl-names = "default";
 185         pinctrl-0 = <&state_default>;
 186
 187         state_default: pinmux {
 188                 phy-rst {
 189                         lantiq,pins = "io42";
 190                         lantiq,pull = <0>;
 191                         lantiq,open-drain = <0>;
 192                         lantiq,output = <1>;
 193                 };
 194                 pcie-rst {
 195                         lantiq,pins = "io38";
 196                         lantiq,pull = <0>;
 197                         lantiq,output = <1>;
 198                 };
 199         };
 200 };
 201
 202 &pcie0 {
 203         status = "okay";
 204         reset-gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
 205 };
 206
 207 &pcie_bridge0 {
 208         ath9k: wifi@0,0{
 209                 compatible = "pci168c,002e";
 210                 reg = <0 0 0 0 0>;
 211                 #gpio-cells = <2>;
 212                 gpio-controller;
 213                 qca,no-eeprom;
 214                 qca,disable-5ghz;
 215                 mtd-mac-address = <&ath9k_cal 0xf100>;
 216                 mtd-mac-address-increment = <2>;
 217         };
 218 };
 219
 220 &spi {
 221         status = "okay";
 222
 223         flash@4 {
 224                 compatible = "jedec,spi-nor";
 225                 reg = <4>;
 226                 spi-max-frequency = <33250000>;
 227                 m25p,fast-read;
 228
 229                 partitions {
 230                         compatible = "fixed-partitions";
 231                         #address-cells = <1>;
 232                         #size-cells = <1>;
 233
 234                         partition@0 {
 235                                 reg = <0x0 0x20000>;
 236                                 label = "u-boot";
 237                                 read-only;
 238                         };
 239
 240                         partition@20000 {
 241                                 reg = <0x20000 0x7a0000>;
 242                                 label = "firmware";
 243                         };
 244
 245                         partition@7c0000 {
 246                                 reg = <0x7c0000 0x10000>;
 247                                 label = "config";
 248                                 read-only;
 249                         };
 250
 251                         ath9k_cal: partition@7d0000 {
 252                                 reg = <0x7d0000 0x30000>;
 253                                 label = "boardconfig";
 254                                 read-only;
 255                         };
 256                 };
 257         };
 258 };
 259
 260 &usb_phy0 {
 261         status = "okay";
 262 };
 263
 264 &usb_phy1 {
 265         status = "okay";
 266 };
 267
 268 &usb0 {
 269         status = "okay";
 270         vbus-supply = <&usb_vbus>;
 271 };
 272
 273 &usb1 {
 274         status = "okay";
 275         vbus-supply = <&usb_vbus>;
 276 };