target/linux/lantiq/files-4.14/arch/mips/boot/dts/P2812HNUFX.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         compatible = "zyxel,p-2812hnu", "lantiq,xway", "lantiq,vr9";
   7
   8         chosen {
   9                 bootargs = "console=ttyLTQ0,115200";
  10         };
  11
  12         aliases {
  13                 led-boot = &power_green;
  14                 led-failsafe = &power_red;
  15                 led-running = &power_green;
  16
  17                 led-dsl = &dsl_green;
  18                 led-internet = &internet_green;
  19                 led-wifi = &wireless_green;
  20         };
  21
  22         memory@0 {
  23                 reg = <0x0 0x8000000>;
  24         };
  25
  26         gphy-xrx200 {
  27                 compatible = "lantiq,phy-xrx200";
  28                 firmware1 = "lantiq/xrx200_phy11g_a14.bin";     /*VR9 1.1*/
  29                 firmware2 = "lantiq/xrx200_phy11g_a22.bin";     /*VR9 1.2*/
  30                 phys = [ 00 01 ];
  31         };
  32
  33         gpio-keys-polled {
  34                 compatible = "gpio-keys-polled";
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37                 poll-interval = <100>;
  38
  39                 reset {
  40                         label = "reset";
  41                         gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_RESTART>;
  43                 };
  44
  45                 rfkill {
  46                         label = "rfkill";
  47                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  48                         linux,code = <KEY_RFKILL>;
  49                 };
  50         };
  51
  52         gpio-leds {
  53                 compatible = "gpio-leds";
  54
  55                 internet_red {
  56                         label = "p2812hnufx:red:internet";
  57                         gpios = <&stp 16 GPIO_ACTIVE_LOW>;
  58                 };
  59                 internet_green: internet_green {
  60                         label = "p2812hnufx:green:internet";
  61                         gpios = <&stp 17 GPIO_ACTIVE_LOW>;
  62                 };
  63                 dsl_green: dsl_green {
  64                         label = "p2812hnufx:green:dsl";
  65                         gpios = <&stp 18 GPIO_ACTIVE_LOW>;
  66                 };
  67                 dsl_orange {
  68                         label = "p2812hnufx:orange:dsl";
  69                         gpios = <&stp 19 GPIO_ACTIVE_LOW>;
  70                 };
  71                 wireless_orange {
  72                         label = "p2812hnufx:orange:wlan";
  73                         gpios = <&stp 20 GPIO_ACTIVE_LOW>;
  74                 };
  75                 wireless_green: wireless_green {
  76                         label = "p2812hnufx:green:wlan";
  77                         gpios = <&stp 21 GPIO_ACTIVE_LOW>;
  78                 };
  79                 power_red: power {
  80                         label = "p2812hnufx:red:power";
  81                         gpios = <&stp 22 GPIO_ACTIVE_LOW>;
  82                 };
  83                 power_green: power2 {
  84                         label = "p2812hnufx:green:power";
  85                         gpios = <&stp 23 GPIO_ACTIVE_LOW>;
  86                         default-state = "keep";
  87                 };
  88                 phone1 {
  89                         label = "p2812hnufx:green:phone";
  90                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  91                 };
  92                 phone1warn {
  93                         label = "p2812hnufx:orange:phone";
  94                         gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
  95                 };
  96                 phone2warn {
  97                         label = "p2812hnufx:orange:phone2";
  98                         gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
  99                 };
 100                 phone2 {
 101                         label = "p2812hnufx:green:phone2";
 102                         gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
 103                 };
 104         };
 105 };
 106
 107 &eth0 {
 108         lan: interface@0 {
 109                 compatible = "lantiq,xrx200-pdi";
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112                 reg = <0>;
 113                 mac-address = [ 00 11 22 33 44 55 ];
 114                 lantiq,switch;
 115
 116                 ethernet@0 {
 117                         compatible = "lantiq,xrx200-pdi-port";
 118                         reg = <0>;
 119                         phy-mode = "rgmii";
 120                         phy-handle = <&phy0>;
 121                 };
 122                 ethernet@1 {
 123                         compatible = "lantiq,xrx200-pdi-port";
 124                         reg = <1>;
 125                         phy-mode = "rgmii";
 126                         phy-handle = <&phy1>;
 127                 };
 128                 ethernet@2 {
 129                         compatible = "lantiq,xrx200-pdi-port";
 130                         reg = <2>;
 131                         phy-mode = "gmii";
 132                         phy-handle = <&phy11>;
 133                 };
 134                 ethernet@4 {
 135                         compatible = "lantiq,xrx200-pdi-port";
 136                         reg = <4>;
 137                         phy-mode = "gmii";
 138                         phy-handle = <&phy13>;
 139                 };
 140                 ethernet@5 {
 141                         compatible = "lantiq,xrx200-pdi-port";
 142                         reg = <5>;
 143                         phy-mode = "rgmii";
 144                         phy-handle = <&phy5>;
 145                 };
 146         };
 147
 148         mdio@0 {
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151                 compatible = "lantiq,xrx200-mdio";
 152                 reg = <0>;
 153
 154                 phy0: ethernet-phy@0 {
 155                         reg = <0x0>;
 156                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 157                 };
 158                 phy1: ethernet-phy@1 {
 159                         reg = <0x1>;
 160                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 161                 };
 162                 phy5: ethernet-phy@5 {
 163                         reg = <0x5>;
 164                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 165                 };
 166                 phy11: ethernet-phy@11 {
 167                         reg = <0x11>;
 168                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 169                 };
 170                 phy13: ethernet-phy@13 {
 171                         reg = <0x13>;
 172                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 173                 };
 174         };
 175 };
 176
 177 &gpio {
 178         pinctrl-names = "default";
 179         pinctrl-0 = <&state_default>;
 180
 181         state_default: pinmux {
 182                 exin3 {
 183                         lantiq,groups = "exin3";
 184                         lantiq,function = "exin";
 185                 };
 186                 mdio {
 187                         lantiq,groups = "mdio";
 188                         lantiq,function = "mdio";
 189                 };
 190                 gphy-leds {
 191                         lantiq,groups = "gphy0 led1", "gphy1 led1",
 192                                         "gphy0 led2", "gphy1 led2";
 193                         lantiq,function = "gphy";
 194                         lantiq,pull = <2>;
 195                         lantiq,open-drain = <0>;
 196                         lantiq,output = <1>;
 197                 };
 198                 stp {
 199                         lantiq,groups = "stp";
 200                         lantiq,function = "stp";
 201                         lantiq,pull = <2>;
 202                         lantiq,open-drain = <0>;
 203                         lantiq,output = <1>;
 204                 };
 205                 pci-in {
 206                         lantiq,groups = "req1";
 207                         lantiq,function = "pci";
 208                         lantiq,output = <0>;
 209                         lantiq,open-drain = <1>;
 210                         lantiq,pull = <2>;
 211                 };
 212                 pci-out {
 213                         lantiq,groups = "gnt1";
 214                         lantiq,function = "pci";
 215                         lantiq,output = <1>;
 216                         lantiq,open-drain = <0>;
 217                         lantiq,pull = <0>;
 218                 };
 219                 pci_rst {
 220                         lantiq,pins = "io21";
 221                         lantiq,output = <1>;
 222                         lantiq,open-drain = <0>;
 223                         lantiq,pull = <2>;
 224                 };
 225                 pcie-rst {
 226                         lantiq,pins = "io38";
 227                         lantiq,pull = <0>;
 228                         lantiq,output = <1>;
 229                 };
 230                 ifxhcd-rst {
 231                         lantiq,pins = "io33";
 232                         lantiq,pull = <0>;
 233                         lantiq,open-drain = <0>;
 234                         lantiq,output = <1>;
 235                 };
 236                 nand_out {
 237                         lantiq,groups = "nand cle", "nand ale";
 238                         lantiq,function = "ebu";
 239                         lantiq,output = <1>;
 240                         lantiq,open-drain = <0>;
 241                         lantiq,pull = <0>;
 242                 };
 243                 nand_cs1 {
 244                         lantiq,groups = "nand cs1";
 245                         lantiq,function = "ebu";
 246                         lantiq,open-drain = <0>;
 247                         lantiq,pull = <0>;
 248                 };
 249         };
 250 };
 251
 252 &pci0 {
 253         status = "okay";
 254         gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
 255 };
 256
 257 &stp {
 258         status = "okay";
 259
 260         lantiq,shadow = <0xffffff>;
 261         lantiq,groups = <0x7>;
 262         lantiq,dsl = <0x0>;
 263         lantiq,phy1 = <0x0>;
 264         lantiq,phy2 = <0x0>;
 265 };
 266
 267 &usb0 {
 268         status = "okay";
 269         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
 270         lantiq,portmask = <0x3>;
 271 };
 272
 273 &usb1 {
 274         status = "okay";
 275         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
 276 };