1 #include <dt-bindings/gpio/gpio.h>
2 #include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
7 compatible = "lantiq,xway", "lantiq,vr9";
14 stdout-path = "serial0:115200n8";
22 compatible = "mips,mips34Kc";
28 compatible = "lantiq,cputemp";
32 compatible = "syscon-reboot";
42 compatible = "lantiq,biu", "simple-bus";
43 reg = <0x1f800000 0x800000>;
44 ranges = <0x0 0x1f800000 0x7fffff>;
47 #interrupt-cells = <1>;
49 compatible = "lantiq,icu";
50 reg = <0x80200 0xc8 /* icu0 */
51 0x80300 0xc8>; /* icu1 */
55 compatible = "lantiq,xrx100-wdt", "lantiq,xrx100-wdt";
65 compatible = "lantiq,sram", "simple-bus";
66 reg = <0x1f000000 0x800000>;
67 ranges = <0x0 0x1f000000 0x7fffff>;
70 #interrupt-cells = <1>;
72 compatible = "lantiq,eiu-xway";
73 reg = <0x101000 0x1000>;
74 interrupt-parent = <&icu0>;
75 lantiq,eiu-irqs = <166 135 66 40 41 42>;
79 compatible = "lantiq,pmu-xway";
80 reg = <0x102000 0x1000>;
84 compatible = "lantiq,cgu-xway";
85 reg = <0x103000 0x1000>;
89 compatible = "lantiq,dcdc-xrx200";
90 reg = <0x106a00 0x200>;
95 compatible = "lantiq,vmmc-xway";
96 reg = <0x107000 0x300>;
97 interrupt-parent = <&icu0>;
98 interrupts = <150 151 152 153 154 155>;
101 pcie0_phy: phy@106800 {
102 compatible = "lantiq,vrx200-pcie-phy";
103 reg = <0x106800 0x100>;
104 lantiq,rcu = <&rcu0>;
105 lantiq,rcu-endian-offset = <0x4c>;
106 lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */
108 resets = <&reset0 12 24>, <&reset0 22 22>;
109 reset-names = "phy", "pcie";
114 #address-cells = <1>;
116 compatible = "lantiq,xrx200-rcu", "simple-mfd", "syscon";
117 reg = <0x203000 0x100>;
118 ranges = <0x0 0x203000 0x100>;
122 compatible = "lantiq,xrx200-gphy";
125 resets = <&reset0 31 30>, <&reset1 7 7>;
126 reset-names = "gphy", "gphy2";
130 compatible = "lantiq,xrx200-gphy";
133 resets = <&reset0 29 28>, <&reset1 6 6>;
134 reset-names = "gphy", "gphy2";
137 reset0: reset-controller@10 {
138 compatible = "lantiq,xrx200-reset";
139 reg = <0x10 4>, <0x14 4>;
144 reset1: reset-controller@48 {
145 compatible = "lantiq,xrx200-reset";
146 reg = <0x48 4>, <0x24 4>;
151 usb_phy0: usb2-phy@18 {
152 compatible = "lantiq,xrx200-usb2-phy";
153 reg = <0x18 4>, <0x38 4>;
156 resets = <&reset1 4 4>, <&reset0 4 4>;
157 reset-names = "phy", "ctrl";
161 usb_phy1: usb2-phy@34 {
162 compatible = "lantiq,xrx200-usb2-phy";
163 reg = <0x34 4>, <0x3c 4>;
166 resets = <&reset1 5 5>, <&reset0 4 4>;
167 reset-names = "phy", "ctrl";
174 compatible = "lantiq,xrx200-fpi", "simple-bus";
175 ranges = <0x0 0x10000000 0xf000000>;
176 reg = <0x1f400000 0x1000>,
177 <0x10000000 0xf000000>;
179 offset-endianness = <0x4c>;
180 #address-cells = <1>;
183 localbus: localbus@0 {
184 #address-cells = <2>;
186 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
187 1 0 0x4000000 0x4000010>; /* addsel1 */
188 compatible = "lantiq,localbus", "simple-bus";
192 compatible = "lantiq,gptu-xway";
193 reg = <0xe100a00 0x100>;
194 interrupt-parent = <&icu0>;
195 interrupts = <126 127 128 129 130 131>;
199 compatible = "lantiq,usif";
200 reg = <0xda00000 0x1000000>;
201 interrupt-parent = <&icu0>;
202 interrupts = <29 125 107 108 109 110>;
207 compatible = "lantiq,xrx200-spi", "lantiq,xrx100-spi";
208 reg = <0xe100800 0x100>;
209 interrupt-parent = <&icu0>;
210 interrupts = <22 23 24>;
211 interrupt-names = "spi_rx", "spi_tx", "spi_err",
213 #address-cells = <1>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
220 gpio: pinmux@e100b10 {
221 compatible = "lantiq,xrx200-pinctrl";
224 reg = <0xe100b10 0xa0>;
226 gphy0_led0_pins: gphy0-led0 {
228 lantiq,groups = "gphy0 led0";
229 lantiq,function = "gphy";
230 lantiq,open-drain = <0>;
236 gphy0_led1_pins: gphy0-led1 {
238 lantiq,groups = "gphy0 led1";
239 lantiq,function = "gphy";
240 lantiq,open-drain = <0>;
246 gphy0_led2_pins: gphy0-led2 {
248 lantiq,groups = "gphy0 led2";
249 lantiq,function = "gphy";
250 lantiq,open-drain = <0>;
256 gphy1_led0_pins: gphy1-led0 {
258 lantiq,groups = "gphy1 led0";
259 lantiq,function = "gphy";
260 lantiq,open-drain = <0>;
266 gphy1_led1_pins: gphy1-led1 {
268 lantiq,groups = "gphy1 led1";
269 lantiq,function = "gphy";
270 lantiq,open-drain = <0>;
276 gphy1_led2_pins: gphy1-led2 {
278 lantiq,groups = "gphy1 led2";
279 lantiq,function = "gphy";
280 lantiq,open-drain = <0>;
288 lantiq,groups = "mdio";
289 lantiq,function = "mdio";
295 lantiq,groups = "nand cle", "nand ale",
297 lantiq,function = "ebu";
299 lantiq,open-drain = <0>;
303 lantiq,groups = "nand rdy";
304 lantiq,function = "ebu";
310 nand_cs1_pins: nand-cs1 {
312 lantiq,groups = "nand cs1";
313 lantiq,function = "ebu";
314 lantiq,open-drain = <0>;
319 pci_gnt1_pins: pci-gnt1 {
321 lantiq,groups = "gnt1";
322 lantiq,function = "pci";
324 lantiq,open-drain = <0>;
329 pci_req1_pins: pci-req1 {
331 lantiq,groups = "req1";
332 lantiq,function = "pci";
334 lantiq,open-drain = <1>;
341 lantiq,groups = "spi_di";
342 lantiq,function = "spi";
345 lantiq,groups = "spi_do", "spi_clk";
346 lantiq,function = "spi";
351 spi_cs4_pins: spi-cs4 {
353 lantiq,groups = "spi_cs4";
354 lantiq,function = "spi";
361 lantiq,groups = "stp";
362 lantiq,function = "stp";
364 lantiq,open-drain = <0>;
372 compatible = "lantiq,gpio-stp-xway";
373 reg = <0xe100bb0 0x40>;
377 pinctrl-0 = <&stp_pins>;
378 pinctrl-names = "default";
380 lantiq,shadow = <0xffffff>;
381 lantiq,groups = <0x7>;
387 asc1: serial@e100c00 {
388 compatible = "lantiq,asc";
389 reg = <0xe100c00 0x400>;
390 interrupt-parent = <&icu0>;
391 interrupts = <112 113 114>;
395 compatible = "lantiq,deu-xrx200";
396 reg = <0xe103100 0xf00>;
400 compatible = "lantiq,dma-xway";
401 reg = <0xe104100 0x800>;
405 compatible = "lantiq,ebu-xway";
406 reg = <0xe105300 0x100>;
411 compatible = "lantiq,xrx200-usb";
412 reg = <0xe101000 0x1000
414 interrupt-parent = <&icu0>;
415 interrupts = <62 91>;
418 phy-names = "usb2-phy";
423 compatible = "lantiq,xrx200-usb";
424 reg = <0xe106000 0x1000>;
425 interrupt-parent = <&icu0>;
429 phy-names = "usb2-phy";
433 #address-cells = <1>;
435 compatible = "lantiq,xrx200-net";
436 reg = < 0xe108000 0x3000 /* switch */
437 0xe10b100 0x70 /* mdio */
438 0xe10b1d8 0x30 /* mii */
439 0xe10b308 0x30 /* pmac */
441 interrupt-parent = <&icu0>;
442 interrupts = <75 73 72>;
443 resets = <&reset0 21 16>, <&reset0 8 8>;
444 reset-names = "switch", "ppe";
445 lantiq,phys = <&gphy0>, <&gphy1>;
446 pinctrl-0 = <&mdio_pins>;
447 pinctrl-names = "default";
451 compatible = "lantiq,mei-xrx200";
452 reg = <0xe116000 0x9c>;
453 interrupt-parent = <&icu0>;
458 compatible = "lantiq,ppe-xrx200";
459 reg = <0xe234000 0x3ffd>;
460 interrupt-parent = <&icu0>;
462 resets = <&reset0 3 3>, <&reset0 11 11>, <&reset0 23 23>;
463 reset-names = "dsp", "dfe", "tc";
466 pcie0: pcie@d900000 {
467 compatible = "lantiq,pcie-xrx200";
469 #interrupt-cells = <1>;
471 #address-cells = <3>;
473 reg = <0xd900000 0x1000>;
475 interrupt-parent = <&icu0>;
476 interrupts = <161 144>;
478 phys = <&pcie0_phy LANTIQ_PCIE_PHY_MODE_36MHZ>;
481 resets = <&reset0 22 22>;
483 lantiq,rcu = <&rcu0>;
487 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
493 #address-cells = <3>;
495 #interrupt-cells = <1>;
496 compatible = "lantiq,pci-xway";
497 bus-range = <0x0 0x0>;
498 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
499 0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
500 reg = <0x7000000 0x8000 /* config space */
501 0xe105400 0x400>; /* pci bridge */
502 lantiq,bus-clock = <33333333>;
503 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
504 interrupt-map = <0x7000 0 0 1 &icu0 30 1>; /* slot 14, irq 30 */
505 req-mask = <0x1>; /* GNT1 */
510 compatible = "lantiq,vdsl-vrx200";