1 From ad6176d72132d020317db1496be1485056ac88d7 Mon Sep 17 00:00:00 2001
2 From: Liu Gang <Gang.Liu@nxp.com>
3 Date: Mon, 6 Jun 2016 15:46:00 +0800
4 Subject: [PATCH 28/70] dts/ls1043: update dts for ls1043
6 Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
8 arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 59 +++++
9 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 264 +++++++++++++++++++-
10 .../boot/dts/freescale/qoriq-qman1-portals.dtsi | 10 +-
11 3 files changed, 321 insertions(+), 12 deletions(-)
13 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
14 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
17 model = "LS1043A RDB Board";
18 compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
35 + #address-cells = <1>;
37 + compatible = "n25q128a13", "jedec,spi-nor"; /* 16MB */
39 + spi-max-frequency = <1000000>; /* input clock */
43 + compatible = "maxim,ds26522";
45 + spi-max-frequency = <2000000>;
46 + fsl,spi-cs-sck-delay = <100>;
47 + fsl,spi-sck-cs-delay = <50>;
51 + compatible = "maxim,ds26522";
53 + spi-max-frequency = <2000000>;
54 + fsl,spi-cs-sck-delay = <100>;
55 + fsl,spi-sck-cs-delay = <50>;
64 aqr105_phy: ethernet-phy@c {
65 compatible = "ethernet-phy-ieee802.3-c45";
66 + interrupts = <0 132 4>;
73 + ucc_hdlc: ucc@2000 {
74 + compatible = "fsl,ucc_hdlc";
75 + rx-clock-name = "clk8";
76 + tx-clock-name = "clk9";
77 + fsl,rx-sync-clock = "rsync_pin";
78 + fsl,tx-sync-clock = "tsync_pin";
79 + fsl,tx-timeslot = <0xfffffffe>;
80 + fsl,rx-timeslot = <0xfffffffe>;
81 + fsl,tdm-framer-type = "e1";
82 + fsl,tdm-mode = "normal";
84 + fsl,siram-entry-id = <0>;
88 + ucc_serial: ucc@2200 {
89 + device_type = "serial";
90 + compatible = "ucc_uart";
92 + rx-clock-name = "brg2";
93 + tx-clock-name = "brg2";
96 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
97 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
99 * OTHER DEALINGS IN THE SOFTWARE.
102 +#include <dt-bindings/thermal/thermal.h>
105 compatible = "fsl,ls1043a";
106 interrupt-parent = <&gic>;
108 compatible = "arm,cortex-a53";
110 clocks = <&clockgen 1 0>;
111 + #cooling-cells = <2>;
116 <1 14 0x1>, /* Physical Non-Secure PPI */
117 <1 11 0x1>, /* Virtual PPI */
118 <1 10 0x1>; /* Hypervisor PPI */
120 + fsl,erratum-a008585;
124 @@ -162,11 +167,64 @@
128 + crypto: crypto@1700000 {
129 + compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
132 + #address-cells = <1>;
134 + ranges = <0x0 0x00 0x1700000 0x100000>;
135 + reg = <0x00 0x1700000 0x0 0x100000>;
136 + interrupts = <0 75 0x4>;
138 + sec_jr0: jr@10000 {
139 + compatible = "fsl,sec-v5.4-job-ring",
140 + "fsl,sec-v5.0-job-ring",
141 + "fsl,sec-v4.0-job-ring";
142 + reg = <0x10000 0x10000>;
143 + interrupts = <0 71 0x4>;
146 + sec_jr1: jr@20000 {
147 + compatible = "fsl,sec-v5.4-job-ring",
148 + "fsl,sec-v5.0-job-ring",
149 + "fsl,sec-v4.0-job-ring";
150 + reg = <0x20000 0x10000>;
151 + interrupts = <0 72 0x4>;
154 + sec_jr2: jr@30000 {
155 + compatible = "fsl,sec-v5.4-job-ring",
156 + "fsl,sec-v5.0-job-ring",
157 + "fsl,sec-v4.0-job-ring";
158 + interrupts = <0 73 0x4>;
161 + sec_jr3: jr@40000 {
162 + compatible = "fsl,sec-v5.4-job-ring",
163 + "fsl,sec-v5.0-job-ring",
164 + "fsl,sec-v4.0-job-ring";
165 + reg = <0x40000 0x10000>;
166 + interrupts = <0 74 0x4>;
171 compatible = "fsl,ls1043a-dcfg", "syscon";
172 reg = <0x0 0x1ee0000 0x0 0x10000>;
175 + reset: reset@1EE00B0 {
176 + compatible = "fsl,ls-reset";
177 + reg = <0x0 0x1EE00B0 0x0 0x4>;
181 + rcpm: rcpm@1ee2000 {
182 + compatible = "fsl,ls1043a-rcpm", "fsl,qoriq-rcpm-2.1";
183 + reg = <0x0 0x1ee2000 0x0 0x10000>;
187 compatible = "fsl,ifc", "simple-bus";
188 reg = <0x0 0x1530000 0x0 0x10000>;
194 + compatible = "fsl,qoriq-tmu", "fsl,ls1043a-tmu";
195 + reg = <0x0 0x1f00000 0x0 0x10000>;
196 + interrupts = <0 33 0x4>;
197 + fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
198 + fsl,tmu-calibration = <0x00000000 0x00000026
199 + 0x00000001 0x0000002d
200 + 0x00000002 0x00000032
201 + 0x00000003 0x00000039
202 + 0x00000004 0x0000003f
203 + 0x00000005 0x00000046
204 + 0x00000006 0x0000004d
205 + 0x00000007 0x00000054
206 + 0x00000008 0x0000005a
207 + 0x00000009 0x00000061
208 + 0x0000000a 0x0000006a
209 + 0x0000000b 0x00000071
211 + 0x00010000 0x00000025
212 + 0x00010001 0x0000002c
213 + 0x00010002 0x00000035
214 + 0x00010003 0x0000003d
215 + 0x00010004 0x00000045
216 + 0x00010005 0x0000004e
217 + 0x00010006 0x00000057
218 + 0x00010007 0x00000061
219 + 0x00010008 0x0000006b
220 + 0x00010009 0x00000076
222 + 0x00020000 0x00000029
223 + 0x00020001 0x00000033
224 + 0x00020002 0x0000003d
225 + 0x00020003 0x00000049
226 + 0x00020004 0x00000056
227 + 0x00020005 0x00000061
228 + 0x00020006 0x0000006d
230 + 0x00030000 0x00000021
231 + 0x00030001 0x0000002a
232 + 0x00030002 0x0000003c
233 + 0x00030003 0x0000004e>;
235 + #thermal-sensor-cells = <1>;
239 + cpu_thermal: cpu-thermal {
240 + polling-delay-passive = <1000>;
241 + polling-delay = <5000>;
243 + thermal-sensors = <&tmu 3>;
246 + cpu_alert: cpu-alert {
247 + temperature = <85000>;
248 + hysteresis = <2000>;
251 + cpu_crit: cpu-crit {
252 + temperature = <95000>;
253 + hysteresis = <2000>;
260 + trip = <&cpu_alert>;
262 + <&cpu0 THERMAL_NO_LIMIT
269 dspi0: dspi@2100000 {
270 compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
271 #address-cells = <1>;
276 + qspi: quadspi@1550000 {
277 + compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
278 + #address-cells = <1>;
280 + reg = <0x0 0x1550000 0x0 0x10000>,
281 + <0x0 0x40000000 0x0 0x4000000>;
282 + reg-names = "QuadSPI", "QuadSPI-memory";
283 + interrupts = <0 99 0x4>;
284 + clock-names = "qspi_en", "qspi";
285 + clocks = <&clockgen 4 0>, <&clockgen 4 0>;
287 + status = "disabled";
291 compatible = "fsl,vf610-i2c";
292 #address-cells = <1>;
294 clocks = <&clockgen 4 0>;
297 - gpio1: gpio@2300000 {
298 - compatible = "fsl,ls1043a-gpio";
299 + gpio0: gpio@2300000 {
300 + compatible = "fsl,qoriq-gpio";
301 reg = <0x0 0x2300000 0x0 0x10000>;
302 interrupts = <0 66 0x4>;
305 #interrupt-cells = <2>;
308 - gpio2: gpio@2310000 {
309 - compatible = "fsl,ls1043a-gpio";
310 + gpio1: gpio@2310000 {
311 + compatible = "fsl,qoriq-gpio";
312 reg = <0x0 0x2310000 0x0 0x10000>;
313 interrupts = <0 67 0x4>;
316 #interrupt-cells = <2>;
319 - gpio3: gpio@2320000 {
320 - compatible = "fsl,ls1043a-gpio";
321 + gpio2: gpio@2320000 {
322 + compatible = "fsl,qoriq-gpio";
323 reg = <0x0 0x2320000 0x0 0x10000>;
324 interrupts = <0 68 0x4>;
327 #interrupt-cells = <2>;
330 - gpio4: gpio@2330000 {
331 - compatible = "fsl,ls1043a-gpio";
332 + gpio3: gpio@2330000 {
333 + compatible = "fsl,qoriq-gpio";
334 reg = <0x0 0x2330000 0x0 0x10000>;
335 interrupts = <0 134 0x4>;
338 #interrupt-cells = <2>;
342 + #address-cells = <1>;
344 + device_type = "qe";
345 + compatible = "fsl,qe", "simple-bus";
346 + ranges = <0x0 0x0 0x2400000 0x40000>;
347 + reg = <0x0 0x2400000 0x0 0x480>;
348 + brg-frequency = <100000000>;
349 + bus-frequency = <200000000>;
351 + fsl,qe-num-riscs = <1>;
352 + fsl,qe-num-snums = <28>;
355 + compatible = "fsl,qe-ic";
357 + #address-cells = <0>;
358 + interrupt-controller;
359 + #interrupt-cells = <1>;
360 + interrupts = <0 77 0x04 0 77 0x04>;
364 + #address-cells = <1>;
366 + compatible = "fsl,qe-si";
367 + reg = <0x700 0x80>;
370 + siram1: siram@1000 {
371 + #address-cells = <1>;
373 + compatible = "fsl,qe-siram";
374 + reg = <0x1000 0x800>;
379 + reg = <0x2000 0x200>;
381 + interrupt-parent = <&qeic>;
386 + reg = <0x2200 0x200>;
388 + interrupt-parent = <&qeic>;
392 + #address-cells = <1>;
394 + compatible = "fsl,qe-muram", "fsl,cpm-muram";
395 + ranges = <0x0 0x10000 0x6000>;
398 + compatible = "fsl,qe-muram-data",
399 + "fsl,cpm-muram-data";
400 + reg = <0x0 0x6000>;
405 lpuart0: serial@2950000 {
406 compatible = "fsl,ls1021a-lpuart";
407 reg = <0x0 0x2950000 0x0 0x1000>;
412 + ftm0: ftm0@29d0000 {
413 + compatible = "fsl,ftm-alarm";
414 + reg = <0x0 0x29d0000 0x0 0x10000>;
415 + interrupts = <0 86 0x4>;
417 + rcpm-wakeup = <&rcpm 0x0 0x20000000>;
421 wdog0: wdog@2ad0000 {
422 compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
423 reg = <0x0 0x2ad0000 0x0 0x10000>;
425 reg = <0x0 0x2f00000 0x0 0x10000>;
426 interrupts = <0 60 0x4>;
429 + snps,dis_rxdet_inp3_quirk;
434 reg = <0x0 0x3000000 0x0 0x10000>;
435 interrupts = <0 61 0x4>;
438 + snps,dis_rxdet_inp3_quirk;
443 reg = <0x0 0x3100000 0x0 0x10000>;
444 interrupts = <0 63 0x4>;
447 + snps,dis_rxdet_inp3_quirk;
452 clocks = <&clockgen 4 0>;
455 + qdma: qdma@8380000 {
456 + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
457 + reg = <0x0 0x838f000 0x0 0x11000 /* Controller regs */
458 + 0x0 0x83a0000 0x0 0x40000>; /* Block regs */
459 + interrupts = <0 152 0x4>,
461 + interrupt-names = "qdma-error", "qdma-queue";
464 + status-sizes = <64>;
465 + queue-sizes = <64 64>;
469 msi1: msi-controller1@1571000 {
470 compatible = "fsl,1s1043a-msi";
471 reg = <0x0 0x1571000 0x0 0x4>,
473 #address-cells = <3>;
478 bus-range = <0x0 0xff>;
479 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
481 #address-cells = <3>;
486 bus-range = <0x0 0xff>;
487 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
489 #address-cells = <3>;
494 bus-range = <0x0 0xff>;
495 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
497 alignment = <0 0x1000000>;
500 - size = <0 0x400000>;
501 - alignment = <0 0x400000>;
502 + size = <0 0x800000>;
503 + alignment = <0 0x800000>;
505 qman_pfdr: qman-pfdr {
506 size = <0 0x2000000>;
507 --- a/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
508 +++ b/arch/arm64/boot/dts/freescale/qoriq-qman1-portals.dtsi
510 compatible = "fsl,cgrid-range";
511 fsl,cgrid-range = <0 256>;
515 \ No newline at end of file
517 + compatible = "fsl,qman-ceetm";
518 + fsl,ceetm-lfqid-range = <0xf00000 0x1000>;
519 + fsl,ceetm-sp-range = <0 12>;
520 + fsl,ceetm-lni-range = <0 8>;
521 + fsl,ceetm-channel-range = <0 32>;