kernel: bump 5.4 to 5.4.66
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 701-net-0388-drivers-net-phy-aquantia-Add-XFI-counters.patch
1 From 30da8769107ce2112f3dc356fd06f0fa5bed7742 Mon Sep 17 00:00:00 2001
2 From: Alex Marginean <alexandru.marginean@nxp.com>
3 Date: Mon, 6 Jan 2020 17:57:10 +0200
4 Subject: [PATCH] drivers: net: phy: aquantia: Add XFI counters
5
6 Adds XFI counters and enables counters for AQR112/412. These are gen 3
7 PHYs, the register map is compatible with AQR107 which is gen 2.
8
9 Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
10 ---
11 drivers/net/phy/aquantia_main.c | 27 ++++++++++++++++++++++++---
12 1 file changed, 24 insertions(+), 3 deletions(-)
13
14 --- a/drivers/net/phy/aquantia_main.c
15 +++ b/drivers/net/phy/aquantia_main.c
16 @@ -25,6 +25,12 @@
17 #define PHY_ID_AQR112 0x03a1b662
18 #define PHY_ID_AQR412 0x03a1b712
19
20 +/* PCS counters */
21 +#define MDIO_C45_PCS_STAT_XFI_TX_GOOD_FRAMES 0xc860
22 +#define MDIO_C45_PCS_STAT_XFI_TX_BAD_FRAMES 0xc862
23 +#define MDIO_C45_PCS_STAT_XFI_RX_GOOD_FRAMES 0xe860
24 +#define MDIO_C45_PCS_STAT_XFI_RX_BAD_FRAMES 0xe862
25 +
26 #define MDIO_PHYXS_VEND_IF_STATUS 0xe812
27 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
28 #define MDIO_PHYXS_VEND_IF_STATUS_TYPE_KR 0
29 @@ -153,9 +159,12 @@ struct aqr107_hw_stat {
30 const char *name;
31 int reg;
32 int size;
33 + int devad;
34 };
35
36 -#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s }
37 +#define SGMII_STAT(n, r, s) { n, MDIO_C22EXT_STAT_SGMII_ ## r, s, \
38 + MDIO_MMD_C22EXT}
39 +#define C45_PCS_STAT(n, r, s) { n, MDIO_C45_PCS_STAT_ ## r, s, MDIO_MMD_PCS }
40 static const struct aqr107_hw_stat aqr107_hw_stats[] = {
41 SGMII_STAT("sgmii_rx_good_frames", RX_GOOD_FRAMES, 26),
42 SGMII_STAT("sgmii_rx_bad_frames", RX_BAD_FRAMES, 26),
43 @@ -167,6 +176,10 @@ static const struct aqr107_hw_stat aqr10
44 SGMII_STAT("sgmii_tx_line_collisions", TX_LINE_COLLISIONS, 8),
45 SGMII_STAT("sgmii_tx_frame_alignment_err", TX_FRAME_ALIGN_ERR, 16),
46 SGMII_STAT("sgmii_tx_runt_frames", TX_RUNT_FRAMES, 22),
47 + C45_PCS_STAT("xfi_rx_good_frames", XFI_RX_GOOD_FRAMES, 26),
48 + C45_PCS_STAT("xfi_rx_bad_frames", XFI_RX_BAD_FRAMES, 26),
49 + C45_PCS_STAT("xfi_tx_good_frames", XFI_TX_GOOD_FRAMES, 26),
50 + C45_PCS_STAT("xfi_tx_bad_frames", XFI_TX_BAD_FRAMES, 26),
51 };
52 #define AQR107_SGMII_STAT_SZ ARRAY_SIZE(aqr107_hw_stats)
53
54 @@ -196,13 +209,13 @@ static u64 aqr107_get_stat(struct phy_de
55 u64 ret;
56 int val;
57
58 - val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg);
59 + val = phy_read_mmd(phydev, stat->devad, stat->reg);
60 if (val < 0)
61 return U64_MAX;
62
63 ret = val & GENMASK(len_l - 1, 0);
64 if (len_h) {
65 - val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1);
66 + val = phy_read_mmd(phydev, stat->devad, stat->reg + 1);
67 if (val < 0)
68 return U64_MAX;
69
70 @@ -768,18 +781,26 @@ static struct phy_driver aqr_driver[] =
71 {
72 PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
73 .name = "Aquantia AQR112",
74 + .probe = aqr107_probe,
75 .config_aneg = aqr_config_aneg_set_prot,
76 .config_intr = aqr_config_intr,
77 .ack_interrupt = aqr_ack_interrupt,
78 .read_status = aqr_read_status,
79 + .get_sset_count = aqr107_get_sset_count,
80 + .get_strings = aqr107_get_strings,
81 + .get_stats = aqr107_get_stats,
82 },
83 {
84 PHY_ID_MATCH_MODEL(PHY_ID_AQR412),
85 .name = "Aquantia AQR412",
86 + .probe = aqr107_probe,
87 .config_aneg = aqr_config_aneg_set_prot,
88 .config_intr = aqr_config_intr,
89 .ack_interrupt = aqr_ack_interrupt,
90 .read_status = aqr_read_status,
91 + .get_sset_count = aqr107_get_sset_count,
92 + .get_strings = aqr107_get_strings,
93 + .get_stats = aqr107_get_stats,
94 },
95 };
96