target/linux/layerscape/patches-5.4/813-pm-0005-soc-fsl-handle-RCPM-errata-A-008646-on-SoC-LS1021A.patch

   1 From 12ae7ff3ecb4527ebe30ec6feb29ebb0ec4cd0a7 Mon Sep 17 00:00:00 2001
   2 From: Biwen Li <biwen.li@nxp.com>
   3 Date: Sat, 14 Sep 2019 12:37:49 +0800
   4 Subject: [PATCH] soc: fsl: handle RCPM errata A-008646 on SoC LS1021A
   5
   6 Description:
   7         - Reading configuration register RCPM_IPPDEXPCR1
   8           always return zero
   9
  10 Workaround:
  11         - Save register RCPM_IPPDEXPCR1's value to
  12           register SCFG_SPARECR8.(uboot's psci also
  13           need reading value from the register SCFG_SPARECR8
  14           to set register RCPM_IPPDEXPCR1)
  15
  16 Impact:
  17         - FlexTimer module will cannot wakeup system in
  18           deep sleep on SoC LS1021A
  19
  20 Reviewed-by: Ran Wang <ran.wang_1@nxp.com>
  21 Signed-off-by: Biwen Li <biwen.li@nxp.com>
  22 ---
  23  drivers/soc/fsl/rcpm.c | 47 +++++++++++++++++++++++++++++++++++++++++++++--
  24  1 file changed, 45 insertions(+), 2 deletions(-)
  25
  26 --- a/drivers/soc/fsl/rcpm.c
  27 +++ b/drivers/soc/fsl/rcpm.c
  28 @@ -6,13 +6,16 @@
  29  //
  30  // Author: Ran Wang <ran.wang_1@nxp.com>
  31
  32 +#include <linux/acpi.h>
  33  #include <linux/init.h>
  34 +#include <linux/kernel.h>
  35 +#include <linux/mfd/syscon.h>
  36  #include <linux/module.h>
  37 -#include <linux/platform_device.h>
  38  #include <linux/of_address.h>
  39 +#include <linux/platform_device.h>
  40 +#include <linux/regmap.h>
  41  #include <linux/slab.h>
  42  #include <linux/suspend.h>
  43 -#include <linux/kernel.h>
  44
  45  #define RCPM_WAKEUP_CELL_MAX_SIZE      7
  46
  47 @@ -37,6 +40,9 @@ static int rcpm_pm_prepare(struct device
  48         struct device_node      *np = dev->of_node;
  49         u32 value[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
  50         u32 setting[RCPM_WAKEUP_CELL_MAX_SIZE] = {0};
  51 +       struct regmap *scfg_addr_regmap = NULL;
  52 +       u32 reg_offset[RCPM_WAKEUP_CELL_MAX_SIZE + 1];
  53 +       u32 reg_value = 0;
  54
  55         rcpm = dev_get_drvdata(dev);
  56         if (!rcpm)
  57 @@ -90,6 +96,43 @@ static int rcpm_pm_prepare(struct device
  58                         tmp |= ioread32be(address);
  59                         iowrite32be(tmp, address);
  60                 }
  61 +               /*
  62 +                * Workaround of errata A-008646 on SoC LS1021A:
  63 +                * There is a bug of register ippdexpcr1.
  64 +                * Reading configuration register RCPM_IPPDEXPCR1
  65 +                * always return zero. So save ippdexpcr1's value
  66 +                * to register SCFG_SPARECR8.And the value of
  67 +                * ippdexpcr1 will be read from SCFG_SPARECR8.
  68 +                */
  69 +               if (device_property_present(dev, "fsl,ippdexpcr1-alt-addr")) {
  70 +                       if (dev_of_node(dev)) {
  71 +                               scfg_addr_regmap = syscon_regmap_lookup_by_phandle(np,
  72 +                                                                                  "fsl,ippdexpcr1-alt-addr");
  73 +                       } else if (is_acpi_node(dev->fwnode)) {
  74 +                               dev_err(dev, "not support acpi for rcpm\n");
  75 +                               continue;
  76 +                       }
  77 +
  78 +                       if (scfg_addr_regmap && (i == 1)) {
  79 +                               if (device_property_read_u32_array(dev,
  80 +                                   "fsl,ippdexpcr1-alt-addr",
  81 +                                   reg_offset,
  82 +                                   1 + sizeof(u64)/sizeof(u32))) {
  83 +                                       scfg_addr_regmap = NULL;
  84 +                                       continue;
  85 +                               }
  86 +                               /* Read value from register SCFG_SPARECR8 */
  87 +                               regmap_read(scfg_addr_regmap,
  88 +                                           (u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
  89 +                                           reg_offset[2])) & 0xffffffff),
  90 +                                           &reg_value);
  91 +                               /* Write value to register SCFG_SPARECR8 */
  92 +                               regmap_write(scfg_addr_regmap,
  93 +                                            (u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
  94 +                                            reg_offset[2])) & 0xffffffff),
  95 +                                            tmp | reg_value);
  96 +                       }
  97 +               }
  98         }
  99
 100         return 0;