target/linux/layerscape/patches-5.4/902-layerscape_improve_support_of_LS1012A-FRDM.patch

   1 From 12de4b5e7cbcd193d5abb753ca511fe8f2236846 Mon Sep 17 00:00:00 2001
   2 From: Pawel Dembicki <paweldembicki@gmail.com>
   3 Date: Fri, 13 Nov 2020 07:30:03 +0100
   4 Subject: [PATCH 2/2] arm64: dts: fsl-ls1012a-frdm: add spi-uart device
   5
   6 This patch adds spi-uart controller  to LS1012A-FRDM board dts.
   7 Device is equipped in SC16IS740 from NXP.
   8
   9 Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
  10 ---
  11  .../boot/dts/freescale/fsl-ls1012a-frdm.dts   | 21 +++++++++++++++++++
  12  1 file changed, 21 insertions(+)
  13
  14 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
  15 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
  16 @@ -7,6 +7,7 @@
  17   */
  18  /dts-v1/;
  19
  20 +#include <dt-bindings/interrupt-controller/irq.h>
  21  #include "fsl-ls1012a.dtsi"
  22
  23  / {
  24 @@ -16,6 +17,7 @@
  25         aliases {
  26                 ethernet0 = &pfe_mac0;
  27                 ethernet1 = &pfe_mac1;
  28 +               serial0 = &duart0;
  29         };
  30
  31         sys_mclk: clock-mclk {
  32 @@ -61,6 +63,26 @@
  33                 };
  34         };
  35  };
  36 +
  37 +&dspi {
  38 +       status = "okay";
  39 +       bus-num = <0>;
  40 +
  41 +       serial@0 {
  42 +               reg = <0>;
  43 +               compatible = "nxp,sc16is740";
  44 +               spi-max-frequency = <4000000>;
  45 +               clocks = <&sc16is7xx_clk>;
  46 +               interrupt-parent = <&gpio1>;
  47 +               interrupts = <13 IRQ_TYPE_EDGE_FALLING>;
  48 +
  49 +               sc16is7xx_clk: sc16is7xx_clk {
  50 +                       compatible = "fixed-clock";
  51 +                       #clock-cells = <0>;
  52 +                       clock-frequency = <24000000>;
  53 +               };
  54 +       };
  55 +};
  56
  57  &duart0 {
  58         status = "okay";