mediatek: correct address of MT753x switch IC
[openwrt/openwrt.git] / target / linux / mediatek / dts / mt7622-xiaomi-redmi-router-ax6s.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 #include "mt7622.dtsi"
9 #include "mt6380.dtsi"
10
11 / {
12 model = "Xiaomi Redmi Router AX6S";
13 compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622";
14
15 aliases {
16 serial0 = &uart0;
17 led-boot = &led_power_amber;
18 led-failsafe = &led_power_amber;
19 led-running = &led_power_blue;
20 led-upgrade = &led_power_blue;
21 };
22
23 chosen {
24 stdout-path = "serial0:115200n8";
25 rootdisk = <&ubi_rootfs>;
26 bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 ubi.block=0,fit root=/dev/fit0";
27 };
28
29 memory {
30 reg = <0 0x40000000 0 0x8000000>;
31 };
32
33 leds {
34 compatible = "gpio-leds";
35
36 led_power_blue: power_blue {
37 function = LED_FUNCTION_POWER;
38 color = <LED_COLOR_ID_BLUE>;
39 gpios = <&pio 18 GPIO_ACTIVE_LOW>;
40 };
41
42 led_power_amber: power_amber {
43 function = LED_FUNCTION_POWER;
44 color = <LED_COLOR_ID_AMBER>;
45 gpios = <&pio 17 GPIO_ACTIVE_LOW>;
46 };
47
48 led_net_blue: net_blue {
49 label = "blue:net";
50 gpios = <&pio 01 GPIO_ACTIVE_LOW>;
51 };
52
53 led_net_amber: net_amber {
54 label = "amber:net";
55 gpios = <&pio 16 GPIO_ACTIVE_LOW>;
56 };
57
58 };
59
60 keys {
61 compatible = "gpio-keys";
62
63 reset {
64 label = "reset";
65 gpios = <&pio 0 GPIO_ACTIVE_LOW>;
66 linux,code = <KEY_RESTART>;
67 };
68
69 mesh {
70 label = "mesh";
71 gpios = <&pio 102 GPIO_ACTIVE_LOW>;
72 linux,code = <BTN_9>;
73 linux,input-type = <EV_SW>;
74 };
75 };
76 };
77
78 &cpu0 {
79 proc-supply = <&mt6380_vcpu_reg>;
80 sram-supply = <&mt6380_vm_reg>;
81 };
82
83 &cpu1 {
84 proc-supply = <&mt6380_vcpu_reg>;
85 sram-supply = <&mt6380_vm_reg>;
86 };
87
88 &pio {
89 eth_pins: eth-pins {
90 mux {
91 function = "eth";
92 groups = "mdc_mdio", "rgmii_via_gmac2";
93 };
94 };
95
96 pcie0_pins: pcie0-pins {
97 mux {
98 function = "pcie";
99 groups = "pcie0_pad_perst",
100 "pcie0_1_waken",
101 "pcie0_1_clkreq";
102 };
103 };
104
105 pmic_bus_pins: pmic-bus-pins {
106 mux {
107 function = "pmic";
108 groups = "pmic_bus";
109 };
110 };
111
112 pwm7_pins: pwm1-2-pins {
113 mux {
114 function = "pwm";
115 groups = "pwm_ch7_2";
116 };
117 };
118
119 /* Serial NAND is shared pin with SPI-NOR */
120 serial_nand_pins: serial-nand-pins {
121 mux {
122 function = "flash";
123 groups = "snfi";
124 };
125 };
126
127 uart0_pins: uart0-pins {
128 mux {
129 function = "uart";
130 groups = "uart0_0_tx_rx" ;
131 };
132 };
133
134 watchdog_pins: watchdog-pins {
135 mux {
136 function = "watchdog";
137 groups = "watchdog";
138 };
139 };
140 };
141
142 &eth {
143 pinctrl-names = "default";
144 pinctrl-0 = <&eth_pins>;
145 status = "okay";
146
147 gmac0: mac@0 {
148 compatible = "mediatek,eth-mac";
149 reg = <0>;
150
151 phy-connection-type = "2500base-x";
152
153 nvmem-cells = <&macaddr_factory_4 (-1)>;
154 nvmem-cell-names = "mac-address";
155
156 fixed-link {
157 speed = <2500>;
158 full-duplex;
159 pause;
160 };
161 };
162
163 mdio-bus {
164 #address-cells = <1>;
165 #size-cells = <0>;
166
167 switch@1f {
168 compatible = "mediatek,mt7531";
169 reg = <31>;
170 interrupt-controller;
171 #interrupt-cells = <1>;
172 interrupt-parent = <&pio>;
173 interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
174 reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
175
176 ports {
177 #address-cells = <1>;
178 #size-cells = <0>;
179
180 wan: port@1 {
181 reg = <1>;
182 label = "wan";
183 };
184
185 port@2 {
186 reg = <2>;
187 label = "lan1";
188 };
189
190 port@3 {
191 reg = <3>;
192 label = "lan2";
193 };
194
195 port@4 {
196 reg = <4>;
197 label = "lan3";
198 };
199
200 port@6 {
201 reg = <6>;
202 ethernet = <&gmac0>;
203 phy-mode = "2500base-x";
204
205 fixed-link {
206 speed = <2500>;
207 full-duplex;
208 pause;
209 };
210 };
211 };
212 };
213 };
214 };
215
216 &bch {
217 status = "okay";
218 };
219
220 &snfi {
221 pinctrl-names = "default";
222 pinctrl-0 = <&serial_nand_pins>;
223 status = "okay";
224
225 flash@0 {
226 compatible = "spi-nand";
227 reg = <0>;
228 spi-tx-bus-width = <4>;
229 spi-rx-bus-width = <4>;
230 nand-ecc-engine = <&snfi>;
231
232 mediatek,bmt-v2;
233 mediatek,bmt-table-size = <0x1000>;
234 mediatek,bmt-remap-range = <0x0 0x340000>;
235
236 partitions {
237 compatible = "fixed-partitions";
238 #address-cells = <1>;
239 #size-cells = <1>;
240
241 partition@0 {
242 label = "Preloader";
243 reg = <0x0 0x80000>;
244 read-only;
245 };
246
247 partition@80000 {
248 label = "ATF";
249 reg = <0x80000 0x40000>;
250 read-only;
251 };
252
253 partition@c0000 {
254 label = "u-boot";
255 reg = <0xc0000 0x80000>;
256 read-only;
257 };
258
259 partition@140000 {
260 label = "u-boot-env";
261 reg = <0x140000 0x40000>;
262 };
263
264 partition@180000 {
265 label = "bdata";
266 reg = <0x180000 0x40000>;
267 };
268
269 factory: partition@1c0000 {
270 label = "factory";
271 reg = <0x1c0000 0x80000>;
272 read-only;
273
274 nvmem-layout {
275 compatible = "fixed-layout";
276 #address-cells = <1>;
277 #size-cells = <1>;
278
279 macaddr_factory_4: macaddr@4 {
280 compatible = "mac-base";
281 reg = <0x4 0x6>;
282 #nvmem-cell-cells = <1>;
283 };
284 };
285 };
286
287 partition@240000 {
288 label = "crash";
289 reg = <0x240000 0x40000>;
290 read-only;
291 };
292
293 partition@280000 {
294 label = "crash_log";
295 reg = <0x280000 0x40000>;
296 read-only;
297 };
298
299 partition@2c0000 {
300 label = "ubi-loader";
301 reg = <0x2c0000 0x80000>;
302 };
303
304 /* ubi partition is the result of squashing
305 * consecutive stock partitions:
306 * - firmware (partially)
307 * - firmware1
308 * - overlay
309 * - obr
310 */
311 partition@340000 {
312 label = "ubi";
313 reg = <0x340000 0x7280000>;
314 compatible = "linux,ubi";
315
316 volumes {
317 ubi_rootfs: ubi-volume-fit {
318 volname = "fit";
319 };
320 };
321 };
322 };
323 };
324 };
325
326 &pcie0 {
327 pinctrl-names = "default";
328 pinctrl-0 = <&pcie0_pins>;
329 status = "okay";
330 };
331
332 &slot0 {
333 status = "okay";
334
335 wifi@0,0 {
336 compatible = "mediatek,mt76";
337 reg = <0x0000 0 0 0 0>;
338 mediatek,mtd-eeprom = <&factory 0x5000>;
339 ieee80211-freq-limit = <5000000 6000000>;
340 mediatek,disable-radar-background;
341 };
342 };
343
344 &pwm {
345 pinctrl-names = "default";
346 pinctrl-0 = <&pwm7_pins>;
347 status = "okay";
348 };
349
350 &pwrap {
351 pinctrl-names = "default";
352 pinctrl-0 = <&pmic_bus_pins>;
353 status = "okay";
354 };
355
356 &rtc {
357 status = "disabled";
358 };
359
360 &uart0 {
361 pinctrl-names = "default";
362 pinctrl-0 = <&uart0_pins>;
363 status = "okay";
364 };
365
366 &watchdog {
367 pinctrl-names = "default";
368 pinctrl-0 = <&watchdog_pins>;
369 status = "okay";
370 };
371
372 &wmac {
373 status = "okay";
374
375 mediatek,mtd-eeprom = <&factory 0x0>;
376 };