1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018 Kristian Evensen <kristian.evensen@gmail.com>
6 #include <dt-bindings/input/input.h>
11 compatible = "unielec,u7623-02", "mediatek,mt7623";
17 led-boot = &led3_green;
18 led-failsafe = &led3_green;
19 led-running = &led3_green;
20 led-upgrade = &led3_green;
24 stdout-path = "serial0:115200n8";
29 proc-supply = <&mt6323_vproc_reg>;
33 proc-supply = <&mt6323_vproc_reg>;
37 proc-supply = <&mt6323_vproc_reg>;
41 proc-supply = <&mt6323_vproc_reg>;
45 reg_1p8v: regulator-1p8v {
46 compatible = "regulator-fixed";
47 regulator-name = "fixed-1.8V";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
54 reg_3p3v: regulator-3p3v {
55 compatible = "regulator-fixed";
56 regulator-name = "fixed-3.3V";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
63 reg_5v: regulator-5v {
64 compatible = "regulator-fixed";
65 regulator-name = "fixed-5V";
66 regulator-min-microvolt = <5000000>;
67 regulator-max-microvolt = <5000000>;
73 compatible = "gpio-keys";
74 pinctrl-names = "default";
75 pinctrl-0 = <&key_pins_a>;
79 linux,code = <KEY_RESTART>;
80 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
85 compatible = "gpio-leds";
86 pinctrl-names = "default";
87 pinctrl-0 = <&led_pins_unielec>;
90 label = "u7623-01:green:led3";
91 gpios = <&pio 14 GPIO_ACTIVE_LOW>;
95 label = "u7623-01:green:led4";
96 gpios = <&pio 15 GPIO_ACTIVE_LOW>;
109 compatible = "mediatek,eth-mac";
121 #address-cells = <1>;
125 compatible = "mediatek,mt7530";
131 compatible = "mediatek,mt7530";
132 #address-cells = <1>;
135 pinctrl-names = "default";
137 resets = <ðsys 2>;
139 core-supply = <&mt6323_vpa_reg>;
140 io-supply = <&mt6323_vemc3v3_reg>;
142 dsa,mii-bus = <&mdio>;
145 #address-cells = <1>;
193 pinctrl-names = "default", "state_uhs";
194 pinctrl-0 = <&mmc0_pins_default>;
195 pinctrl-1 = <&mmc0_pins_uhs>;
198 max-frequency = <50000000>;
200 vmmc-supply = <®_3p3v>;
201 vqmmc-supply = <®_1p8v>;
206 key_pins_a: keys-alt {
208 pinmux = <MT7623_PIN_256_GPIO256_FUNC_GPIO256>,
209 <MT7623_PIN_257_GPIO257_FUNC_GPIO257>;
214 led_pins_unielec: leds-unielec {
216 pinmux = <MT7623_PIN_14_GPIO14_FUNC_GPIO14>,
217 <MT7623_PIN_15_GPIO15_FUNC_GPIO15>;
221 mmc0_pins_default: mmc0default {
223 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
224 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
225 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
226 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
227 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
228 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
229 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
230 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
231 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
237 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
242 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
247 mmc0_pins_uhs: mmc0 {
249 pinmux = <MT7623_PIN_111_MSDC0_DAT7_FUNC_MSDC0_DAT7>,
250 <MT7623_PIN_112_MSDC0_DAT6_FUNC_MSDC0_DAT6>,
251 <MT7623_PIN_113_MSDC0_DAT5_FUNC_MSDC0_DAT5>,
252 <MT7623_PIN_114_MSDC0_DAT4_FUNC_MSDC0_DAT4>,
253 <MT7623_PIN_118_MSDC0_DAT3_FUNC_MSDC0_DAT3>,
254 <MT7623_PIN_119_MSDC0_DAT2_FUNC_MSDC0_DAT2>,
255 <MT7623_PIN_120_MSDC0_DAT1_FUNC_MSDC0_DAT1>,
256 <MT7623_PIN_121_MSDC0_DAT0_FUNC_MSDC0_DAT0>,
257 <MT7623_PIN_116_MSDC0_CMD_FUNC_MSDC0_CMD>;
259 drive-strength = <MTK_DRIVE_2mA>;
260 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
264 pinmux = <MT7623_PIN_117_MSDC0_CLK_FUNC_MSDC0_CLK>;
265 drive-strength = <MTK_DRIVE_2mA>;
266 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
270 pinmux = <MT7623_PIN_115_MSDC0_RSTB_FUNC_MSDC0_RSTB>;
275 pcie_default: pcie_pin_default {
277 pinmux = <MT7623_PIN_208_AUD_EXT_CK1_FUNC_PCIE0_PERST_N>,
278 <MT7623_PIN_209_AUD_EXT_CK2_FUNC_PCIE1_PERST_N>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pwm_pins_a>;
293 compatible = "mediatek,mt6323-led";
294 #address-cells = <1>;
306 mediatek,long-press-mode = <0>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&uart2_pins_b>;
316 vusb33-supply = <®_3p3v>;
317 vbus-supply = <®_3p3v>;
327 mediatek,phy-switch = <&hifsys>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&pcie_default>;