7445b610dcc43342edb8e4bba1db8962c53bf3a6
[openwrt/openwrt.git] / target / linux / mediatek / dts / mt7981a-comfast-cf-e393ax.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4 #include "mt7981.dtsi"
5
6 / {
7 model = "COMFAST CF-E393AX";
8 compatible = "comfast,cf-e393ax", "mediatek,mt7981";
9
10 aliases {
11 serial0 = &uart0;
12 led-boot = &led_red;
13 led-failsafe = &led_red;
14 led-running = &led_blue;
15 led-upgrade = &led_green;
16 };
17
18 chosen {
19 bootargs-override = "console=ttyS0,115200n8";
20 stdout-path = "serial0:115200n8";
21 };
22
23 memory {
24 reg = <0 0x40000000 0 0x10000000>; // 256mb
25 };
26
27 gpio-keys {
28 compatible = "gpio-keys";
29
30 reset {
31 label = "reset";
32 linux,code = <KEY_RESTART>;
33 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
34 };
35 };
36
37 leds {
38 compatible = "gpio-leds";
39
40 led_blue: blue {
41 label = "blue:status";
42 gpios = <&pio 8 GPIO_ACTIVE_LOW>;
43 color = <LED_COLOR_ID_BLUE>;
44 function = LED_FUNCTION_STATUS;
45 };
46
47 led_red: red {
48 label = "red:status";
49 gpios = <&pio 34 GPIO_ACTIVE_LOW>;
50 color = <LED_COLOR_ID_RED>;
51 function = LED_FUNCTION_STATUS;
52 };
53
54 led_green: green {
55 label = "green:status";
56 gpios = <&pio 35 GPIO_ACTIVE_LOW>;
57 color = <LED_COLOR_ID_GREEN>;
58 function = LED_FUNCTION_STATUS;
59 };
60 };
61 };
62
63 &eth {
64 status = "okay";
65
66 gmac0: mac@0 {
67 /* LAN */
68 compatible = "mediatek,eth-mac";
69 reg = <0>;
70 phy-mode = "2500base-x";
71 nvmem-cells = <&macaddr_factory_e000 0>;
72 nvmem-cell-names = "mac-address";
73
74 fixed-link {
75 speed = <2500>;
76 full-duplex;
77 pause;
78 };
79 };
80
81 gmac1: mac@1 {
82 /* WAN */
83 compatible = "mediatek,eth-mac";
84 reg = <1>;
85 phy-mode = "gmii";
86 phy-handle = <&int_gbe_phy>;
87 nvmem-cells = <&macaddr_factory_e000 1>;
88 nvmem-cell-names = "mac-address";
89 };
90 };
91
92 &mdio_bus {
93 switch: switch@1f {
94 compatible = "mediatek,mt7531";
95 reg = <31>;
96 interrupt-controller;
97 #interrupt-cells = <1>;
98 interrupt-parent = <&pio>;
99 interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
100 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
101 };
102 };
103
104 &crypto {
105 status = "okay";
106 };
107
108 &pio {
109 spi0_flash_pins: spi0-pins {
110 mux {
111 function = "spi";
112 groups = "spi0", "spi0_wp_hold";
113 };
114 conf-pu {
115 pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
116 drive-strength = <MTK_DRIVE_8mA>;
117 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
118 };
119 conf-pd {
120 pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
121 drive-strength = <MTK_DRIVE_8mA>;
122 bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
123 };
124 };
125
126 };
127
128 &spi0 {
129 pinctrl-names = "default";
130 pinctrl-0 = <&spi0_flash_pins>;
131 cs-gpios = <0>, <0>;
132 #address-cells = <1>;
133 #size-cells = <0>;
134 status = "okay";
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 spi_nand: spi_nand@0 {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 compatible = "spi-nand";
142 reg = <1>;
143 spi-max-frequency = <52000000>;
144
145 spi-cal-enable;
146 spi-cal-mode = "read-data";
147 spi-cal-datalen = <7>;
148 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
149 spi-cal-addrlen = <5>;
150 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
151
152 spi-tx-bus-width = <4>;
153 spi-rx-bus-width = <4>;
154 mediatek,nmbm;
155 mediatek,bmt-max-ratio = <1>;
156 mediatek,bmt-max-reserved-blocks = <64>;
157
158 partitions {
159 compatible = "fixed-partitions";
160 #address-cells = <1>;
161 #size-cells = <1>;
162
163 partition@0 {
164 label = "BL2";
165 reg = <0x00000 0x0100000>;
166 read-only;
167 };
168
169 partition@100000 {
170 label = "u-boot-env";
171 reg = <0x0100000 0x0080000>;
172 read-only;
173 };
174
175 factory: partition@180000 {
176 label = "Factory";
177 reg = <0x180000 0x0200000>;
178 read-only;
179
180 nvmem-layout {
181 compatible = "fixed-layout";
182 #address-cells = <1>;
183 #size-cells = <1>;
184
185 eeprom_factory_0: eeprom@0 {
186 reg = <0x0 0x1000>;
187 };
188
189 macaddr_factory_e000: macaddr@e000 {
190 compatible = "mac-base";
191 reg = <0xe000 0x6>;
192 #nvmem-cell-cells = <1>;
193 };
194 };
195 };
196
197 partition@380000 {
198 label = "FIP";
199 reg = <0x380000 0x0200000>;
200 read-only;
201 };
202
203 partition@580000 {
204 label = "ubi";
205 reg = <0x580000 0x4000000>;
206 compatible = "linux,ubi";
207 };
208 };
209 };
210 };
211
212 &switch {
213 ports {
214 #address-cells = <1>;
215 #size-cells = <0>;
216
217 port@0 {
218 reg = <0>;
219 label = "lan1";
220 };
221
222 port@6 {
223 reg = <6>;
224 label = "cpu";
225 ethernet = <&gmac0>;
226 phy-mode = "2500base-x";
227
228 fixed-link {
229 speed = <2500>;
230 full-duplex;
231 pause;
232 };
233 };
234 };
235 };
236
237 &uart0 {
238 status = "okay";
239 };
240
241 &watchdog {
242 status = "okay";
243 };
244
245 &wifi {
246 status = "okay";
247 nvmem-cells = <&eeprom_factory_0>;
248 nvmem-cell-names = "eeprom";
249 };
250