8f4dc23fb4b5949d9b45aca89c52a8a7c8d6c729
[openwrt/openwrt.git] / target / linux / mediatek / dts / mt7981b-confiabits-mt7981.dts
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
2 /dts-v1/;
3
4 #include "mt7981.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 model = "Confiabits MT7981";
11 compatible = "confiabits,mt7981", "mediatek,mt7981";
12
13 aliases {
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-running = &led_power;
17 led-upgrade = &led_power;
18 serial0 = &uart0;
19 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 };
24
25 gpio-keys {
26 compatible = "gpio-keys";
27
28 button-mesh {
29 label = "mesh";
30 linux,input-type = <EV_SW>;
31 linux,code = <BTN_0>;
32 gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
33 debounce-interval = <60>;
34 };
35
36 button-reset {
37 label = "reset";
38 linux,code = <KEY_RESTART>;
39 gpios = <&pio 1 GPIO_ACTIVE_LOW>;
40 };
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led-wlan5g {
47 color = <LED_COLOR_ID_RED>;
48 function = LED_FUNCTION_WLAN;
49 function-enumerator = <5>;
50 gpios = <&pio 5 GPIO_ACTIVE_LOW>;
51 linux,default-trigger = "phy1tpt";
52 };
53
54 led-wan-red {
55 color = <LED_COLOR_ID_RED>;
56 function = LED_FUNCTION_WAN;
57 gpios = <&pio 6 GPIO_ACTIVE_LOW>;
58 };
59
60 led_power: led-power {
61 label = "blue:power"; // can be removed once #13837 is merged
62 color = <LED_COLOR_ID_BLUE>;
63 function = LED_FUNCTION_POWER;
64 gpios = <&pio 7 GPIO_ACTIVE_LOW>;
65 };
66
67 led-lan1 {
68 color = <LED_COLOR_ID_BLUE>;
69 function = LED_FUNCTION_LAN;
70 function-enumerator = <1>;
71 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
72 };
73
74 led-lan2 {
75 color = <LED_COLOR_ID_BLUE>;
76 function = LED_FUNCTION_LAN;
77 function-enumerator = <2>;
78 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
79 };
80
81 led-lan3 {
82 color = <LED_COLOR_ID_BLUE>;
83 function = LED_FUNCTION_LAN;
84 function-enumerator = <3>;
85 gpios = <&pio 11 GPIO_ACTIVE_LOW>;
86 };
87
88 led-wan-blue {
89 color = <LED_COLOR_ID_BLUE>;
90 function = LED_FUNCTION_WAN;
91 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
92 };
93
94 led-wlan2g {
95 color = <LED_COLOR_ID_RED>;
96 function = LED_FUNCTION_WLAN;
97 function-enumerator = <2>;
98 gpios = <&pio 34 GPIO_ACTIVE_LOW>;
99 linux,default-trigger = "phy0tpt";
100 };
101
102 led-mesh {
103 color = <LED_COLOR_ID_BLUE>;
104 function = "mesh"; // no LED_FUNCTION_MESH yet
105 gpios = <&pio 35 GPIO_ACTIVE_LOW>;
106 };
107 };
108 };
109
110 &uart0 {
111 status = "okay";
112 };
113
114 &watchdog {
115 status = "okay";
116 };
117
118 &eth {
119 pinctrl-names = "default";
120 pinctrl-0 = <&mdio_pins>;
121
122 status = "okay";
123
124 gmac0: mac@0 {
125 compatible = "mediatek,eth-mac";
126 reg = <0>;
127 phy-mode = "2500base-x";
128
129 nvmem-cell-names = "mac-address";
130 nvmem-cells = <&macaddr_factory_4 0>;
131
132 fixed-link {
133 speed = <2500>;
134 full-duplex;
135 pause;
136 };
137 };
138 };
139
140
141 &mdio_bus {
142 #address-cells = <1>;
143 #size-cells = <0>;
144
145 switch: switch@1f {
146 compatible = "mediatek,mt7531";
147 reg = <31>;
148 reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
149 };
150 };
151
152 &switch {
153 ports {
154 #address-cells = <1>;
155 #size-cells = <0>;
156
157 port@0 {
158 reg = <0>;
159 label = "lan1";
160 };
161
162 port@2 {
163 reg = <2>;
164 label = "lan2";
165 };
166
167 port@3 {
168 reg = <3>;
169 label = "lan3";
170 };
171
172 port@4 {
173 reg = <4>;
174 label = "wan";
175
176 nvmem-cell-names = "mac-address";
177 nvmem-cells = <&macaddr_factory_4 1>;
178 };
179
180 port@6 {
181 reg = <6>;
182 label = "cpu";
183 ethernet = <&gmac0>;
184 phy-mode = "2500base-x";
185
186 fixed-link {
187 speed = <2500>;
188 full-duplex;
189 pause;
190 };
191 };
192 };
193 };
194
195 &spi0 {
196 pinctrl-names = "default";
197 pinctrl-0 = <&spi0_flash_pins>;
198 status = "okay";
199
200 spi_nand: flash@0 {
201 #address-cells = <1>;
202 #size-cells = <1>;
203 compatible = "spi-nand";
204 reg = <0>;
205 spi-max-frequency = <52000000>;
206
207 spi-cal-enable;
208 spi-cal-mode = "read-data";
209 spi-cal-datalen = <7>;
210 spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
211 spi-cal-addrlen = <5>;
212 spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
213
214 spi-tx-bus-width = <4>;
215 spi-rx-bus-width = <4>;
216 mediatek,nmbm;
217 mediatek,bmt-max-ratio = <1>;
218 mediatek,bmt-max-reserved-blocks = <64>;
219
220 partitions {
221 compatible = "fixed-partitions";
222 #address-cells = <1>;
223 #size-cells = <1>;
224
225 partition@0 {
226 label = "BL2";
227 reg = <0x00000 0x0100000>;
228 read-only;
229 };
230
231 partition@100000 {
232 label = "u-boot-env";
233 reg = <0x0100000 0x0080000>;
234 read-only;
235 };
236
237 factory: partition@180000 {
238 label = "Factory";
239 reg = <0x180000 0x0200000>;
240 read-only;
241
242 nvmem-layout {
243 compatible = "fixed-layout";
244 #address-cells = <1>;
245 #size-cells = <1>;
246
247 eeprom_factory_0: eeprom@0 {
248 reg = <0x0 0x1000>;
249 };
250
251 macaddr_factory_4: macaddr@4 {
252 compatible = "mac-base";
253 reg = <0x4 0x6>;
254 #nvmem-cell-cells = <1>;
255 };
256 };
257 };
258
259 partition@380000 {
260 label = "FIP";
261 reg = <0x380000 0x0200000>;
262 read-only;
263 };
264
265 partition@580000 {
266 label = "ubi";
267 reg = <0x580000 0x4000000>;
268 compatible = "linux,ubi";
269 };
270 };
271 };
272 };
273
274 &pio {
275 spi0_flash_pins: spi0-pins {
276 mux {
277 function = "spi";
278 groups = "spi0", "spi0_wp_hold";
279 };
280 };
281
282 };
283
284 &usb_phy {
285 status = "okay";
286 };
287
288 &xhci {
289 status = "okay";
290 mediatek,u3p-dis-msk = <0x1>;
291 };
292
293 &wifi {
294 status = "okay";
295 nvmem-cells = <&eeprom_factory_0>;
296 nvmem-cell-names = "eeprom";
297 };