1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
8 #include "mt7986a.dtsi"
11 model = "ASUS TUF-AX4200";
12 compatible = "asus,tuf-ax4200", "mediatek,mt7986a";
16 led-boot = &led_system;
17 led-failsafe = &led_system;
18 led-running = &led_system;
19 led-upgrade = &led_system;
23 stdout-path = "serial0:115200n8";
24 bootargs-override = "ubi.mtd=UBI_DEV";
28 reg = <0 0x40000000 0 0x20000000>;
32 compatible = "gpio-keys";
36 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
37 linux,code = <KEY_RESTART>;
42 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_WPS_BUTTON>;
48 compatible = "gpio-leds";
51 label = "white:wlan24";
52 gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
53 linux,default-trigger = "phy0tpt";
57 label = "white:wlan5";
58 gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
59 linux,default-trigger = "phy1tpt";
63 label = "white:system";
64 gpios = <&pio 11 GPIO_ACTIVE_HIGH>;
68 function = LED_FUNCTION_WAN;
69 color = <LED_COLOR_ID_RED>;
70 gpios = <&pio 12 GPIO_ACTIVE_LOW>;
74 reg_3p3v: regulator-3p3v {
75 compatible = "regulator-fixed";
76 regulator-name = "fixed-3.3V";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
83 reg_5v: regulator-5v {
84 compatible = "regulator-fixed";
85 regulator-name = "fixed-5V";
86 regulator-min-microvolt = <5000000>;
87 regulator-max-microvolt = <5000000>;
102 compatible = "mediatek,eth-mac";
104 phy-mode = "2500base-x";
115 compatible = "mediatek,eth-mac";
117 phy-mode = "2500base-x";
118 phy-handle = <&phy6>;
122 #address-cells = <1>;
129 compatible = "ethernet-phy-ieee802.3-c45";
132 reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
133 reset-assert-us = <10000>;
134 reset-deassert-us = <10000>;
136 /* LED0: CONN (WAN white) */
137 mxl,led-config = <0x03f0 0x0 0x0 0x0>;
141 compatible = "mediatek,mt7531";
144 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
145 reset-assert-us = <10000>;
146 reset-deassert-us = <10000>;
151 spi_flash_pins: spi-flash-pins-33-to-38 {
154 groups = "spi0", "spi0_wp_hold";
157 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
158 drive-strength = <8>;
159 mediatek,pull-up-adv = <0>; /* bias-disable */
162 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
163 drive-strength = <8>;
164 mediatek,pull-down-adv = <0>; /* bias-disable */
168 wf_2g_5g_pins: wf_2g_5g-pins {
171 groups = "wf_2g", "wf_5g";
174 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
175 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
176 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
177 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
178 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
179 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
180 "WF1_TOP_CLK", "WF1_TOP_DATA";
181 drive-strength = <4>;
185 wf_dbdc_pins: wf-dbdc-pins {
191 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
192 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
193 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
194 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
195 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
196 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
197 "WF1_TOP_CLK", "WF1_TOP_DATA";
198 drive-strength = <4>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&spi_flash_pins>;
208 spi_nand_flash: flash@0 {
209 compatible = "spi-nand";
210 #address-cells = <1>;
214 spi-max-frequency = <20000000>;
215 spi-tx-bus-width = <4>;
216 spi-rx-bus-width = <4>;
218 partitions: partitions {
219 compatible = "fixed-partitions";
220 #address-cells = <1>;
224 label = "bootloader";
225 reg = <0x0 0x400000>;
231 reg = <0x400000 0xfc00000>;
239 #address-cells = <1>;
266 phy-mode = "2500base-x";
277 #address-cells = <1>;
283 mediatek,led-config = <
284 0x21 0x8009 /* BASIC_CTRL */
285 0x22 0x0c00 /* ON_DURATION */
286 0x23 0x1400 /* BLINK_DURATION */
287 0x24 0x8000 /* LED0_ON_CTRL */
288 0x25 0x0000 /* LED0_BLINK_CTRL */
289 0x26 0xc007 /* LED1_ON_CTRL */
290 0x27 0x003f /* LED1_BLINK_CTRL */
297 mediatek,led-config = <
298 0x21 0x8009 /* BASIC_CTRL */
299 0x22 0x0c00 /* ON_DURATION */
300 0x23 0x1400 /* BLINK_DURATION */
301 0x24 0x8000 /* LED0_ON_CTRL */
302 0x25 0x0000 /* LED0_BLINK_CTRL */
303 0x26 0xc007 /* LED1_ON_CTRL */
304 0x27 0x003f /* LED1_BLINK_CTRL */
311 mediatek,led-config = <
312 0x21 0x8009 /* BASIC_CTRL */
313 0x22 0x0c00 /* ON_DURATION */
314 0x23 0x1400 /* BLINK_DURATION */
315 0x24 0x8000 /* LED0_ON_CTRL */
316 0x25 0x0000 /* LED0_BLINK_CTRL */
317 0x26 0xc007 /* LED1_ON_CTRL */
318 0x27 0x003f /* LED1_BLINK_CTRL */
325 mediatek,led-config = <
326 0x21 0x8009 /* BASIC_CTRL */
327 0x22 0x0c00 /* ON_DURATION */
328 0x23 0x1400 /* BLINK_DURATION */
329 0x24 0x8000 /* LED0_ON_CTRL */
330 0x25 0x0000 /* LED0_BLINK_CTRL */
331 0x26 0xc007 /* LED1_ON_CTRL */
332 0x27 0x003f /* LED1_BLINK_CTRL */
344 pinctrl-names = "default", "dbdc";
345 pinctrl-0 = <&wf_2g_5g_pins>;
346 pinctrl-1 = <&wf_dbdc_pins>;
358 vusb33-supply = <®_3p3v>;
359 vbus-supply = <®_5v>;