1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/gpio/gpio.h>
7 #include "mt7986a.dtsi"
10 model = "Xiaomi Redmi Router AX6000";
11 compatible = "xiaomi,redmi-router-ax6000", "mediatek,mt7986a";
18 stdout-path = "serial0:115200n8";
22 reg = <0 0x40000000 0 0x20000000>;
26 compatible = "gpio-keys";
30 gpios = <&pio 9 GPIO_ACTIVE_LOW>;
31 linux,code = <KEY_RESTART>;
36 gpios = <&pio 10 GPIO_ACTIVE_LOW>;
38 linux,input-type = <EV_SW>;
47 compatible = "mediatek,eth-mac";
49 phy-mode = "2500base-x";
51 nvmem-cells = <&macaddr_factory_4>;
52 nvmem-cell-names = "mac-address";
53 mac-address-increment = <(-1)>;
70 compatible = "mediatek,mt7531";
72 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
74 #interrupt-cells = <1>;
75 interrupt-parent = <&pio>;
76 interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
81 spi_flash_pins: spi-flash-pins-33-to-38 {
84 groups = "spi0", "spi0_wp_hold";
87 pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
89 mediatek,pull-up-adv = <0>; /* bias-disable */
92 pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
94 mediatek,pull-down-adv = <0>; /* bias-disable */
98 wf_2g_5g_pins: wf_2g_5g-pins {
101 groups = "wf_2g", "wf_5g";
104 pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
105 "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
106 "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
107 "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
108 "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
109 "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
110 "WF1_TOP_CLK", "WF1_TOP_DATA";
111 drive-strength = <4>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&spi_flash_pins>;
123 compatible = "spi-nand";
124 #address-cells = <1>;
129 mediatek,bmt-max-ratio = <1>;
130 mediatek,bmt-max-reserved-blocks = <64>;
132 spi-max-frequency = <20000000>;
133 spi-tx-buswidth = <4>;
134 spi-rx-buswidth = <4>;
137 compatible = "fixed-partitions";
138 #address-cells = <1>;
143 reg = <0x0 0x100000>;
149 reg = <0x100000 0x40000>;
154 reg = <0x140000 0x40000>;
157 factory: partition@180000 {
159 reg = <0x180000 0x200000>;
162 compatible = "nvmem-cells";
163 #address-cells = <1>;
166 macaddr_factory_4: macaddr@4 {
173 reg = <0x380000 0x200000>;
179 reg = <0x580000 0x40000>;
185 reg = <0x5c0000 0x40000>;
189 /* ubi partition is the result of squashing
190 * consecutive stock partitions:
197 reg = <0x600000 0x6e00000>;
200 /* last 12 MiB is reserved for NMBM bad block table */
207 #address-cells = <1>;
234 phy-mode = "2500base-x";
247 pinctrl-names = "default";
248 pinctrl-0 = <&wf_2g_5g_pins>;
250 mediatek,mtd-eeprom = <&factory 0x0>;