1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2020 MediaTek Inc. All Rights Reserved.
5 * Author: Weijie Gao <weijie.gao@mediatek.com>
8 #include "mtk-snand-def.h"
11 #define ECC_ENCCON 0x000
14 #define ECC_ENCCNFG 0x004
16 #define ENC_BURST_EN BIT(8)
19 #define ECC_ENCIDLE 0x00c
20 #define ENC_IDLE BIT(0)
22 #define ECC_DECCON 0x100
25 #define ECC_DECCNFG 0x104
26 #define DEC_EMPTY_EN BIT(31)
29 #define DEC_CON_CORRECT 3
30 #define DEC_BURST_EN BIT(8)
33 #define ECC_DECIDLE 0x10c
34 #define DEC_IDLE BIT(0)
36 #define ECC_DECENUM0 0x114
37 #define ECC_DECENUM(n) (ECC_DECENUM0 + (n) * 4)
39 /* ECC_ENCIDLE & ECC_DECIDLE */
40 #define ECC_IDLE BIT(0)
42 /* ENC_MODE & DEC_MODE */
43 #define ECC_MODE_NFI 1
45 #define ECC_TIMEOUT 500000
47 static const uint8_t mt7622_ecc_caps
[] = { 4, 6, 8, 10, 12 };
49 static const uint32_t mt7622_ecc_regs
[] = {
50 [ECC_DECDONE
] = 0x11c,
53 static const struct mtk_ecc_soc_data mtk_ecc_socs
[__SNAND_SOC_MAX
] = {
54 [SNAND_SOC_MT7622
] = {
55 .ecc_caps
= mt7622_ecc_caps
,
56 .num_ecc_cap
= ARRAY_SIZE(mt7622_ecc_caps
),
57 .regs
= mt7622_ecc_regs
,
62 [SNAND_SOC_MT7629
] = {
63 .ecc_caps
= mt7622_ecc_caps
,
64 .num_ecc_cap
= ARRAY_SIZE(mt7622_ecc_caps
),
65 .regs
= mt7622_ecc_regs
,
72 static inline uint32_t ecc_read32(struct mtk_snand
*snf
, uint32_t reg
)
74 return readl(snf
->ecc_base
+ reg
);
77 static inline void ecc_write32(struct mtk_snand
*snf
, uint32_t reg
,
80 writel(val
, snf
->ecc_base
+ reg
);
83 static inline void ecc_write16(struct mtk_snand
*snf
, uint32_t reg
,
86 writew(val
, snf
->ecc_base
+ reg
);
89 static int mtk_ecc_poll(struct mtk_snand
*snf
, uint32_t reg
, uint32_t bits
)
93 return read16_poll_timeout(snf
->ecc_base
+ reg
, val
, (val
& bits
), 0,
97 static int mtk_ecc_wait_idle(struct mtk_snand
*snf
, uint32_t reg
)
101 ret
= mtk_ecc_poll(snf
, reg
, ECC_IDLE
);
103 snand_log_ecc(snf
->pdev
, "ECC engine is busy\n");
110 int mtk_ecc_setup(struct mtk_snand
*snf
, void *fmdaddr
, uint32_t max_ecc_bytes
,
113 uint32_t i
, val
, ecc_msg_bits
, ecc_strength
;
116 snf
->ecc_soc
= &mtk_ecc_socs
[snf
->soc
];
118 snf
->ecc_parity_bits
= fls(1 + 8 * msg_size
);
119 ecc_strength
= max_ecc_bytes
* 8 / snf
->ecc_parity_bits
;
121 for (i
= snf
->ecc_soc
->num_ecc_cap
- 1; i
>= 0; i
--) {
122 if (snf
->ecc_soc
->ecc_caps
[i
] <= ecc_strength
)
126 if (unlikely(i
< 0)) {
127 snand_log_ecc(snf
->pdev
, "Page size %u+%u is not supported\n",
128 snf
->writesize
, snf
->oobsize
);
132 snf
->ecc_strength
= snf
->ecc_soc
->ecc_caps
[i
];
133 snf
->ecc_bytes
= DIV_ROUND_UP(snf
->ecc_strength
* snf
->ecc_parity_bits
,
137 ecc_write16(snf
, ECC_ENCCON
, 0);
138 ret
= mtk_ecc_wait_idle(snf
, ECC_ENCIDLE
);
142 ecc_msg_bits
= msg_size
* 8;
143 val
= (ecc_msg_bits
<< ENC_MS_S
) |
144 (ECC_MODE_NFI
<< snf
->ecc_soc
->mode_shift
) | i
;
145 ecc_write32(snf
, ECC_ENCCNFG
, val
);
148 ecc_write16(snf
, ECC_DECCON
, 0);
149 ret
= mtk_ecc_wait_idle(snf
, ECC_DECIDLE
);
153 ecc_msg_bits
+= snf
->ecc_strength
* snf
->ecc_parity_bits
;
154 val
= DEC_EMPTY_EN
| (ecc_msg_bits
<< DEC_CS_S
) |
155 (DEC_CON_CORRECT
<< DEC_CON_S
) |
156 (ECC_MODE_NFI
<< snf
->ecc_soc
->mode_shift
) | i
;
157 ecc_write32(snf
, ECC_DECCNFG
, val
);
162 int mtk_snand_ecc_encoder_start(struct mtk_snand
*snf
)
166 ret
= mtk_ecc_wait_idle(snf
, ECC_ENCIDLE
);
168 ecc_write16(snf
, ECC_ENCCON
, 0);
169 mtk_ecc_wait_idle(snf
, ECC_ENCIDLE
);
172 ecc_write16(snf
, ECC_ENCCON
, ENC_EN
);
177 void mtk_snand_ecc_encoder_stop(struct mtk_snand
*snf
)
179 mtk_ecc_wait_idle(snf
, ECC_ENCIDLE
);
180 ecc_write16(snf
, ECC_ENCCON
, 0);
183 int mtk_snand_ecc_decoder_start(struct mtk_snand
*snf
)
187 ret
= mtk_ecc_wait_idle(snf
, ECC_DECIDLE
);
189 ecc_write16(snf
, ECC_DECCON
, 0);
190 mtk_ecc_wait_idle(snf
, ECC_DECIDLE
);
193 ecc_write16(snf
, ECC_DECCON
, DEC_EN
);
198 void mtk_snand_ecc_decoder_stop(struct mtk_snand
*snf
)
200 mtk_ecc_wait_idle(snf
, ECC_DECIDLE
);
201 ecc_write16(snf
, ECC_DECCON
, 0);
204 int mtk_ecc_wait_decoder_done(struct mtk_snand
*snf
)
206 uint16_t val
, step_mask
= (1 << snf
->ecc_steps
) - 1;
207 uint32_t reg
= snf
->ecc_soc
->regs
[ECC_DECDONE
];
210 ret
= read16_poll_timeout(snf
->ecc_base
+ reg
, val
,
211 (val
& step_mask
) == step_mask
, 0,
214 snand_log_ecc(snf
->pdev
, "ECC decoder is busy\n");
219 int mtk_ecc_check_decode_error(struct mtk_snand
*snf
)
221 uint32_t i
, regi
, fi
, errnum
;
222 uint32_t errnum_shift
= snf
->ecc_soc
->errnum_shift
;
223 uint32_t errnum_mask
= (1 << snf
->ecc_soc
->errnum_bits
) - 1;
226 for (i
= 0; i
< snf
->ecc_steps
; i
++) {
230 errnum
= ecc_read32(snf
, ECC_DECENUM(regi
));
231 errnum
= (errnum
>> (fi
* errnum_shift
)) & errnum_mask
;
233 if (errnum
<= snf
->ecc_strength
) {
234 snf
->sect_bf
[i
] = errnum
;
236 snf
->sect_bf
[i
] = -1;
244 static int mtk_ecc_check_buf_bitflips(struct mtk_snand
*snf
, const void *buf
,
245 size_t len
, uint32_t bitflips
)
247 const uint8_t *buf8
= buf
;
248 const uint32_t *buf32
;
251 while (len
&& ((uintptr_t)buf8
) % sizeof(uint32_t)) {
252 weight
= hweight8(*buf8
);
253 bitflips
+= BITS_PER_BYTE
- weight
;
257 if (bitflips
> snf
->ecc_strength
)
261 buf32
= (const uint32_t *)buf8
;
262 while (len
>= sizeof(uint32_t)) {
266 weight
= hweight32(d
);
267 bitflips
+= sizeof(uint32_t) * BITS_PER_BYTE
- weight
;
271 len
-= sizeof(uint32_t);
273 if (bitflips
> snf
->ecc_strength
)
277 buf8
= (const uint8_t *)buf32
;
279 weight
= hweight8(*buf8
);
280 bitflips
+= BITS_PER_BYTE
- weight
;
284 if (bitflips
> snf
->ecc_strength
)
291 static int mtk_ecc_check_parity_bitflips(struct mtk_snand
*snf
, const void *buf
,
292 uint32_t bits
, uint32_t bitflips
)
301 rc
= mtk_ecc_check_buf_bitflips(snf
, buf
, len
, bitflips
);
307 /* We want a precise count of bits */
308 b
= ((const uint8_t *)buf
)[len
];
309 for (i
= 0; i
< bits
; i
++) {
314 if (bitflips
> snf
->ecc_strength
)
320 static void mtk_ecc_reset_parity(void *buf
, uint32_t bits
)
327 memset(buf
, 0xff, len
);
329 /* Only reset bits protected by ECC to 1 */
331 ((uint8_t *)buf
)[len
] |= GENMASK(bits
- 1, 0);
334 int mtk_ecc_fixup_empty_sector(struct mtk_snand
*snf
, uint32_t sect
)
336 uint32_t ecc_bytes
= snf
->spare_per_sector
- snf
->nfi_soc
->fdm_size
;
337 uint8_t *oob
= snf
->page_cache
+ snf
->writesize
;
338 uint8_t *data_ptr
, *fdm_ptr
, *ecc_ptr
;
339 int bitflips
= 0, ecc_bits
, parity_bits
;
341 parity_bits
= fls(snf
->nfi_soc
->sector_size
* 8);
342 ecc_bits
= snf
->ecc_strength
* parity_bits
;
344 data_ptr
= snf
->page_cache
+ sect
* snf
->nfi_soc
->sector_size
;
345 fdm_ptr
= oob
+ sect
* snf
->nfi_soc
->fdm_size
;
346 ecc_ptr
= oob
+ snf
->ecc_steps
* snf
->nfi_soc
->fdm_size
+
350 * Check whether DATA + FDM + ECC of a sector contains correctable
353 bitflips
= mtk_ecc_check_buf_bitflips(snf
, data_ptr
,
354 snf
->nfi_soc
->sector_size
,
359 bitflips
= mtk_ecc_check_buf_bitflips(snf
, fdm_ptr
,
360 snf
->nfi_soc
->fdm_ecc_size
,
365 bitflips
= mtk_ecc_check_parity_bitflips(snf
, ecc_ptr
, ecc_bits
,
373 /* Reset the data of this sector to 0xff */
374 memset(data_ptr
, 0xff, snf
->nfi_soc
->sector_size
);
375 memset(fdm_ptr
, 0xff, snf
->nfi_soc
->fdm_ecc_size
);
376 mtk_ecc_reset_parity(ecc_ptr
, ecc_bits
);