1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Weijie Gao <weijie.gao@mediatek.com>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/init.h>
10 #include <linux/device.h>
11 #include <linux/delay.h>
12 #include <linux/reset.h>
13 #include <linux/hrtimer.h>
14 #include <linux/mii.h>
15 #include <linux/of_mdio.h>
16 #include <linux/of_platform.h>
17 #include <linux/of_gpio.h>
18 #include <linux/of_net.h>
19 #include <linux/of_irq.h>
20 #include <linux/phy.h>
23 #include "mt753x_swconfig.h"
24 #include "mt753x_regs.h"
25 #include "mt753x_nl.h"
30 struct list_head mt753x_devs
;
31 static DEFINE_MUTEX(mt753x_devs_lock
);
33 static struct mt753x_sw_id
*mt753x_sw_ids
[] = {
38 u32
mt753x_reg_read(struct gsw_mt753x
*gsw
, u32 reg
)
42 mutex_lock(&gsw
->host_bus
->mdio_lock
);
44 gsw
->host_bus
->write(gsw
->host_bus
, gsw
->smi_addr
, 0x1f,
45 (reg
& MT753X_REG_PAGE_ADDR_M
) >> MT753X_REG_PAGE_ADDR_S
);
47 low
= gsw
->host_bus
->read(gsw
->host_bus
, gsw
->smi_addr
,
48 (reg
& MT753X_REG_ADDR_M
) >> MT753X_REG_ADDR_S
);
50 high
= gsw
->host_bus
->read(gsw
->host_bus
, gsw
->smi_addr
, 0x10);
52 mutex_unlock(&gsw
->host_bus
->mdio_lock
);
54 return (high
<< 16) | (low
& 0xffff);
57 void mt753x_reg_write(struct gsw_mt753x
*gsw
, u32 reg
, u32 val
)
59 mutex_lock(&gsw
->host_bus
->mdio_lock
);
61 gsw
->host_bus
->write(gsw
->host_bus
, gsw
->smi_addr
, 0x1f,
62 (reg
& MT753X_REG_PAGE_ADDR_M
) >> MT753X_REG_PAGE_ADDR_S
);
64 gsw
->host_bus
->write(gsw
->host_bus
, gsw
->smi_addr
,
65 (reg
& MT753X_REG_ADDR_M
) >> MT753X_REG_ADDR_S
, val
& 0xffff);
67 gsw
->host_bus
->write(gsw
->host_bus
, gsw
->smi_addr
, 0x10, val
>> 16);
69 mutex_unlock(&gsw
->host_bus
->mdio_lock
);
72 /* Indirect MDIO clause 22/45 access */
73 static int mt753x_mii_rw(struct gsw_mt753x
*gsw
, int phy
, int reg
, u16 data
,
81 timeout
= ktime_add_us(ktime_get(), timeout_us
);
83 val
= mt753x_reg_read(gsw
, PHY_IAC
);
85 if ((val
& PHY_ACS_ST
) == 0)
88 if (ktime_compare(ktime_get(), timeout
) > 0)
92 val
= (st
<< MDIO_ST_S
) |
93 ((cmd
<< MDIO_CMD_S
) & MDIO_CMD_M
) |
94 ((phy
<< MDIO_PHY_ADDR_S
) & MDIO_PHY_ADDR_M
) |
95 ((reg
<< MDIO_REG_ADDR_S
) & MDIO_REG_ADDR_M
);
97 if (cmd
== MDIO_CMD_WRITE
|| cmd
== MDIO_CMD_ADDR
)
98 val
|= data
& MDIO_RW_DATA_M
;
100 mt753x_reg_write(gsw
, PHY_IAC
, val
| PHY_ACS_ST
);
103 timeout
= ktime_add_us(ktime_get(), timeout_us
);
105 val
= mt753x_reg_read(gsw
, PHY_IAC
);
107 if ((val
& PHY_ACS_ST
) == 0)
110 if (ktime_compare(ktime_get(), timeout
) > 0)
114 if (cmd
== MDIO_CMD_READ
|| cmd
== MDIO_CMD_READ_C45
) {
115 val
= mt753x_reg_read(gsw
, PHY_IAC
);
116 ret
= val
& MDIO_RW_DATA_M
;
122 int mt753x_mii_read(struct gsw_mt753x
*gsw
, int phy
, int reg
)
126 if (phy
< MT753X_NUM_PHYS
)
127 phy
= (gsw
->phy_base
+ phy
) & MT753X_SMI_ADDR_MASK
;
129 mutex_lock(&gsw
->mii_lock
);
130 val
= mt753x_mii_rw(gsw
, phy
, reg
, 0, MDIO_CMD_READ
, MDIO_ST_C22
);
131 mutex_unlock(&gsw
->mii_lock
);
136 void mt753x_mii_write(struct gsw_mt753x
*gsw
, int phy
, int reg
, u16 val
)
138 if (phy
< MT753X_NUM_PHYS
)
139 phy
= (gsw
->phy_base
+ phy
) & MT753X_SMI_ADDR_MASK
;
141 mutex_lock(&gsw
->mii_lock
);
142 mt753x_mii_rw(gsw
, phy
, reg
, val
, MDIO_CMD_WRITE
, MDIO_ST_C22
);
143 mutex_unlock(&gsw
->mii_lock
);
146 int mt753x_mmd_read(struct gsw_mt753x
*gsw
, int addr
, int devad
, u16 reg
)
150 if (addr
< MT753X_NUM_PHYS
)
151 addr
= (gsw
->phy_base
+ addr
) & MT753X_SMI_ADDR_MASK
;
153 mutex_lock(&gsw
->mii_lock
);
154 mt753x_mii_rw(gsw
, addr
, devad
, reg
, MDIO_CMD_ADDR
, MDIO_ST_C45
);
155 val
= mt753x_mii_rw(gsw
, addr
, devad
, 0, MDIO_CMD_READ_C45
,
157 mutex_unlock(&gsw
->mii_lock
);
162 void mt753x_mmd_write(struct gsw_mt753x
*gsw
, int addr
, int devad
, u16 reg
,
165 if (addr
< MT753X_NUM_PHYS
)
166 addr
= (gsw
->phy_base
+ addr
) & MT753X_SMI_ADDR_MASK
;
168 mutex_lock(&gsw
->mii_lock
);
169 mt753x_mii_rw(gsw
, addr
, devad
, reg
, MDIO_CMD_ADDR
, MDIO_ST_C45
);
170 mt753x_mii_rw(gsw
, addr
, devad
, val
, MDIO_CMD_WRITE
, MDIO_ST_C45
);
171 mutex_unlock(&gsw
->mii_lock
);
174 int mt753x_mmd_ind_read(struct gsw_mt753x
*gsw
, int addr
, int devad
, u16 reg
)
178 if (addr
< MT753X_NUM_PHYS
)
179 addr
= (gsw
->phy_base
+ addr
) & MT753X_SMI_ADDR_MASK
;
181 mutex_lock(&gsw
->mii_lock
);
183 mt753x_mii_rw(gsw
, addr
, MII_MMD_ACC_CTL_REG
,
184 (MMD_ADDR
<< MMD_CMD_S
) |
185 ((devad
<< MMD_DEVAD_S
) & MMD_DEVAD_M
),
186 MDIO_CMD_WRITE
, MDIO_ST_C22
);
188 mt753x_mii_rw(gsw
, addr
, MII_MMD_ADDR_DATA_REG
, reg
,
189 MDIO_CMD_WRITE
, MDIO_ST_C22
);
191 mt753x_mii_rw(gsw
, addr
, MII_MMD_ACC_CTL_REG
,
192 (MMD_DATA
<< MMD_CMD_S
) |
193 ((devad
<< MMD_DEVAD_S
) & MMD_DEVAD_M
),
194 MDIO_CMD_WRITE
, MDIO_ST_C22
);
196 val
= mt753x_mii_rw(gsw
, addr
, MII_MMD_ADDR_DATA_REG
, 0,
197 MDIO_CMD_READ
, MDIO_ST_C22
);
199 mutex_unlock(&gsw
->mii_lock
);
204 void mt753x_mmd_ind_write(struct gsw_mt753x
*gsw
, int addr
, int devad
, u16 reg
,
207 if (addr
< MT753X_NUM_PHYS
)
208 addr
= (gsw
->phy_base
+ addr
) & MT753X_SMI_ADDR_MASK
;
210 mutex_lock(&gsw
->mii_lock
);
212 mt753x_mii_rw(gsw
, addr
, MII_MMD_ACC_CTL_REG
,
213 (MMD_ADDR
<< MMD_CMD_S
) |
214 ((devad
<< MMD_DEVAD_S
) & MMD_DEVAD_M
),
215 MDIO_CMD_WRITE
, MDIO_ST_C22
);
217 mt753x_mii_rw(gsw
, addr
, MII_MMD_ADDR_DATA_REG
, reg
,
218 MDIO_CMD_WRITE
, MDIO_ST_C22
);
220 mt753x_mii_rw(gsw
, addr
, MII_MMD_ACC_CTL_REG
,
221 (MMD_DATA
<< MMD_CMD_S
) |
222 ((devad
<< MMD_DEVAD_S
) & MMD_DEVAD_M
),
223 MDIO_CMD_WRITE
, MDIO_ST_C22
);
225 mt753x_mii_rw(gsw
, addr
, MII_MMD_ADDR_DATA_REG
, val
,
226 MDIO_CMD_WRITE
, MDIO_ST_C22
);
228 mutex_unlock(&gsw
->mii_lock
);
231 static inline int mt753x_get_duplex(const struct device_node
*np
)
233 return of_property_read_bool(np
, "full-duplex");
236 static void mt753x_load_port_cfg(struct gsw_mt753x
*gsw
)
238 struct device_node
*port_np
;
239 struct device_node
*fixed_link_node
;
240 struct mt753x_port_cfg
*port_cfg
;
243 for_each_child_of_node(gsw
->dev
->of_node
, port_np
) {
244 if (!of_device_is_compatible(port_np
, "mediatek,mt753x-port"))
247 if (!of_device_is_available(port_np
))
250 if (of_property_read_u32(port_np
, "reg", &port
))
255 port_cfg
= &gsw
->port5_cfg
;
258 port_cfg
= &gsw
->port6_cfg
;
264 if (port_cfg
->enabled
) {
265 dev_info(gsw
->dev
, "duplicated node for port%d\n",
270 port_cfg
->np
= port_np
;
272 if (of_get_phy_mode(port_np
, &port_cfg
->phy_mode
) < 0) {
273 dev_info(gsw
->dev
, "incorrect phy-mode %d\n", port
);
277 fixed_link_node
= of_get_child_by_name(port_np
, "fixed-link");
278 if (fixed_link_node
) {
281 port_cfg
->force_link
= 1;
282 port_cfg
->duplex
= mt753x_get_duplex(fixed_link_node
);
284 if (of_property_read_u32(fixed_link_node
, "speed",
290 of_node_put(fixed_link_node
);
294 port_cfg
->speed
= MAC_SPD_10
;
297 port_cfg
->speed
= MAC_SPD_100
;
300 port_cfg
->speed
= MAC_SPD_1000
;
303 port_cfg
->speed
= MAC_SPD_2500
;
306 dev_info(gsw
->dev
, "incorrect speed %d\n",
312 port_cfg
->enabled
= 1;
316 static void mt753x_add_gsw(struct gsw_mt753x
*gsw
)
318 mutex_lock(&mt753x_devs_lock
);
319 gsw
->id
= mt753x_id
++;
320 INIT_LIST_HEAD(&gsw
->list
);
321 list_add_tail(&gsw
->list
, &mt753x_devs
);
322 mutex_unlock(&mt753x_devs_lock
);
325 static void mt753x_remove_gsw(struct gsw_mt753x
*gsw
)
327 mutex_lock(&mt753x_devs_lock
);
328 list_del(&gsw
->list
);
329 mutex_unlock(&mt753x_devs_lock
);
333 struct gsw_mt753x
*mt753x_get_gsw(u32 id
)
335 struct gsw_mt753x
*dev
;
337 mutex_lock(&mt753x_devs_lock
);
339 list_for_each_entry(dev
, &mt753x_devs
, list
) {
344 mutex_unlock(&mt753x_devs_lock
);
349 struct gsw_mt753x
*mt753x_get_first_gsw(void)
351 struct gsw_mt753x
*dev
;
353 mutex_lock(&mt753x_devs_lock
);
355 list_for_each_entry(dev
, &mt753x_devs
, list
)
358 mutex_unlock(&mt753x_devs_lock
);
363 void mt753x_put_gsw(void)
365 mutex_unlock(&mt753x_devs_lock
);
368 void mt753x_lock_gsw(void)
370 mutex_lock(&mt753x_devs_lock
);
373 static int mt753x_hw_reset(struct gsw_mt753x
*gsw
)
375 struct device_node
*np
= gsw
->dev
->of_node
;
376 struct reset_control
*rstc
;
380 mcm
= of_property_read_bool(np
, "mediatek,mcm");
382 rstc
= devm_reset_control_get(gsw
->dev
, "mcm");
385 dev_err(gsw
->dev
, "Missing reset ctrl of switch\n");
389 reset_control_assert(rstc
);
391 reset_control_deassert(rstc
);
397 gsw
->reset_pin
= of_get_named_gpio(np
, "reset-gpios", 0);
398 if (gsw
->reset_pin
< 0) {
399 dev_err(gsw
->dev
, "Missing reset pin of switch\n");
403 ret
= devm_gpio_request(gsw
->dev
, gsw
->reset_pin
, "mt753x-reset");
405 dev_info(gsw
->dev
, "Failed to request gpio %d\n",
410 gpio_direction_output(gsw
->reset_pin
, 0);
412 gpio_set_value(gsw
->reset_pin
, 1);
418 static irqreturn_t
mt753x_irq_handler(int irq
, void *dev
)
420 struct gsw_mt753x
*gsw
= dev
;
422 disable_irq_nosync(gsw
->irq
);
424 schedule_work(&gsw
->irq_worker
);
429 static int mt753x_probe(struct platform_device
*pdev
)
431 struct gsw_mt753x
*gsw
;
432 struct mt753x_sw_id
*sw
;
433 struct device_node
*np
= pdev
->dev
.of_node
;
434 struct device_node
*mdio
;
435 struct mii_bus
*mdio_bus
;
438 struct mt753x_mapping
*map
;
441 mdio
= of_parse_phandle(np
, "mediatek,mdio", 0);
445 mdio_bus
= of_mdio_find_bus(mdio
);
447 return -EPROBE_DEFER
;
449 gsw
= devm_kzalloc(&pdev
->dev
, sizeof(struct gsw_mt753x
), GFP_KERNEL
);
453 gsw
->host_bus
= mdio_bus
;
454 gsw
->dev
= &pdev
->dev
;
455 mutex_init(&gsw
->mii_lock
);
457 /* Switch hard reset */
458 if (mt753x_hw_reset(gsw
))
461 /* Fetch the SMI address dirst */
462 if (of_property_read_u32(np
, "mediatek,smi-addr", &gsw
->smi_addr
))
463 gsw
->smi_addr
= MT753X_DFL_SMI_ADDR
;
465 /* Get LAN/WAN port mapping */
466 map
= mt753x_find_mapping(np
);
468 mt753x_apply_mapping(gsw
, map
);
469 gsw
->global_vlan_enable
= 1;
470 dev_info(gsw
->dev
, "LAN/WAN VLAN setting=%s\n", map
->name
);
473 /* Load MAC port configurations */
474 mt753x_load_port_cfg(gsw
);
476 /* Check for valid switch and then initialize */
477 for (i
= 0; i
< ARRAY_SIZE(mt753x_sw_ids
); i
++) {
478 if (!mt753x_sw_ids
[i
]->detect(gsw
, &rev
)) {
479 sw
= mt753x_sw_ids
[i
];
481 gsw
->name
= rev
.name
;
482 gsw
->model
= sw
->model
;
484 dev_info(gsw
->dev
, "Switch is MediaTek %s rev %d",
487 /* Initialize the switch */
496 if (i
>= ARRAY_SIZE(mt753x_sw_ids
)) {
497 dev_err(gsw
->dev
, "No mt753x switch found\n");
501 gsw
->irq
= platform_get_irq(pdev
, 0);
503 ret
= devm_request_irq(gsw
->dev
, gsw
->irq
, mt753x_irq_handler
,
504 0, dev_name(gsw
->dev
), gsw
);
506 dev_err(gsw
->dev
, "Failed to request irq %d\n",
511 INIT_WORK(&gsw
->irq_worker
, mt753x_irq_worker
);
514 platform_set_drvdata(pdev
, gsw
);
516 gsw
->phy_status_poll
= of_property_read_bool(gsw
->dev
->of_node
,
517 "mediatek,phy-poll");
521 mt753x_swconfig_init(gsw
);
527 mt753x_irq_enable(gsw
);
532 devm_kfree(&pdev
->dev
, gsw
);
537 static int mt753x_remove(struct platform_device
*pdev
)
539 struct gsw_mt753x
*gsw
= platform_get_drvdata(pdev
);
542 cancel_work_sync(&gsw
->irq_worker
);
544 if (gsw
->reset_pin
>= 0)
545 devm_gpio_free(&pdev
->dev
, gsw
->reset_pin
);
547 #ifdef CONFIG_SWCONFIG
548 mt753x_swconfig_destroy(gsw
);
551 mt753x_remove_gsw(gsw
);
553 platform_set_drvdata(pdev
, NULL
);
558 static const struct of_device_id mt753x_ids
[] = {
559 { .compatible
= "mediatek,mt753x" },
563 MODULE_DEVICE_TABLE(of
, mt753x_ids
);
565 static struct platform_driver mt753x_driver
= {
566 .probe
= mt753x_probe
,
567 .remove
= mt753x_remove
,
570 .of_match_table
= mt753x_ids
,
574 static int __init
mt753x_init(void)
578 INIT_LIST_HEAD(&mt753x_devs
);
579 ret
= platform_driver_register(&mt753x_driver
);
585 module_init(mt753x_init
);
587 static void __exit
mt753x_exit(void)
591 platform_driver_unregister(&mt753x_driver
);
593 module_exit(mt753x_exit
);
595 MODULE_LICENSE("GPL");
596 MODULE_AUTHOR("Weijie Gao <weijie.gao@mediatek.com>");
597 MODULE_DESCRIPTION("Driver for MediaTek MT753x Gigabit Switch");