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[openwrt/staging/mkresin.git] / target / linux / mediatek / patches / 0051-pinctrl-mediatek-add-mtk_pctrl_spec_pull_set_samereg.patch
1 From aefbeb75a32e080445d72ddd4b9ab28c258597d0 Mon Sep 17 00:00:00 2001
2 From: Yingjoe Chen <yingjoe.chen@mediatek.com>
3 Date: Mon, 18 May 2015 23:11:15 -0700
4 Subject: [PATCH 51/76] pinctrl: mediatek: add mtk_pctrl_spec_pull_set_samereg
5 common code
6
7 Several mediatek soc use similar pull setting procedure as mt8173,
8 the pupd enable and resistance setting are in the same register.
9 Add common code mtk_pctrl_spec_pull_set_samereg out of spec_pull_set
10 in mt8173 to handle this case, so future soc driver can use it.
11
12 Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
13 Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
14 ---
15 drivers/pinctrl/mediatek/pinctrl-mt8173.c | 166 +++++++------------------
16 drivers/pinctrl/mediatek/pinctrl-mtk-common.c | 60 +++++++++
17 drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 31 +++++
18 3 files changed, 136 insertions(+), 121 deletions(-)
19
20 diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8173.c b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
21 index 412ea84..cc44b27 100644
22 --- a/drivers/pinctrl/mediatek/pinctrl-mt8173.c
23 +++ b/drivers/pinctrl/mediatek/pinctrl-mt8173.c
24 @@ -47,130 +47,54 @@ struct mtk_pin_ies_smt_set {
25 .offset = _offset, \
26 }
27
28 -/**
29 - * struct mtk_pin_spec_pupd_set - For special pins' pull up/down setting.
30 - * @pin: The pin number.
31 - * @offset: The offset of special pull up/down setting register.
32 - * @pupd_bit: The pull up/down bit in this register.
33 - * @r0_bit: The r0 bit of pull resistor.
34 - * @r1_bit: The r1 bit of pull resistor.
35 - */
36 -struct mtk_pin_spec_pupd_set {
37 - unsigned int pin;
38 - unsigned int offset;
39 - unsigned char pupd_bit;
40 - unsigned char r1_bit;
41 - unsigned char r0_bit;
42 -};
43 -
44 -#define MTK_PIN_PUPD_SPEC(_pin, _offset, _pupd, _r1, _r0) \
45 - { \
46 - .pin = _pin, \
47 - .offset = _offset, \
48 - .pupd_bit = _pupd, \
49 - .r1_bit = _r1, \
50 - .r0_bit = _r0, \
51 - }
52 -
53 -static const struct mtk_pin_spec_pupd_set mt8173_spec_pupd[] = {
54 - MTK_PIN_PUPD_SPEC(119, 0xe00, 2, 1, 0), /* KROW0 */
55 - MTK_PIN_PUPD_SPEC(120, 0xe00, 6, 5, 4), /* KROW1 */
56 - MTK_PIN_PUPD_SPEC(121, 0xe00, 10, 9, 8), /* KROW2 */
57 - MTK_PIN_PUPD_SPEC(122, 0xe10, 2, 1, 0), /* KCOL0 */
58 - MTK_PIN_PUPD_SPEC(123, 0xe10, 6, 5, 4), /* KCOL1 */
59 - MTK_PIN_PUPD_SPEC(124, 0xe10, 10, 9, 8), /* KCOL2 */
60 -
61 - MTK_PIN_PUPD_SPEC(67, 0xd10, 2, 1, 0), /* ms0 DS */
62 - MTK_PIN_PUPD_SPEC(68, 0xd00, 2, 1, 0), /* ms0 RST */
63 - MTK_PIN_PUPD_SPEC(66, 0xc10, 2, 1, 0), /* ms0 cmd */
64 - MTK_PIN_PUPD_SPEC(65, 0xc00, 2, 1, 0), /* ms0 clk */
65 - MTK_PIN_PUPD_SPEC(57, 0xc20, 2, 1, 0), /* ms0 data0 */
66 - MTK_PIN_PUPD_SPEC(58, 0xc20, 2, 1, 0), /* ms0 data1 */
67 - MTK_PIN_PUPD_SPEC(59, 0xc20, 2, 1, 0), /* ms0 data2 */
68 - MTK_PIN_PUPD_SPEC(60, 0xc20, 2, 1, 0), /* ms0 data3 */
69 - MTK_PIN_PUPD_SPEC(61, 0xc20, 2, 1, 0), /* ms0 data4 */
70 - MTK_PIN_PUPD_SPEC(62, 0xc20, 2, 1, 0), /* ms0 data5 */
71 - MTK_PIN_PUPD_SPEC(63, 0xc20, 2, 1, 0), /* ms0 data6 */
72 - MTK_PIN_PUPD_SPEC(64, 0xc20, 2, 1, 0), /* ms0 data7 */
73 -
74 - MTK_PIN_PUPD_SPEC(78, 0xc50, 2, 1, 0), /* ms1 cmd */
75 - MTK_PIN_PUPD_SPEC(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
76 - MTK_PIN_PUPD_SPEC(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
77 - MTK_PIN_PUPD_SPEC(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
78 - MTK_PIN_PUPD_SPEC(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
79 - MTK_PIN_PUPD_SPEC(77, 0xc40, 2, 1, 0), /* ms1 clk */
80 -
81 - MTK_PIN_PUPD_SPEC(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
82 - MTK_PIN_PUPD_SPEC(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
83 - MTK_PIN_PUPD_SPEC(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
84 - MTK_PIN_PUPD_SPEC(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
85 - MTK_PIN_PUPD_SPEC(104, 0xc80, 2, 1, 0), /* ms2 clk */
86 - MTK_PIN_PUPD_SPEC(105, 0xc90, 2, 1, 0), /* ms2 cmd */
87 -
88 - MTK_PIN_PUPD_SPEC(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
89 - MTK_PIN_PUPD_SPEC(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
90 - MTK_PIN_PUPD_SPEC(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
91 - MTK_PIN_PUPD_SPEC(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
92 - MTK_PIN_PUPD_SPEC(26, 0xcc0, 2, 1, 0), /* ms3 clk */
93 - MTK_PIN_PUPD_SPEC(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
94 +static const struct mtk_pin_spec_pupd_set_samereg mt8173_spec_pupd[] = {
95 + MTK_PIN_PUPD_SPEC_SR(119, 0xe00, 2, 1, 0), /* KROW0 */
96 + MTK_PIN_PUPD_SPEC_SR(120, 0xe00, 6, 5, 4), /* KROW1 */
97 + MTK_PIN_PUPD_SPEC_SR(121, 0xe00, 10, 9, 8), /* KROW2 */
98 + MTK_PIN_PUPD_SPEC_SR(122, 0xe10, 2, 1, 0), /* KCOL0 */
99 + MTK_PIN_PUPD_SPEC_SR(123, 0xe10, 6, 5, 4), /* KCOL1 */
100 + MTK_PIN_PUPD_SPEC_SR(124, 0xe10, 10, 9, 8), /* KCOL2 */
101 +
102 + MTK_PIN_PUPD_SPEC_SR(67, 0xd10, 2, 1, 0), /* ms0 DS */
103 + MTK_PIN_PUPD_SPEC_SR(68, 0xd00, 2, 1, 0), /* ms0 RST */
104 + MTK_PIN_PUPD_SPEC_SR(66, 0xc10, 2, 1, 0), /* ms0 cmd */
105 + MTK_PIN_PUPD_SPEC_SR(65, 0xc00, 2, 1, 0), /* ms0 clk */
106 + MTK_PIN_PUPD_SPEC_SR(57, 0xc20, 2, 1, 0), /* ms0 data0 */
107 + MTK_PIN_PUPD_SPEC_SR(58, 0xc20, 2, 1, 0), /* ms0 data1 */
108 + MTK_PIN_PUPD_SPEC_SR(59, 0xc20, 2, 1, 0), /* ms0 data2 */
109 + MTK_PIN_PUPD_SPEC_SR(60, 0xc20, 2, 1, 0), /* ms0 data3 */
110 + MTK_PIN_PUPD_SPEC_SR(61, 0xc20, 2, 1, 0), /* ms0 data4 */
111 + MTK_PIN_PUPD_SPEC_SR(62, 0xc20, 2, 1, 0), /* ms0 data5 */
112 + MTK_PIN_PUPD_SPEC_SR(63, 0xc20, 2, 1, 0), /* ms0 data6 */
113 + MTK_PIN_PUPD_SPEC_SR(64, 0xc20, 2, 1, 0), /* ms0 data7 */
114 +
115 + MTK_PIN_PUPD_SPEC_SR(78, 0xc50, 2, 1, 0), /* ms1 cmd */
116 + MTK_PIN_PUPD_SPEC_SR(73, 0xd20, 2, 1, 0), /* ms1 dat0 */
117 + MTK_PIN_PUPD_SPEC_SR(74, 0xd20, 6, 5, 4), /* ms1 dat1 */
118 + MTK_PIN_PUPD_SPEC_SR(75, 0xd20, 10, 9, 8), /* ms1 dat2 */
119 + MTK_PIN_PUPD_SPEC_SR(76, 0xd20, 14, 13, 12), /* ms1 dat3 */
120 + MTK_PIN_PUPD_SPEC_SR(77, 0xc40, 2, 1, 0), /* ms1 clk */
121 +
122 + MTK_PIN_PUPD_SPEC_SR(100, 0xd40, 2, 1, 0), /* ms2 dat0 */
123 + MTK_PIN_PUPD_SPEC_SR(101, 0xd40, 6, 5, 4), /* ms2 dat1 */
124 + MTK_PIN_PUPD_SPEC_SR(102, 0xd40, 10, 9, 8), /* ms2 dat2 */
125 + MTK_PIN_PUPD_SPEC_SR(103, 0xd40, 14, 13, 12), /* ms2 dat3 */
126 + MTK_PIN_PUPD_SPEC_SR(104, 0xc80, 2, 1, 0), /* ms2 clk */
127 + MTK_PIN_PUPD_SPEC_SR(105, 0xc90, 2, 1, 0), /* ms2 cmd */
128 +
129 + MTK_PIN_PUPD_SPEC_SR(22, 0xd60, 2, 1, 0), /* ms3 dat0 */
130 + MTK_PIN_PUPD_SPEC_SR(23, 0xd60, 6, 5, 4), /* ms3 dat1 */
131 + MTK_PIN_PUPD_SPEC_SR(24, 0xd60, 10, 9, 8), /* ms3 dat2 */
132 + MTK_PIN_PUPD_SPEC_SR(25, 0xd60, 14, 13, 12), /* ms3 dat3 */
133 + MTK_PIN_PUPD_SPEC_SR(26, 0xcc0, 2, 1, 0), /* ms3 clk */
134 + MTK_PIN_PUPD_SPEC_SR(27, 0xcd0, 2, 1, 0) /* ms3 cmd */
135 };
136
137 -static int spec_pull_set(struct regmap *regmap, unsigned int pin,
138 +static int mt8173_spec_pull_set(struct regmap *regmap, unsigned int pin,
139 unsigned char align, bool isup, unsigned int r1r0)
140 {
141 - unsigned int i;
142 - unsigned int reg_pupd, reg_set, reg_rst;
143 - unsigned int bit_pupd, bit_r0, bit_r1;
144 - const struct mtk_pin_spec_pupd_set *spec_pupd_pin;
145 - bool find = false;
146 -
147 - for (i = 0; i < ARRAY_SIZE(mt8173_spec_pupd); i++) {
148 - if (pin == mt8173_spec_pupd[i].pin) {
149 - find = true;
150 - break;
151 - }
152 - }
153 -
154 - if (!find)
155 - return -EINVAL;
156 -
157 - spec_pupd_pin = mt8173_spec_pupd + i;
158 - reg_set = spec_pupd_pin->offset + align;
159 - reg_rst = spec_pupd_pin->offset + (align << 1);
160 -
161 - if (isup)
162 - reg_pupd = reg_rst;
163 - else
164 - reg_pupd = reg_set;
165 -
166 - bit_pupd = BIT(spec_pupd_pin->pupd_bit);
167 - regmap_write(regmap, reg_pupd, bit_pupd);
168 -
169 - bit_r0 = BIT(spec_pupd_pin->r0_bit);
170 - bit_r1 = BIT(spec_pupd_pin->r1_bit);
171 -
172 - switch (r1r0) {
173 - case MTK_PUPD_SET_R1R0_00:
174 - regmap_write(regmap, reg_rst, bit_r0);
175 - regmap_write(regmap, reg_rst, bit_r1);
176 - break;
177 - case MTK_PUPD_SET_R1R0_01:
178 - regmap_write(regmap, reg_set, bit_r0);
179 - regmap_write(regmap, reg_rst, bit_r1);
180 - break;
181 - case MTK_PUPD_SET_R1R0_10:
182 - regmap_write(regmap, reg_rst, bit_r0);
183 - regmap_write(regmap, reg_set, bit_r1);
184 - break;
185 - case MTK_PUPD_SET_R1R0_11:
186 - regmap_write(regmap, reg_set, bit_r0);
187 - regmap_write(regmap, reg_set, bit_r1);
188 - break;
189 - default:
190 - return -EINVAL;
191 - }
192 -
193 - return 0;
194 + return mtk_pctrl_spec_pull_set_samereg(regmap, mt8173_spec_pupd,
195 + ARRAY_SIZE(mt8173_spec_pupd), pin, align, isup, r1r0);
196 }
197
198 static const struct mtk_pin_ies_smt_set mt8173_ies_smt_set[] = {
199 @@ -382,7 +306,7 @@ static const struct mtk_pinctrl_devdata mt8173_pinctrl_data = {
200 .n_grp_cls = ARRAY_SIZE(mt8173_drv_grp),
201 .pin_drv_grp = mt8173_pin_drv,
202 .n_pin_drv_grps = ARRAY_SIZE(mt8173_pin_drv),
203 - .spec_pull_set = spec_pull_set,
204 + .spec_pull_set = mt8173_spec_pull_set,
205 .spec_ies_smt_set = spec_ies_smt_set,
206 .dir_offset = 0x0000,
207 .pullen_offset = 0x0100,
208 diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
209 index 474812e..0d51145 100644
210 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
211 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.c
212 @@ -186,6 +186,66 @@ static int mtk_pconf_set_driving(struct mtk_pinctrl *pctl,
213 return -EINVAL;
214 }
215
216 +int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
217 + const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
218 + unsigned int info_num, unsigned int pin,
219 + unsigned char align, bool isup, unsigned int r1r0)
220 +{
221 + unsigned int i;
222 + unsigned int reg_pupd, reg_set, reg_rst;
223 + unsigned int bit_pupd, bit_r0, bit_r1;
224 + const struct mtk_pin_spec_pupd_set_samereg *spec_pupd_pin;
225 + bool find = false;
226 +
227 + for (i = 0; i < info_num; i++) {
228 + if (pin == pupd_infos[i].pin) {
229 + find = true;
230 + break;
231 + }
232 + }
233 +
234 + if (!find)
235 + return -EINVAL;
236 +
237 + spec_pupd_pin = pupd_infos + i;
238 + reg_set = spec_pupd_pin->offset + align;
239 + reg_rst = spec_pupd_pin->offset + (align << 1);
240 +
241 + if (isup)
242 + reg_pupd = reg_rst;
243 + else
244 + reg_pupd = reg_set;
245 +
246 + bit_pupd = BIT(spec_pupd_pin->pupd_bit);
247 + regmap_write(regmap, reg_pupd, bit_pupd);
248 +
249 + bit_r0 = BIT(spec_pupd_pin->r0_bit);
250 + bit_r1 = BIT(spec_pupd_pin->r1_bit);
251 +
252 + switch (r1r0) {
253 + case MTK_PUPD_SET_R1R0_00:
254 + regmap_write(regmap, reg_rst, bit_r0);
255 + regmap_write(regmap, reg_rst, bit_r1);
256 + break;
257 + case MTK_PUPD_SET_R1R0_01:
258 + regmap_write(regmap, reg_set, bit_r0);
259 + regmap_write(regmap, reg_rst, bit_r1);
260 + break;
261 + case MTK_PUPD_SET_R1R0_10:
262 + regmap_write(regmap, reg_rst, bit_r0);
263 + regmap_write(regmap, reg_set, bit_r1);
264 + break;
265 + case MTK_PUPD_SET_R1R0_11:
266 + regmap_write(regmap, reg_set, bit_r0);
267 + regmap_write(regmap, reg_set, bit_r1);
268 + break;
269 + default:
270 + return -EINVAL;
271 + }
272 +
273 + return 0;
274 +}
275 +
276 static int mtk_pconf_set_pull_select(struct mtk_pinctrl *pctl,
277 unsigned int pin, bool enable, bool isup, unsigned int arg)
278 {
279 diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
280 index 1508849..2a4b7be 100644
281 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
282 +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h
283 @@ -117,6 +117,32 @@ struct mtk_pin_drv_grp {
284 .grp = _grp, \
285 }
286
287 +/**
288 + * struct mtk_pin_spec_pupd_set_samereg
289 + * - For special pins' pull up/down setting which resides in same register
290 + * @pin: The pin number.
291 + * @offset: The offset of special pull up/down setting register.
292 + * @pupd_bit: The pull up/down bit in this register.
293 + * @r0_bit: The r0 bit of pull resistor.
294 + * @r1_bit: The r1 bit of pull resistor.
295 + */
296 +struct mtk_pin_spec_pupd_set_samereg {
297 + unsigned short pin;
298 + unsigned short offset;
299 + unsigned char pupd_bit;
300 + unsigned char r1_bit;
301 + unsigned char r0_bit;
302 +};
303 +
304 +#define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
305 + { \
306 + .pin = _pin, \
307 + .offset = _offset, \
308 + .pupd_bit = _pupd, \
309 + .r1_bit = _r1, \
310 + .r0_bit = _r0, \
311 + }
312 +
313 struct mtk_eint_offsets {
314 const char *name;
315 unsigned int stat;
316 @@ -220,4 +246,9 @@ struct mtk_pinctrl {
317 int mtk_pctrl_init(struct platform_device *pdev,
318 const struct mtk_pinctrl_devdata *data);
319
320 +int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
321 + const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
322 + unsigned int info_num, unsigned int pin,
323 + unsigned char align, bool isup, unsigned int r1r0);
324 +
325 #endif /* __PINCTRL_MTK_COMMON_H */
326 --
327 1.7.10.4
328
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